WO2008033952A3 - Non-volatile memory and method for class-based update block replacement rules - Google Patents

Non-volatile memory and method for class-based update block replacement rules Download PDF

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Publication number
WO2008033952A3
WO2008033952A3 PCT/US2007/078311 US2007078311W WO2008033952A3 WO 2008033952 A3 WO2008033952 A3 WO 2008033952A3 US 2007078311 W US2007078311 W US 2007078311W WO 2008033952 A3 WO2008033952 A3 WO 2008033952A3
Authority
WO
WIPO (PCT)
Prior art keywords
blocks
pool
class
volatile memory
block
Prior art date
Application number
PCT/US2007/078311
Other languages
French (fr)
Other versions
WO2008033952A2 (en
Inventor
Jason T Lin
Original Assignee
Sandisk Corp
Jason T Lin
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/532,467 external-priority patent/US7774392B2/en
Priority claimed from US11/532,456 external-priority patent/US7779056B2/en
Application filed by Sandisk Corp, Jason T Lin filed Critical Sandisk Corp
Priority to JP2009528456A priority Critical patent/JP4682261B2/en
Priority to KR1020097007548A priority patent/KR101430097B1/en
Publication of WO2008033952A2 publication Critical patent/WO2008033952A2/en
Publication of WO2008033952A3 publication Critical patent/WO2008033952A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7202Allocation control and policies

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

In a nonvolatile memory with block management system, data are written to blocks and are erasable block by block. At any time a pool of blocks are open for storing data concurrently. The number of blocks in the pool is limited. A replacement system allows new blocks to be introduced into the pool without exceeding the limit. In particular, different classes of blocks in the pool each has its own replacement rule, such as closing a least active block before being replaced. In this way, possible inefficiency and premature closure of blocks in the pool can be avoided.
PCT/US2007/078311 2006-09-15 2007-09-12 Non-volatile memory and method for class-based update block replacement rules WO2008033952A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009528456A JP4682261B2 (en) 2006-09-15 2007-09-12 Method for non-volatile memory and class-based update block replacement rules
KR1020097007548A KR101430097B1 (en) 2006-09-15 2007-09-12 Non-volatile memory and method for class-based update block replacement rules

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/532,467 2006-09-15
US11/532,456 2006-09-15
US11/532,467 US7774392B2 (en) 2006-09-15 2006-09-15 Non-volatile memory with management of a pool of update memory blocks based on each block's activity and data order
US11/532,456 US7779056B2 (en) 2006-09-15 2006-09-15 Managing a pool of update memory blocks based on each block's activity and data order

Publications (2)

Publication Number Publication Date
WO2008033952A2 WO2008033952A2 (en) 2008-03-20
WO2008033952A3 true WO2008033952A3 (en) 2008-10-02

Family

ID=39185714

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/078311 WO2008033952A2 (en) 2006-09-15 2007-09-12 Non-volatile memory and method for class-based update block replacement rules

Country Status (4)

Country Link
JP (1) JP4682261B2 (en)
KR (1) KR101430097B1 (en)
TW (1) TWI340899B (en)
WO (1) WO2008033952A2 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101526497B1 (en) * 2008-11-27 2015-06-10 삼성전자주식회사 System on chip and information processing method thereof
JP5175703B2 (en) 2008-12-11 2013-04-03 株式会社東芝 Memory device
US8688894B2 (en) * 2009-09-03 2014-04-01 Pioneer Chip Technology Ltd. Page based management of flash storage
KR101678868B1 (en) 2010-02-11 2016-11-23 삼성전자주식회사 Apparatus for flash address translation apparatus and method thereof
EP3387787B1 (en) * 2016-12-21 2019-03-20 Nchain Holdings Limited Computer-implemented systems and methods to enable complex functionality on a blockchain while preserving security-based restrictions on script size and opcode limits
TWI659373B (en) * 2018-02-14 2019-05-11 財團法人工業技術研究院 Blockchain system and method thereof
WO2021117939A1 (en) * 2019-12-12 2021-06-17 엘지전자 주식회사 Firmware provision apparatus and provision method therefor
TWI808384B (en) * 2021-02-23 2023-07-11 慧榮科技股份有限公司 Storage device, flash memory control and control method thereo
TWI821152B (en) * 2021-02-23 2023-11-01 慧榮科技股份有限公司 Storage device, flash memory control and control method thereo
CN115878729B (en) * 2023-03-03 2023-05-02 湖北省楚天云有限公司 Node block storage allocation optimization method and system based on alliance chain

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050144360A1 (en) * 2003-12-30 2005-06-30 Bennett Alan D. Non-volatile memory and method with block management system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100389867B1 (en) * 2001-06-04 2003-07-04 삼성전자주식회사 Flash memory management method
JP2007280108A (en) * 2006-04-07 2007-10-25 Sony Corp Storage medium controller, storage medium control method, and program
US7779056B2 (en) * 2006-09-15 2010-08-17 Sandisk Corporation Managing a pool of update memory blocks based on each block's activity and data order

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050144360A1 (en) * 2003-12-30 2005-06-30 Bennett Alan D. Non-volatile memory and method with block management system

Also Published As

Publication number Publication date
TW200837562A (en) 2008-09-16
JP4682261B2 (en) 2011-05-11
KR101430097B1 (en) 2014-08-13
TWI340899B (en) 2011-04-21
JP2010503929A (en) 2010-02-04
KR20090079197A (en) 2009-07-21
WO2008033952A2 (en) 2008-03-20

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