WO2008024623A3 - Method and software tool for designing an integrated circuit - Google Patents

Method and software tool for designing an integrated circuit Download PDF

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Publication number
WO2008024623A3
WO2008024623A3 PCT/US2007/075443 US2007075443W WO2008024623A3 WO 2008024623 A3 WO2008024623 A3 WO 2008024623A3 US 2007075443 W US2007075443 W US 2007075443W WO 2008024623 A3 WO2008024623 A3 WO 2008024623A3
Authority
WO
WIPO (PCT)
Prior art keywords
primitives
integrated circuit
designing
software tool
response
Prior art date
Application number
PCT/US2007/075443
Other languages
French (fr)
Other versions
WO2008024623A2 (en
Inventor
Marlin H Mickle
Swapna Dontharaju
Raymond R Hoare
James T Cain
Alex Jones
Original Assignee
Univ Pittsburgh
Marlin H Mickle
Swapna Dontharaju
Raymond R Hoare
James T Cain
Alex Jones
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Univ Pittsburgh, Marlin H Mickle, Swapna Dontharaju, Raymond R Hoare, James T Cain, Alex Jones filed Critical Univ Pittsburgh
Publication of WO2008024623A2 publication Critical patent/WO2008024623A2/en
Publication of WO2008024623A3 publication Critical patent/WO2008024623A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design

Abstract

A method of designing an integrated circuit for an application having standards having a plurality of primitives, each of the primitives having a corresponding response. The method includes generating a macros description of each of the primitives and the response corresponding to each of the primitives, wherein the macros description includes information relating to a number of first fields for each of the primitives and a number of second fields for the response corresponding to each of the primitives. The method further includes receiving a specification of the behavior of the integrated circuit in response to the primitives that has one or more values specified for each of the second fields, and generating a hardware description language representation for the integrated circuit based on the macros description and the specification. Also, a software tool which implements the method.
PCT/US2007/075443 2006-08-23 2007-08-08 Method and software tool for designing an integrated circuit WO2008024623A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US82330106P 2006-08-23 2006-08-23
US60/823,301 2006-08-23

Publications (2)

Publication Number Publication Date
WO2008024623A2 WO2008024623A2 (en) 2008-02-28
WO2008024623A3 true WO2008024623A3 (en) 2008-09-18

Family

ID=39107520

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2007/075443 WO2008024623A2 (en) 2006-08-23 2007-08-08 Method and software tool for designing an integrated circuit

Country Status (1)

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WO (1) WO2008024623A2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6591403B1 (en) * 2000-10-02 2003-07-08 Hewlett-Packard Development Company, L.P. System and method for specifying hardware description language assertions targeting a diverse set of verification tools

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6591403B1 (en) * 2000-10-02 2003-07-08 Hewlett-Packard Development Company, L.P. System and method for specifying hardware description language assertions targeting a diverse set of verification tools

Also Published As

Publication number Publication date
WO2008024623A2 (en) 2008-02-28

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