WO2008010434A1 - Coin identification device - Google Patents

Coin identification device Download PDF

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Publication number
WO2008010434A1
WO2008010434A1 PCT/JP2007/063708 JP2007063708W WO2008010434A1 WO 2008010434 A1 WO2008010434 A1 WO 2008010434A1 JP 2007063708 W JP2007063708 W JP 2007063708W WO 2008010434 A1 WO2008010434 A1 WO 2008010434A1
Authority
WO
WIPO (PCT)
Prior art keywords
coin
switching
circuit
unit
sensor
Prior art date
Application number
PCT/JP2007/063708
Other languages
French (fr)
Japanese (ja)
Inventor
Satoshi Miyauchi
Takehiko Nara
Tooru Ueki
Kouji Ikeda
Original Assignee
Panasonic Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2007108898A external-priority patent/JP5130773B2/en
Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/303,325 priority Critical patent/US20090242354A1/en
Priority to CN2007800267824A priority patent/CN101490724B/en
Publication of WO2008010434A1 publication Critical patent/WO2008010434A1/en

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Classifications

    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07D—HANDLING OF COINS OR VALUABLE PAPERS, e.g. TESTING, SORTING BY DENOMINATIONS, COUNTING, DISPENSING, CHANGING OR DEPOSITING
    • G07D5/00—Testing specially adapted to determine the identity or genuineness of coins, e.g. for segregating coins which are unacceptable or alien to a currency
    • G07D5/08—Testing the magnetic or electric properties

Definitions

  • the present invention relates to a coin identifying device mounted on a vending machine or the like.
  • FIG. 21 is a front perspective view showing a schematic configuration of a conventional coin identifying device.
  • This coin discriminating device includes a casing 1, an insertion slot 3, a passage 4, three sensors 5, 6, 7, a gate 8, a return passage 9, a sorting passage 10, an identification portion 11, And a storage cylinder 12.
  • a slot 3 for receiving the coin 2 is provided above the casing 1, and the passage 4 is connected to the slot 3 and is inclined downward.
  • the sensors 5, 6 and 7 are provided on the side wall surface of the passage 4.
  • Gate 8 is provided at the end of passage 4.
  • the return passage 9 is connected to one side of the gate 8, and the distribution passage 10 is connected to the other side of the gate 8.
  • the storage cylinder 12 stores the coins 2 distributed by the distribution passage 10.
  • the identification unit 11 is provided with the outputs of sensors 5, 6, and 7.
  • the dedicated sensors 5, 6, and 7 are independently mounted to obtain the unevenness, material, and thickness characteristics of the coin 2.
  • Sensors 5, 6, and 7 are installed sequentially from the upstream side of passage 4, and two of these cannot be installed at the same location. Therefore, the unevenness, material and thickness of the coin 2 are detected independently without being associated with each other at different locations. Therefore, the same part of coin 2 It is difficult to detect the relationship between unevenness, material, and thickness at the position, and there is a limit to the precise identification of coins 2.
  • Patent Document 1 JP-A-2006-59139
  • the present invention is a coin discriminating apparatus that can also detect the mutual relationship between two features in the same part of a coin.
  • the coin identification device of the present invention includes a detection unit, a first switching unit, a storage unit, and a control unit.
  • the detection unit includes a first sensor including a pair of coils and an oscillation circuit, and is supplied with a voltage from a power supply and outputs a detection signal that changes as a coin passes between the coils.
  • the first switching unit switches the magnetic connection of the coil between the in-phase connection and the reverse-phase connection multiple times while the coin passes between the coils.
  • the control unit determines the authenticity and type of the coin by comparing the detection signal from the detection unit with the reference signal stored in the storage unit. In this way, since the first switching unit switches the magnetic connection of the coil between the in-phase connection and the reverse-phase connection a plurality of times while the coin passes between the coils, the correlation between the features of the same part of the coin can be established. Can be detected.
  • FIG. 1 is a front perspective view showing a schematic configuration of a coin identifying device according to Embodiment 1 of the present invention.
  • FIG. 2 is a block diagram for simplifying and explaining the configuration of the coin identifying device according to the first to fourth embodiments of the present invention.
  • FIG. 3 is a cross-sectional view showing a first state of the first sensor constituting the coin identifying device shown in FIG.
  • FIG. 4 is a sectional view showing a second state of the first sensor shown in FIG.
  • FIG. 5 is a circuit diagram showing a connection configuration between the first switching unit and the first sensor shown in FIG. 2.
  • FIG. 6 is a circuit diagram showing the connection configuration of the third switching unit, the first sensor, and the capacitor group shown in FIG.
  • FIG. 7 is an output waveform diagram output from the first and second sensors of the coin discriminating apparatus shown in FIG.
  • FIG. 8 is an enlarged view of each waveform shown in FIG. 7 and shows the output signal waveform of each part. It is.
  • FIG. 9 is a block diagram of the coin identifying device according to the first exemplary embodiment of the present invention.
  • FIG. 10 is a circuit diagram of the tuning circuit and the detection circuit in FIG. 9 and the vicinity thereof.
  • FIG. 11 is a circuit diagram of an electronic switch which is a switching unit in FIG.
  • FIG. 12 is a tuning characteristic diagram according to the difference in coin material.
  • FIG. 13 is a tuning characteristic diagram according to the difference in coin thickness.
  • FIG. 14 is a cross-sectional view of a coin to be identified in the second embodiment of the present invention.
  • FIG. 15 is a characteristic diagram showing a change in the output voltage of the tuning circuit with respect to the depth from the upper surface of the coin shown in FIG.
  • FIG. 16 is a circuit diagram showing a part of the tuning circuit of the coin discriminating apparatus according to Embodiment 3 of the present invention.
  • FIG. 17 is a block diagram of a coin identifying device according to Embodiment 4 of the present invention.
  • FIG. 18 is a circuit diagram of the oscillation unit in FIG.
  • FIG. 19 is a diagram showing output waveforms output from the first and second sensors of the coin discriminating apparatus shown in FIG. 17 and output signal waveforms of each part.
  • FIG. 20 is a circuit diagram showing an example of a buffer circuit applied to the first and fourth embodiments.
  • FIG. 21 is a front perspective view showing a schematic configuration of a conventional coin identifying device.
  • FIG. 1 is a front perspective view showing a schematic configuration of a coin identifying device 21 according to Embodiment 1 of the present invention.
  • the coin identification device 21 includes a housing 22, an insertion slot 23, a passage 24, a first sensor 25 (hereinafter referred to as sensor 25), a second sensor 26 (hereinafter referred to as sensor 26), a gate 27, and a return.
  • P passage 28, distribution passage 29, and storage cylinder 30 are provided.
  • An insertion port 23 for receiving the coin 20 is provided above the housing 22, and is connected to the passage 24 via a snubber 24A.
  • the passage 24 is provided downwardly with an inclination of about 10 ° to 12 °.
  • the sensors 25 and 26 are mounted on the side wall surface of the passage 24 in this order.
  • the diameter of the sensor 25 is 8.3 mm, and the diameter of the sensor 26 is 12.5 mm.
  • the 25 and 26 are mounted such that the distance from the bottom surface to the center of the passage 24 is 13.25 mm, for example. Further, the centers of the sensors 25 and 26 are, for example, 25.Omm apart.
  • the gate 27 is provided at the end of the passage 24, and distributes the coins 20 by authenticity.
  • the return passage 28 through which the false coins are introduced is connected to one side of the gate 27, and the sorting passage 29 through which the true coins are introduced is connected to the other side of the gate 27.
  • the storage cylinder 30 is connected to the distribution passage 29 and stores the coins 20 distributed by the distribution passage 29 in denominations.
  • FIGS. Figure 2 3 is a block diagram for simplifying and explaining the configuration of the coin identifying device 21.
  • FIG. 3 and 4 are sectional views of the sensors 25 and 26.
  • FIG. 3 and 4 are sectional views of the sensors 25 and 26.
  • the coin discriminating device 21 includes, as an electric circuit, sensors 25 and 26, an oscillation circuit 90, a first capacitor group 731 and 732, a first switching rod, a second switching rod, 3 A switching unit, a shaping unit 94, a control unit 95, and a storage unit 49 are provided.
  • the sensor 25 and the capacitor group 731, the sensor 26 and the capacitor group 732, and the oscillation circuit 90 constitute a detection unit 96.
  • the control unit 95 is connected to a storage unit 49 in which reference signals are stored in advance. The control unit 95 determines the authenticity and type of the coin 20 by comparing the detection signal input through the shaping unit 94 and the reference signal stored in the storage unit 49.
  • the sensors 25 and 26 will be described with reference to FIGS. 3 and 4.
  • the sensor 25 is configured by winding coils 42A and 42B with force S on ferrite cores 41A and 41B mounted on both side walls of the passage 24, respectively.
  • the sensor 26 is configured by winding coils 44A and 44B around ferrite cores 43A and 43B mounted to face both side walls of the passage 24, respectively.
  • the sensors 25 and 26 since the sensors 25 and 26 have basically the same configuration, the sensor 25 will be described as a representative.
  • FIG. 3 shows the magnetic field lines 50A when the coil 42A and the coil 42B are connected in series and in phase.
  • the magnetic field lines 50A are output in a direction penetrating the coin 20 in the passage 24, and mainly detect the characteristics of the material of the coin 20 efficiently.
  • FIG. 4 shows the state of the magnetic lines of force 50B when the coil 42A and the coil 42B are connected in series and reverse phase.
  • the magnetic field lines 50B are output in a direction limited by the coins 20 in the passage 24, and mainly detect the unevenness and thickness characteristics of the coins 20 efficiently.
  • the detection unit 96 having the sensor 25 including the pair of coils 42A and 42B and the oscillation circuit 90 generates a detection signal that changes as the coin 20 passes between the coils 42A and 42B. Output.
  • the principle of acquiring different information of the coin 20 by switching the magnetic connection between the coil 42A and the coil 42B to the series in-phase connection and the series anti-phase connection in this way will be described later.
  • the force connecting the coil 42A and the coil 42B in series is not limited to the series connection.
  • Parallel connection that is, parallel in-phase connection and parallel anti-phase connection may be switched.
  • changes are large and minute changes can be detected.
  • stable output can be detected by parallel connection.
  • the sensor 26 has the same configuration as the sensor 25, and the diameter of the sensor 26 is larger than the diameter of the sensor 25. Therefore, by switching between the in-phase connection and the reverse-phase connection, the sensor 25 can detect the material information and unevenness information of the coin 20, and the sensor 26 can detect the material information and thickness information.
  • FIG. 5 is a circuit diagram showing a connection configuration between the sensor 25 including the coils 42A and 42B, the switching units 71A and 71B constituting the first switching unit 91, and the switching unit 71J.
  • the switching unit 71A is short-circuited and the switching unit 71J is connected to the lower side of the figure, the coils 42A and 42B are connected in series and in phase.
  • the switching unit 71B is short-circuited and the switching unit 71J is connected to the upper side of the figure, the coils 42A and 42B are connected in series in reverse phase.
  • the first switching unit 91 switches the magnetic connection of the coils 42A and 42B between the series in-phase connection and the series anti-phase connection. Similarly, the first switching unit 91 switches the connection of the coils 44A and 44B in the sensor 26 to a series in-phase connection and a series anti-phase connection, respectively.
  • FIG. 6 shows a connection configuration of the sensor 25 including the coils 42A and 42B, the switching units 71E and 71F configuring the third switching unit 93, and the capacitors 73A and 73B included in the capacitor group 731.
  • the third switching unit 93 switches the capacitors 73A and 73B connected to the sensor 25.
  • the capacitors 73 A and 73 B have different electrostatic capacities, and are included in the capacitor group 731. Since the capacitors 73A and 73B are provided independently as described above, the frequency adjustment of the series in-phase connection and the series anti-phase connection can be easily performed.
  • the capacitor group 732 includes two capacitors independently, and the third switching unit 93 includes capacitors 44A and 44B force S of the sensor 26 according to the series in-phase connection and the series anti-phase connection. Select and switch to adjust the frequency.
  • the detection unit 96 includes a plurality of capacitors 73A and 73B having different capacitances, and the third switching unit 93 switches the capacitors 73A and 73B connected to the sensor 25 or the sensor 26.
  • Capacitor group 731 732 may be connected in series and / or in parallel using a plurality of capacitors having the same capacitance, in addition to the capacitors having different capacitances. That is, the configuration of the capacitor groups 731 and 732 is not limited as long as the third switching unit 93 switches the capacitance connected to the sensors 25 and 26 to a value suitable for in-phase connection and reverse-phase connection.
  • the third switching unit 93 performs frequency adjustment by selecting and switching a capacitor depending on whether the coils 44A and 44B of the sensor 26 are connected in series in-phase or in series.
  • the frequency may be changed by selecting and switching the capacitor without changing the connection of the coils 44A and 44B of the sensor 26. That is, the frequency adjustment by the third switching unit 93 is not limited to the operation at the same time when the first switching unit 91 switches the in-phase connection and the reverse-phase connection of the coils 44A and 44B. Even by changing the frequency, the force S can be used to detect different coin characteristics.
  • the second switching unit 92 plays a role of switching the detection signal output from the detection unit 96 including the sensors 25 and 26 and sending it to the control unit 95 via the shaping unit 94.
  • FIG. 7 shows an envelope waveform obtained by detecting the outputs of the sensors 25 and 26 when the coin 20 passes between the coils 42A and 42B and the coils 44A and 44B, and smoothing the outputs.
  • the output waveform 52 is obtained when the coils 42A and 42B of the sensor 25 are connected in series and in phase
  • the output waveform 53 is obtained when the coils 42A and 42B are connected in series and out of phase.
  • the output waveform 54 is obtained when the coils 44A and 44B of the sensor 26 are connected in series and in phase
  • the output waveform 55 is obtained when the coils 44A and 44B are connected in series anti-phase.
  • the first switching unit 91 switches the connection of the coils 42A and 42B to the series in-phase connection and the series anti-phase connection.
  • the third switching unit 93 selects and switches the force for connecting the capacitor 73A to the sensor 25 and the force for connecting the capacitor 73B. Therefore, for example, at time 56A, the series in-phase connection waveform level 52A indicating the characteristics of the material of the coin 20 and the series anti-phase connection waveform level 53A indicating the unevenness of the coin 20 are detected almost simultaneously with the force S. Monkey.
  • the sensor 25 having a diameter of 8.3 mm and the sensor 26 having a diameter of 12.5 mm are separated by 25. Omm. Are arranged. Therefore, when a coin 20 having a diameter of 14.60 mm or more flows between the sensors 25 and 26, the coin 20 is detected by both the sensors 25 and 26. Therefore, the sensor 25 can detect the series in-phase connection waveform level 52A and the series anti-phase connection waveform level 53A, and the sensor 26 can detect the series in-phase connection waveform level 54A and the series anti-phase connection waveform level 55A almost simultaneously. .
  • the control unit 95 performs switching operations in the first switching unit 91, the second switching unit 92, and the third switching unit 93.
  • a microcomputer that performs dedicated switching control may be prepared, and the first switching unit 91, the second switching unit 92, and the third switching unit 93 may be switched at a predetermined timing.
  • the first switching unit 91 switches the coils 44A and 44B to the series in-phase connection and the series anti-phase connection. Therefore, the sensor 26 can detect the series in-phase connection waveform level 54A indicating the characteristics of the material of the coin 20 at the time 56A and the series anti-phase connection waveform level 55A indicating the characteristics of the thickness of the coin 20 almost simultaneously.
  • the material and the unevenness information are detected at the same location of the coin 20 by the waveform levels 52A and 53A of the sensor 25.
  • the material and thickness information are detected at the same location of the coin 20 by the waveform levels 54A and 55A of the sensor 26.
  • mutual information between the sensor 25 and the sensor 26 can be detected. Therefore, the coin 20 can be identified more precisely.
  • FIG. Fig. 8 shows an enlarged view of each waveform shown in Fig. 7.
  • the full span on the horizontal axis represents lmsec time.
  • the first switching unit 91 divides this lmsec into four time zones 6;!-64 each of 250 sec.
  • the second switching unit 92 switches the output from the sensors 25 and 26 to the shaping unit 94 in conjunction with the first switching unit 91.
  • the control unit 95 sequentially captures the outputs of the sensors 25 and 26 via the shaping unit 94.
  • the coils 42A and 42B of the sensor 25 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected.
  • the coils 42A and 42B of the sensor 25 are connected in series in reverse phase, and the unevenness of the coin 20 is mainly detected.
  • the coils 44A and 44B of the sensor 26 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected.
  • the coils 44A and 44B of force S of the sensor 26 are connected in series in reverse phase, and the thickness of the coin 20 is mainly detected.
  • the control unit 95 can receive two pieces of information per sensor at the same place of the coin 20 by the action of the first switching unit 91. As a result, even if the number of sensors is reduced, the necessary number of types of information can be acquired, the identity of the information acquisition positions is increased, and the identification accuracy is improved. As described above, when four types of information are acquired during lmsec, the speed at which the coin 20 passes through the passage 24 is about 0.2 m / sec, so the position of the coin 20 from which the information is acquired is 0.2 mm. Within the range. Also, since the shaping unit 94 can be shared by providing the second switching unit 92, the circuit configuration can be simplified and the cost can be reduced.
  • FIG. 9 is a specific block diagram of the coin identification device 21.
  • FIG. 10 is a circuit diagram of the tuning circuit 40 and the detection circuit 45 in FIG. 9 and the vicinity thereof.
  • a crystal resonator 35 oscillates at, for example, 8 MHz, and is connected to an oscillator 37 in the microcomputer 36.
  • a clock signal is output from the oscillator 37, and this clock signal is connected to the frequency divider 38 and the switching control unit 39. That is, the crystal unit 35, the oscillator 37, and the frequency divider 38 constitute the oscillation circuit 90 in FIG.
  • the oscillation circuit 90 is a separately-excited oscillation circuit that separately oscillates a tuning circuit 40 described later at a predetermined frequency regardless of the inductance values of the sensors 25 and 26.
  • the output of the frequency divider 38 is connected to a tuning circuit 40 including the sensors 25 and 26.
  • the coinlets 42A, 42B, 44A, and 44B are connected to capacitors 73A to 73D to form a tuning circuit 40. That is, the tuning circuit 40 and the switching control unit 39 constitute the detection unit 96, the first switching unit 91, and the second switching unit 92 in FIG.
  • the connection in the tuning circuit 40 is electronically switched by the output of the switching control unit 39. Further, the frequency division ratio of the frequency divider 38 is switched based on the output of the switching control unit 39.
  • the output of the tuning circuit 40 is input to the detection circuit 45.
  • the detection circuit 45 includes a detection circuit, a peak hold circuit, and a reset circuit that resets the peak hold circuit. Yes.
  • the reset circuit in the detection circuit 45 is reset by the output of the switching control unit 39.
  • the output of the detection circuit 45 is connected to an identification circuit 47 through an analog / digital converter (A / D converter) 46.
  • a / D converter analog / digital converter
  • the peak hold circuit and reset circuit of the detection circuit 45, and the A / D converter 46 shape the detection signal from the tuning circuit 40 and output an envelope waveform to the discrimination circuit 47. These constitute the shaping unit 94 in FIG.
  • the output of the identification circuit 47 is connected to the output terminal 48. From the output terminal 48, data indicating the authenticity and denomination of the inserted coin 20 is output. That is, the identification circuit 47 and the switching control unit 39 constitute the control unit 95 in FIG.
  • the offset switching circuit 69 connected between the frequency divider 38 and the tuning circuit 40 will be described later.
  • the frequency division ratio of the frequency divider 38 is switched by the switching control unit 39.
  • the frequency divider 38 outputs signals 61A to 64A having different frequencies.
  • the frequency divider 38 switches the frequency division ratio so as to output a signal 61A having a frequency of 100 kHz to the coils 42A and 42B during the time zone 61, for example.
  • the frequency divider 38 switches the frequency division ratio during the time zone 62 and outputs, for example, a signal 62A having a frequency of 120 kHz to the coils 42A and 42B.
  • the frequency division ratio is switched, for example, a signal 63A with a frequency of 170 kHz is output to the coils 44A and 44B, and a signal 64 with a frequency 2151 Output to.
  • tuning circuit 40 Upon receiving signals 61A-64A, tuning circuit 40 receives signals in time zone 6;! -64, respectively.
  • 61B to 64B are output. As shown in the figure, it takes about 100 seconds until the operation of the tuning circuit 40 becomes stable and its output becomes substantially constant.
  • the switching control unit 39 outputs reset signals 61C to 64C of 50 sec at the end of each time zone 6;! To 64, respectively. Based on these reset signals, the peak hold circuit in the detection circuit 45 is reset.
  • the detection circuit 45 detects the signals 61B to 64B output from the tuning circuit 40, peaks them, and outputs the signals 61D to 64D. Since the detection circuit 45 has a reset circuit, it is reset by using the reset signals 61C to 64C at the end of each time zone 6;! To 64 so as not to be affected by the previous time.
  • a / D converter 46 signals 61D to 64 D is converted into a digital quantity and supplied to the identification circuit 47.
  • the time for the coin 20 to pass the sensors 25 and 26 is about 100 msec. Therefore, for each coin 20, the sensors 25 and 26 sequentially extract features at different points of 100 points each.
  • switching between the in-phase connection and the reverse-phase connection and switching of the sensors 25 and 26 are switched by the switching control unit 39, and 400 feature data are acquired in 100 msec. That is, the switching control unit 39 performs 400 switching (100 points X 2 X 2)!
  • the identification circuit 47 can identify the coin 20 even if the timing to reach the position of the sensors 25 and 26 after the coin 20 is inserted is not measured. Feature data required for That is, the switching control unit 39 and the identification circuit 47 do not have to be linked.
  • the unevenness and material of the coin 20 are detected by the sensor 25, and the thickness and material of the coin 20 are detected by the sensor 26, so that the coin 20 is accurately identified.
  • the unevenness or thickness of the coin 20 and the material can be identified by switching the sensor between in-phase connection and reverse-phase connection. The following describes the number of switching required when using one sensor!
  • the switching by the switching control unit 39 is slow, precise features of the coin 20 cannot be detected. For at least one sensor, it is necessary to acquire the characteristics of coins 20 at different points of 5 points or more. Furthermore, when switching between in-phase connection and reverse-phase connection is considered, it is necessary to switch 10 times or more within the transit time of the coin 20. In addition, the faster the switching by the switching control unit 39, the more accurate detection information can be acquired. However, making it faster than necessary increases the burden on the microcomputer 36. From the above, the switching by the switching control unit 39 is preferably 10 to 1000 times for one sensor.
  • a tuning circuit 40 is connected between the collector of the transistor 66 and the power source 70.
  • the input terminal 65 is connected to the output of the frequency divider 38 and is connected to the base of the transistor 66 through the resistor 67A.
  • a resistor 67B is connected between the base of the transistor 66 and the ground, and an offset switching circuit 69 is connected to the emitter of the transistor 66.
  • the output of the tuning circuit 40 is input to the detection circuit 45 via the terminal 72.
  • the tuning circuit 40 will be described.
  • One terminal of each of the switching units 71A to 71D is connected to the power source 70.
  • the other terminal of the switching unit 71A is connected to one terminal of the switching unit 71E, one selection terminal of the switching unit 71J, and the other terminal of the coil 42A.
  • the common terminal of the switching unit 71J is connected to the other terminal of the coil 42B, and one terminal of the coil 42B is connected to the terminal 72 connected to the collector of the transistor 66.
  • the other terminal of the switching unit 71E is connected to the terminal 72 via the capacitor 73A.
  • the other terminal of the switching unit 71B is connected to one terminal of the coil 42A, the other selection terminal of the switching unit 71J, and one terminal of the switching unit 71F.
  • the other terminal of the switching unit 71F is connected to the terminal 72 via the capacitor 73B.
  • the other terminal of the switching unit 71C is connected to one terminal of the switching unit 71G, one selection terminal of the switching unit 71K, and the other terminal of the coil 44A.
  • the common terminal of the switching unit 71K is connected to the other terminal of the coil 44B, and one terminal of the coil 44B is connected to the terminal 72.
  • the other terminal of the switching unit 71G is connected to the terminal 72 via the capacitor 73C.
  • the other terminal of switching unit 71D is connected to one terminal of coil 44A, the other selection terminal of switching unit 71K, and one terminal of switching unit 71H.
  • the other terminal of the switching unit 71H is connected to the terminal 72 via the capacitor 73D.
  • switching units 71A to 71D switching units 71E to 71H, and a switching unit
  • 71J and 71K are sequentially switched by the switching control unit 39 in time zone 6;!-64 shown in FIG. That is, in time zone 61, switching unit 71A and switching unit 71E are short-circuited, and switching unit 71J is switched to the other selection terminal side.
  • the coil 42A and the coil 42B are connected in series and in phase.
  • a capacitor 73A is connected in parallel with the series connection body of the coil 42A and the coil 42B.
  • switching unit 71B and switching unit 71F are short-circuited, and switching unit 71J is switched to one selection terminal side.
  • the coil 42A and the coil 42B are connected in series in reverse phase.
  • Capacitor 73B is connected in parallel with the series connection of coil 42A and coil 42B.
  • switching unit 71C and switching unit 71G are short-circuited, and switching unit 71K is switched to the other selection terminal side.
  • the coil 44A and the coil 44B are connected in series and in phase.
  • a capacitor 73C is connected in parallel with the series connection body of the coil 44A and the coil 44B.
  • switching unit 71D and switching unit 71H are short-circuited, and switching unit 71K is switched to one selection terminal side.
  • the coil 44A and the coil 44B are connected in series in reverse phase.
  • a capacitor 73D is connected in parallel with the series connection body of the coil 44A and the coil 44B.
  • the switching units 71A, 71B, 71J constitute a first switching unit 91 for the sensor 25 in FIG.
  • the switching units 71C, 71D and 71K constitute a first switching unit 91 for the sensor 26 in FIG.
  • the switching units 71E and 71F constitute a third switching unit 93 for the sensor 25, and the switching units 71G and 71H constitute a third switching unit 93 for the sensor 26.
  • the switching control unit 39 switches the sensor 25 and the sensor 26 with respect to the detection circuit 45 during 1 msec. That is, the switching units 71A, 71B, 71C, 71D constitute the second switching unit 92 in FIG.
  • each of the switching units 71A to 71D is directly connected to the power source 70. That is, the first switching unit 91 has a set of switching units 71A and 71B and a switching unit 71J for the sensor 25, and the set of switching units 71A and 71B is connected between the sensor 25 and the power source 70. Yes. As a result, the first switching unit 91 can perform switching without adversely affecting the tuning circuit 40 in terms of high frequency.
  • the second switching unit 92 is provided between the power source 70 and the sensors 25 and 26. As a result, the second switching unit 92 can also perform switching without adversely affecting the tuning circuit 40 in terms of high frequency.
  • the connection between the power source 70 and the coils 42A and 44A is switched by the switching units 71A to 71D provided outside the parallel circuit composed of the coil and the capacitor.
  • the A set of switching units 71E and 71F and a switching unit 71J are provided in a parallel circuit of the coils 42A and 42B and one of the capacitors 73A and 73B.
  • a set of switching units 71G and 71H and a switching unit 71K are provided in a parallel circuit of the coils 44A and 44B and any of the capacitors 73C and 73D.
  • switching including the capacitors 73A to 73D can be performed, and it is possible to realize the functions of the first switching unit 91 and the second switching unit 92.
  • the capacitors 73A to 73D forming the tuning circuit 40 are independently provided, the frequency adjustment of the series in-phase connection and the series anti-phase connection can be easily performed.
  • the output of the tuning circuit 40 is output to the terminal 72 and input to the detection circuit 45.
  • the output of the detection circuit 45 is output from the terminal 80 to the A / D converter 46.
  • the detection circuit 45 includes a peak hold circuit 74, a reset circuit 75, an input terminal 76, and a gain switching circuit 77.
  • the peak hold circuit 74 is connected to the terminal 72 and includes a known detection circuit.
  • Reset circuit 75 resets peak hold circuit 74.
  • a reset signal is input to the input terminal 76 from the switching control unit 39 to the reset circuit 75.
  • the gain switching circuit 77 is provided between the output terminal of the peak Honored circuit 74 and the terminal 80.
  • the gain switching circuit 77 includes resistors 78A to 78D connected in series between the input and output of the operational amplifier 77A, and switching units 79A to 79D connected in parallel to the resistors 78A to 78D, respectively. Yes.
  • the switching units 79A to 79D are switched by the switching control unit 39 in correspondence with time zones 6;! To 64 shown in FIG.
  • the gain switching circuit 77 maximizes the gain change width at each output of the sensors 25 and 26 by switching the switching units 79A to 79D between ON and OFF. This increases the signal-to-noise ratio of the signals 61D to 64D and improves the measurement accuracy.
  • gain switching circuit 77 shown in FIG. 10 includes resistors 78A to 78D connected in series and switching units 79A to 79D connected in parallel to resistors 78A to 78D, respectively.
  • the gain switching circuit 77 may be configured by connecting the resistors 78A to 78D in parallel and connecting the switching units 79A to 79D in series to the resistors 78A to 78D.
  • the offset switching circuit 69 includes resistors 67C, 67D, 67E, 67F, and 67G and switching devices 68A to 68D.
  • Resistors 67C, 67D, 67E, 67F, and 67G are connected in series between the emitter of transistor 66 and ground.
  • Switching sections 68A to 68D are connected to both ends of resistors 67D to 67G, respectively.
  • the switching units 68A to 68D are switched by the switching control unit 39 in time zones 61 to 64 in FIG. 8, respectively, and an offset voltage predetermined for each switching is applied to the output voltage of the detection circuit 45. . That is, the offset switching circuit 69 controls the offset voltage to increase the output voltage change width of the detection circuit 45 by switching the switching units 68A to 68D. This increases the signal-to-noise ratio of signals 61D to 64D and improves measurement accuracy.
  • resistors 67D to 67G are connected in series, and the resistors 67D to 67G and switching units 68A to 68D are connected in parallel.
  • the resistors 67D to 67G may be connected in parallel, and the switching units 68A to 68D may be connected in series with the resistors 67D to 67G.
  • the offset voltage may be switched by inserting a plurality of Zener diodes having different Zener voltages in parallel to the input of the peak hold circuit 74 and switching these Zener diodes with an electronic switch.
  • FIG. 11 is a circuit diagram showing one of the switching units 71A to 71K used in the present embodiment.
  • the switching units 71E to 71K used in the tuning circuit 40 it is preferable to use an electronic switch of a type using a field effect transistor (FET). That is, it is preferable that the first switching unit 91 and the second switching unit 92 are configured by FETs that are a plurality of switching elements. This is to improve the isolation of the tuning circuit 40 when switching the frequency.
  • FET field effect transistor
  • This configuration can also be used for the switching units 68A to 68D and the switching units 79A to 79D.
  • a signal controlled by the switching control unit 39 is input to the input terminal 81.
  • a resistor 83A is connected between the input terminal 81 and the base of the transistor 82.
  • a resistor 83B is connected between the base of the transistor 82 and the ground.
  • the emitter of the transistor 82 is directly connected to the ground, and the collector is connected to, for example, a 24 V power supply 84 via a resistor 83C.
  • the collector of the transistor 82 is connected to the gate of the N-channel FET 85A via the resistor 83D.
  • the collector of the transistor 82 is also connected to the gate of the N-channel FET 85B through a resistor 83E.
  • the drain of FET85A is connected to one terminal 86A, and the source of FET85A is connected to the source of FET85B.
  • the drain of FET85B is connected to the other terminal 86B!
  • the two FETs 85A and 85B are connected in series. Therefore, the isolation between the terminals 86A and 86B is improved and the high frequency performance is improved. Also, since the switching parts 71E to 71K are composed of FET85A and 85B, the on-resistance can be made extremely small.
  • the switching units 71J and 71K in the tuning circuit 40 may use two electronic switches shown in FIG.
  • FIG. 12 shows the output characteristics of the tuning circuit 40 when the coils 44A and 44B are connected in series in phase, and coins 20 of the same thickness and different materials are inserted, and shows the change of the output voltage with respect to the frequency.
  • a characteristic curve 103 is output when no metal is present in the vicinity of the coils 44A and 44B. Its center frequency is about 150kHz. In addition, the characteristic curves 104 to 107 are output when there is a load in the presence of metal near the coils 44A and 44B. Its center frequency is about 170 kHz.
  • the characteristic curve 104 is when copper is used as the load metal constituting the coin 20, and the characteristic curve 105 is when brass is used as the load metal.
  • the characteristic curve 106 is the case where white copper is used as the load metal, and the characteristic curve 107 is the case where nickel is used as the load metal. In this way, the characteristic curve shows a characteristic level depending on the type of metal as the load.
  • the material of the inserted coin 20 can be detected using this level of characteristics.
  • the center frequency of the tuning circuit 40 is increased by about 20 kHz when there is a load compared to when there is no load. Therefore, if the output frequency output from the frequency divider 38 is set 20 kHz higher than the center frequency at no load, the material of the coin 20 can be detected with high sensitivity.
  • this set frequency is set slightly higher than the peak frequency under load, the stability will be good. That is, the oscillation frequency of the oscillation circuit 90 when the coils 44A and 44B are connected in phase is separated from the tuning frequency before the coin 20 passes between the coils 44A and 44B by a predetermined frequency (for example, 20 kHz). It is preferable to set.
  • the peak frequency at no load is detected by the switching control unit 39 (control unit 95) measuring the output of the A / D converter 46 while changing the frequency according to the frequency division ratio of the frequency divider 38. ing.
  • the detected value is stored in the storage unit 49 in the microcomputer 36.
  • the frequency divider 38 switches the frequency division ratio so as to obtain the frequency stored in the storage unit 49 and corrects the oscillation frequency. In this way, since the change over time and the change in temperature are corrected, the coin 20 can be accurately identified even if the environment changes.
  • the output frequency of the oscillator 37 can be optimized by detecting the peak frequency at no load for each product during production and storing it in the storage unit 49 of each product. For this reason, it is possible to achieve high, high, and discriminating performance that are not affected by variations among products.
  • the switching control unit 39 (control unit 95) is a force S that detects the peak frequency when the coin 20 is not inserted even after shipment, and this measurement range is centered on the peak frequency stored for each product during production. Can be limited to a relatively narrow range (a range narrower than that during production). As a result, the peak frequency detection time can be shortened.
  • FIG. 13 shows an output characteristic of the tuning circuit 40 when the coils 44A and 44B are connected in series in reverse phase and coins 20 having the same quality and different thicknesses are inserted.
  • the characteristic curve 113 is output at no load when no metal is present in the vicinity of the coils 44A and 44B.
  • the characteristic curves 114 to 120 are output when there is a load in which a metal exists in the vicinity of the coils 44A and 44B. In either case, the center frequency is about 215 kHz.
  • the characteristic curve 114 with load causes a loss due to an eddy current of about 0.8 V compared to the characteristic curve 113 with no load. As a result, the voltage level has dropped.
  • the magnitude of the loss varies depending on the thickness of the metal. That is, when the thickness is gradually increased from the characteristic curve 114 of a thin metal, Sex curve 115 ⁇ ; Therefore, the thickness of the inserted coin 20 can be detected using this level of feature. For this reason, it is preferable that the oscillation frequency when the coils 44A and 44B are connected in reverse phase is set to substantially the same frequency as the tuning frequency before the coin 20 passes between the coils 44A and 44B.
  • this frequency is set to an optimum frequency for each product.
  • the same principle applies to the force sensor 25 described for the sensor 26.
  • the magnetic field lines 50B in FIG. 4 do not spread toward the surface of the coin 20. Therefore, when the coils 42A and 42B are connected in reverse phase, information reflecting irregularities of a relatively small area on the surface of the coin 20 can be acquired.
  • the output of the oscillator 37 is supplied to the tuning circuit 40 via the frequency divider 38, and the oscillator 37 is provided independently of the tuning circuit 40. Therefore, even if the impedance of the coils 42A, 42B, 44A, 44B changes due to the influence of the coin 20 or the environment such as the ambient temperature, it does not affect the oscillation frequency of the oscillator 37. can do.
  • the principle of identifying the material of a coin 20 composed of a single material has been described.
  • the principle of identifying the material of the coin 20A composed of two or more kinds of metal clad materials and the corresponding configuration will be described.
  • FIG. 14 is a cross-sectional view of the coin 20A configured as described above.
  • the surface material 131 is white copper
  • the center material 132 is copper. That is, the coin 20A is, for example, 10, 25, 50 cents in the United States.
  • the output characteristics of the tuning circuit 40 vary depending on the coin material.
  • Figure 13 shows the difference in output characteristics when the same material is used and the coin thickness is different.
  • the output voltage is also different when the force S and the coin material are different. Using this difference in output voltage, it is possible to distinguish the surface material 131 and the central material 132 from each other.
  • FIG. 15 is a characteristic diagram showing a change in output voltage of the tuning circuit 40 with respect to the depth from the upper surface of the coin 20A shown in FIG.
  • a characteristic curve 133 shows a case where a signal having an oscillation frequency higher than that of the characteristic curve 134 is input to the tuning circuit 40. At this time, coils 44A and 44B are out of phase. It is connected.
  • the penetration depth varies depending on the frequency. That is, at high frequencies, the magnetic field does not penetrate deeply due to the skin effect, and the influence of the surface material 131 is large. At low frequencies, the magnetic field penetrates deeply, and the surface material 131 and the central material 132 affect the output voltage level. Therefore, the coin 20A can also be identified by the difference in power level between the surface material 131 and the central material 132.
  • FIG. 16 is a circuit diagram showing a part of the tuning circuit in the present embodiment.
  • the sensors 25 and 26 and the capacitors 73A to 73D are connected in parallel.
  • sensors 25 and 26 and capacitors 156 and 158 are connected in series to form a tuning circuit. That is, unlike the first embodiment in that a series tuning circuit is used, the circuit 151 and a circuit having the same configuration as the circuit 151 are connected in parallel and used instead of the tuning circuit 40 in FIG. That is, the circuit 151 shows only the part including the sensor 25.
  • the circuit 151 is inserted between the collector of the transistor 66 and the terminal 72 of the detection circuit 45 in FIG. In this case, since it is a series tuning circuit, the coupling capacitor 72 A connected to the terminal 72 of the detection circuit 45 can be omitted.
  • One terminal 152 of the circuit 151 is connected to one terminal of the coil 42A, and the other terminal of the coil 42A is connected to the switching unit 15 Connected to 4A common terminal.
  • One selection terminal of the switching unit 154A is connected to one terminal of the coil 42B, and the other terminal of the coil 42B is connected to one selection terminal of the switching unit 154B via the capacitor 156.
  • the common terminal of the switching unit 154B is connected to the other terminal 157 of the circuit 151.
  • the other selection terminal of the switching unit 154A is connected to the other terminal of the coil 42B, and one terminal of the coil 42B is connected to the other selection terminal of the switching unit 154B via the capacitor 158. .
  • Switching units 154A and 154B are configured in the same manner as switching units 71J and 71K in the first embodiment. Capacitors 156 and 158 forming the circuit 151 are provided independently. Therefore, the frequency adjustment of the series in-phase connection and the series anti-phase connection can be easily performed.
  • the operation of the circuit 151 configured as described above will be described.
  • the switching units 154A and 154B are switched in the direction indicated by the solid line by the output of the switching control unit 39 in FIG. Then, the coils 42A and 42B are connected in series and in phase, and the capacitor 156 is connected in series to this series connection body. Since the coils 42A and 42B are connected in series and in phase, the material of the coin 20 can be detected efficiently.
  • the Q value that is a value representing the degree of resonance sharpness of the resonance circuit is high.
  • the Q value in a series tuning circuit is expressed by the reciprocal of the product of R, ⁇ and C, where R is the internal resistance included in the tuning circuit, C is the capacitance of the capacitor, and ⁇ is the angular frequency.
  • the first switching unit 91 and the third switching unit 93 in FIG. 2 can be configured only by the switching units 154A and 154B.
  • FIG. 17 is a block diagram centering on the electric circuit of the coin discriminating apparatus 201 in the fourth embodiment.
  • FIG. 18 is a circuit diagram of the oscillation unit 204 in FIG.
  • the basic configuration is real
  • the force S is the same as that in FIG. 2 in the first embodiment, and the configuration of the oscillation circuit 90 is different in the present embodiment. That is, in the first embodiment, the output of the oscillator 37 that oscillates at a fixed frequency is supplied to the tuning circuit 40 via the frequency divider 38.
  • a self-excited oscillation circuit including a tuning circuit 202 having a variable tuning frequency is used.
  • the switching control unit 205 is replaced with the switching control unit 39, the tuning circuit 40, the crystal oscillator 35, the oscillator 37, and the frequency divider 38.
  • An oscillation unit 204 is provided.
  • the switching control unit 205 corresponds to the switching control unit 39, switches the connection in the oscillation unit 204, and switches the gain of the detection circuit 45.
  • the output of the oscillation unit 204 is connected to the detection circuit 45.
  • the switching control unit 205, the A / D converter 46, and the identification circuit 47 are composed of a microcomputer 206, and data indicating the authenticity and denomination of the inserted coin 20 is output from the output terminal 48. That is, in this configuration, the oscillation unit 204 constitutes the detection unit 96 in FIG.
  • the oscillating unit 204 includes a tuning circuit 202 and an amplifying unit 203 for oscillation.
  • the tuning circuit 202 is formed of sensors 25 and 26 and capacitors 221A, 221B and 222A to 222D connected in parallel to the sensors 25 and 26. That is, the oscillation unit 204 self-oscillates. Details of the oscillator 204 will be described later.
  • the switching control unit 205 divides lmsec into four time zones 231, 232, 233, and 234 at equal intervals.
  • Switching control unit 205 Time zone 23; By repeating a series of times from! To 234, the detection circuit 45 successively takes in the outputs of the sensors 25 and 26 sequentially.
  • the coils 42A and 42B of the sensor 25 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected. Further, in the time zone 232, the coils 42A and 42B of the sensor 25 are connected in series in reverse phase, and the unevenness of the coin 20 is mainly detected.
  • the coils 44A and 44B of the sensor 26 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected.
  • the coils 44A and 44B of the sensor 26 are connected in series in reverse phase, and the thickness of the coin 20 is mainly detected.
  • the switching control unit 205 sets the reset signal 23 for 50 seconds at the end of each time zone 23;! Outputs 1A to 234A.
  • a reset circuit 216 is provided in the amplification unit 203.
  • a peak hold circuit 74 is provided in the detection circuit 45. The switching control unit 205 resets the reset circuit 216 and the peak hold circuit 74 by the reset signals 231A to 234A.
  • the oscillator 204 outputs signals 231B to 234B in each time zone 23;! It takes about 100 seconds for the output of the oscillation unit 204 to stabilize and to become substantially constant.
  • the oscillating unit 204 uses the reset circuit 216 to reset at the end of each time zone 23 ;! to 234, and does not affect the subsequent time.
  • the time until the output of the oscillation unit 204 is stabilized can be shortened by using the stabilization unit.
  • the in-phase connection and reverse-phase connection of the sensors 25 and 26 can be switched more frequently, and the identity of the measurement position can be further improved. I'll do it.
  • FIG. 20 is a circuit diagram showing an example of a buffer circuit.
  • the output terminal 215 is connected to the positive input terminal of the op amp 241 via the capacitor 243 and the resistor 242.
  • the negative input terminal of the operational amplifier 241 is connected to the output side of the operational amplifier 241.
  • Such a voltage follower 244 can be used as a buffer circuit.
  • Such a buffer circuit may be used in the first embodiment. That is, a voltage follower 244 may be inserted between the connection terminal 72 and the detection circuit 45.
  • the offset switching circuit 69 in FIG. 10 can be used.
  • the switching control unit 205 controls the offset switching circuit 69 to control the offset voltage for the first 50 sec of each 250 sec switching interval, thereby speeding up the rise of oscillation.
  • the stabilization unit can be realized by controlling the switching units 68A to 68D of the offset switching circuit 69 by the switching control unit 205. Such control may be used in the first embodiment. That is, the switching control unit 39 may control the switching units 68A to 68D as described above.
  • the detection circuit 45 outputs the signal 231B output from the oscillation unit 204 in each time zone 23;! ⁇ 234B is detected, peak-holded, and signals 231C to 234C are output. Since the operation after the detection circuit 45 is the same as that of the first embodiment, the detailed description is omitted.
  • the oscillation unit 204 includes a tuning circuit 202 and an amplification unit 203 connected to the tuning circuit 202 in a positive feedback connection.
  • the input terminal 210 of the amplifying unit 203 is connected to the negative input terminal 211A of the comparator 211.
  • a resistor 212A is connected between the negative input terminal 211A and the positive input terminal 211B.
  • Resistors 212B and 212C are connected in series between the power supply 70 and the ground.
  • the connection point is connected to the positive input terminal 211B, and applies a reference voltage to the positive input terminal 211B of the comparator 211.
  • a capacitor 213 is connected between the positive input terminal 211B and the ground.
  • a feedback resistor is connected between the output terminal 211C and the negative input terminal 211A of the comparator 211.
  • a resistor 212D is connected, and a pull-up resistor 212E is connected between the output terminal 211C and the power supply 70.
  • a resistor 212F is connected between the output terminal 211C of the comparator 211 and the base of the NPN transistor 214.
  • a resistor 212J is connected between the base of the transistor 214 and the ground.
  • a resistor 212G and a resistor 212H are connected in series between the emitter of the transistor 214 and the ground.
  • the resistor 212G is used for offset voltage adjustment, and an appropriate offset voltage is set by the resistor 212G.
  • the offset switching circuit 69 described in Embodiment 1 may be used.
  • the collector of the transistor 214 is connected to the terminal 72 and also connected to the output terminal 215 of the oscillation unit 204.
  • a reset circuit 216 is connected to a connection point between the base of the transistor 214 and the resistor 212F.
  • a resistor 216C is connected between the input terminal 216A and the base of the NPN transistor 216B, and a resistor 216D is connected between the base of the transistor 216B and the ground.
  • the emitter of the transistor 216B is connected to the ground, and the collector is connected to the connection point between the base of the transistor 214 and the resistor 212F.
  • the input terminal 216A of the reset circuit 216 is connected to the switching control unit 205, and the reset circuit 216 is a reset signal. It is reset at the input timing of 231A to 234A. Therefore, the output of the oscillator 204 stops at this timing.
  • the tuning circuit 202 is connected between the terminal 72 and the input terminal 210 and determines the oscillation frequency of the oscillation unit 204.
  • the tuning circuit 202 is substantially the same circuit as the tuning circuit 40 described in the first embodiment, and the difference will be mainly described.
  • the capacitors 221A and 221B are connected in series between the power source 70 and the terminal 72.
  • a connection point between the capacitor 221A and the capacitor 221B is connected to the input terminal 210 of the amplifying unit 203.
  • the tuning circuit 202 is connected between the input of the comparator 211 constituting the amplification unit 203 and the collector (output) of the transistor 214, so that the oscillation unit 204 self-oscillates.
  • a capacitor 222A is connected between the other terminal of switching unit 71E and terminal 72.
  • a capacitor 222B is connected between the other terminal of the switching unit 71F and the terminal 72, and a capacitor 222C is connected between the other terminal of the switching unit 71G and the terminal 72.
  • a capacitor 222D is connected between the other terminal of the switching unit 71H and the terminal 72! /.
  • Capacitors 222A to 222D correspond to capacitors 73A to 73D in the first embodiment, respectively.
  • a series body of capacitors 221A and 221B is connected in parallel between the power supply 70 and the terminal 72.
  • the values of capacitors 222A to 222D are smaller than the values of capacitors 73A to 73D in the first embodiment. Therefore, the tuning frequency is substantially the same as the tuning circuit 40 in the first embodiment.
  • switching of the switching units 71A to 71K is switched by the switching control unit 205.
  • This switching timing is the same as the switching timing of the switching control unit 39 described in the first embodiment.
  • the switching control unit 205 that switches the signal output from the oscillating unit 204 a plurality of times within the time when the coin 20 passes the sensors 25 and 26 is provided. Since the switching control unit 205 switches the signal output from the oscillation unit 204 at a high speed while the coin 20 passes the sensors 25 and 26, a plurality of features in the same part of the coin 20 are mutually switched. Can detect the relationship. Therefore, the identification circuit 47 can perform accurate identification of the coin 20 including the feature of the correlation in the same part.
  • the switching control unit 205 is used to switch the sensors 25 and 26 between in-phase connection for detecting the material of the coin 20 and reverse-phase connection for detecting the material thickness of the coin 20,
  • the 201 can be downsized and the price can be reduced.
  • the frequency divider 38 and the like are not necessary, and the configuration can be configured with fewer parts compared to the first embodiment. .
  • the configuration can be configured with fewer parts compared to the first embodiment. .
  • by always oscillating at the tuning frequency a stable tuning state can be maintained and accurate identification is possible.
  • the same configuration as that of the third switching unit 93 shown in FIG. 6 is applied to one or more of the capacitors 71E to 71H, 221A, and 221B, and the capacitors 71E to 71E 7 It may be switched to a capacitor having a different capacitance from 1H, 221A, and 221B.
  • the oscillation frequency of the oscillation unit 204 changes, and the same effect as in the second embodiment can be obtained.
  • the configuration for identifying the material of the coin 20A made of a plurality of metals by changing the oscillation frequency in this way is applied to a coin identification device that does not switch the magnetic connection of the sensor 25 and the sensor 26. Moyo! /
  • the waveform of the envelope is formed by the shaping unit 94 (detection circuit 45), but the present invention is not limited to this.
  • the coin 20 can be identified by detecting the output voltage immediately before resetting the detection circuit 45 or the peak value of the output voltage at the measurement interval.
  • the coin discriminating device according to the present invention is useful as a coin discriminating device mounted on a vending machine or the like because it can detect and accurately discriminate the mutual relationship between the material and thickness of coins at almost the same position. .

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  • Testing Of Coins (AREA)

Abstract

A coin identification device has a detection section, a first switchover section, a storage section, and a control section. The detection section has a first sensor including a pair of coils and an oscillation circuit, receives electric power supply from the power source, and outputs a detection signal that varies when a coin passes between the coils. The first switchover section changes magnetic connection of the coils multiple times between an in-phase connection and a reverse phase connection while the coin passes the coils. The control section determines the authenticity of the coin by comparing the detection signal from the detection section and a reference signal stored in the storage section.

Description

明 細 書  Specification
硬貨識別装置  Coin identification device
技術分野  Technical field
[0001] 本発明は、自動販売機等に搭載される硬貨識別装置に関する。  [0001] The present invention relates to a coin identifying device mounted on a vending machine or the like.
背景技術  Background art
[0002] 図 21は従来の硬貨識別装置の概略構成を示す正面透視図である。この硬貨識別 装置は、筐体 1と、投入口 3と、通路 4と、 3つのセンサ 5、 6、 7と、ゲート 8と、返却通 路 9と、振り分け通路 10と、識別部 11と、収納筒 12とを有する。硬貨 2を受け入れる ための投入口 3は筐体 1の上方に設けられ、通路 4は投入口 3に連結されるとともに 下方に傾斜して設けられている。センサ 5、 6、 7は通路 4の側壁面に設けられている 。ゲート 8は通路 4の終端に設けられている。返却通路 9はゲート 8の一方に連結され 、振り分け通路 10はゲート 8の他方に連結されている。収納筒 12には振り分け通路 1 0により振り分けられた硬貨 2が収納される。識別部 11にはセンサ 5、 6、 7の出力が供 る。  FIG. 21 is a front perspective view showing a schematic configuration of a conventional coin identifying device. This coin discriminating device includes a casing 1, an insertion slot 3, a passage 4, three sensors 5, 6, 7, a gate 8, a return passage 9, a sorting passage 10, an identification portion 11, And a storage cylinder 12. A slot 3 for receiving the coin 2 is provided above the casing 1, and the passage 4 is connected to the slot 3 and is inclined downward. The sensors 5, 6 and 7 are provided on the side wall surface of the passage 4. Gate 8 is provided at the end of passage 4. The return passage 9 is connected to one side of the gate 8, and the distribution passage 10 is connected to the other side of the gate 8. The storage cylinder 12 stores the coins 2 distributed by the distribution passage 10. The identification unit 11 is provided with the outputs of sensors 5, 6, and 7.
[0003] 以上のように構成された硬貨識別装置の動作を以下に説明する。投入口 3に投入 された硬貨 2は、通路 4を転動する。その途中において、センサ 5が硬貨 2の凹凸を検 知し、センサ 6が硬貨 2の材質を検知し、センサ 7が硬貨 2の厚みを検知する。センサ 5、 6、 7は検知した硬貨 2の特徴を識別部 11に伝達する。これらの特徴を基に識別 部 11は硬貨 2の真贋と金種とを識別する。そして、その識別結果に基づいて、偽貨 はゲート 8から返却通路 9へ導かれる。また、真貨はゲート 8から振り分け通路 10へ導 かれ、金種別に収納筒 12へ収納される。このような硬貨識別装置は例えば、本願発 明者らによる特許文献 1に開示されてレ、る。  [0003] The operation of the coin discriminating apparatus configured as described above will be described below. Coin 2 thrown into slot 3 rolls in passage 4. In the middle, sensor 5 detects the unevenness of coin 2, sensor 6 detects the material of coin 2, and sensor 7 detects the thickness of coin 2. The sensors 5, 6, and 7 transmit the detected characteristics of the coin 2 to the identification unit 11. Based on these characteristics, the identification unit 11 identifies the authenticity and denomination of the coin 2. Then, based on the identification result, the counterfeit coin is guided from the gate 8 to the return passage 9. Further, the true coin is led from the gate 8 to the sorting passage 10 and stored in the storage cylinder 12 according to denomination. Such a coin identification device is disclosed in, for example, Patent Document 1 by the inventors of the present application.
[0004] このように従来の硬貨識別装置では、専用のセンサ 5、 6、 7が、硬貨 2の凹凸と材 質と厚みの特徴を得るために独立して装着されている。センサ 5、 6、 7は、通路 4の 上流側から順に取り付けられていて、同一場所にこれらのうちの 2つを取り付けること はできない。したがって、硬貨 2の凹凸と材質と厚みとはそれぞれ異なる場所におい て、関連付けられることなくそれぞれ独立に検出される。そのため、硬貨 2の同一部 位における凹凸 ·材質 ·厚み相互間の関係を検知することは困難であり、硬貨 2の精 密な識別には限界がある。 As described above, in the conventional coin discriminating apparatus, the dedicated sensors 5, 6, and 7 are independently mounted to obtain the unevenness, material, and thickness characteristics of the coin 2. Sensors 5, 6, and 7 are installed sequentially from the upstream side of passage 4, and two of these cannot be installed at the same location. Therefore, the unevenness, material and thickness of the coin 2 are detected independently without being associated with each other at different locations. Therefore, the same part of coin 2 It is difficult to detect the relationship between unevenness, material, and thickness at the position, and there is a limit to the precise identification of coins 2.
特許文献 1 :特開 2006— 59139号公報  Patent Document 1: JP-A-2006-59139
発明の開示  Disclosure of the invention
[0005] 本発明は、硬貨の同一部位における 2つの特徴の相互関係をも検出することがで きる硬貨識別装置である。本発明の硬貨識別装置は検出部と、第 1切替部と、記憶 部と、制御部とを有する。検出部は一組のコイルを含む第 1センサと、発振回路と、を 有し、電源から電圧供給されるとともにコイルの間を硬貨が通過することによって変化 する検出信号を出力する。第 1切替部は硬貨がコイルの間を通過する間にコイルの 磁気的接続を同相接続と逆相接続とに複数回切り換える。制御部は検出部からの検 出信号と記憶部に記憶された基準信号とを比較することにより硬貨の真贋と種別とを 判定する。このように硬貨がコイルの間を通過する間に第 1切替部がコイルの磁気的 接続を同相接続と逆相接続とに複数回切り換えるため、硬貨の同一部位における複 数の特徴の相互関係を検出することができる。  [0005] The present invention is a coin discriminating apparatus that can also detect the mutual relationship between two features in the same part of a coin. The coin identification device of the present invention includes a detection unit, a first switching unit, a storage unit, and a control unit. The detection unit includes a first sensor including a pair of coils and an oscillation circuit, and is supplied with a voltage from a power supply and outputs a detection signal that changes as a coin passes between the coils. The first switching unit switches the magnetic connection of the coil between the in-phase connection and the reverse-phase connection multiple times while the coin passes between the coils. The control unit determines the authenticity and type of the coin by comparing the detection signal from the detection unit with the reference signal stored in the storage unit. In this way, since the first switching unit switches the magnetic connection of the coil between the in-phase connection and the reverse-phase connection a plurality of times while the coin passes between the coils, the correlation between the features of the same part of the coin can be established. Can be detected.
図面の簡単な説明  Brief Description of Drawings
[0006] [図 1]図 1は本発明の実施の形態 1における硬貨識別装置の概略構成を示す正面透 視図である。  FIG. 1 is a front perspective view showing a schematic configuration of a coin identifying device according to Embodiment 1 of the present invention.
[図 2]図 2は本発明の実施の形態 1〜4における硬貨識別装置の構成を単純化して 説明するためのブロック図である。  [FIG. 2] FIG. 2 is a block diagram for simplifying and explaining the configuration of the coin identifying device according to the first to fourth embodiments of the present invention.
[図 3]図 3は図 2に示す硬貨識別装置を構成する第 1センサの第 1の状態を示す断面 図である。  FIG. 3 is a cross-sectional view showing a first state of the first sensor constituting the coin identifying device shown in FIG.
[図 4]図 4は図 3に示す第 1センサの第 2の状態を示す断面図である。  FIG. 4 is a sectional view showing a second state of the first sensor shown in FIG.
[図 5]図 5は図 2に示す第 1切替部と第 1センサとの接続構成を示す回路図である。  FIG. 5 is a circuit diagram showing a connection configuration between the first switching unit and the first sensor shown in FIG. 2.
[図 6]図 6は図 2に示す第 3切替部、第 1センサ、コンデンサ群の接続構成を示す回路 図である。  FIG. 6 is a circuit diagram showing the connection configuration of the third switching unit, the first sensor, and the capacitor group shown in FIG.
[図 7]図 7は図 2に示す硬貨識別装置の第 1、第 2センサから出力される出力波形図 である。  FIG. 7 is an output waveform diagram output from the first and second sensors of the coin discriminating apparatus shown in FIG.
[図 8]図 8は図 7に示す各波形を拡大して示すとともに各部の出力信号波形を示す図 である。 [FIG. 8] FIG. 8 is an enlarged view of each waveform shown in FIG. 7 and shows the output signal waveform of each part. It is.
園 9]図 9は本発明の実施の形態 1における硬貨識別装置のブロック図である。 9] FIG. 9 is a block diagram of the coin identifying device according to the first exemplary embodiment of the present invention.
園 10]図 10は図 9における同調回路と検出回路とその近傍の回路図である。 10] FIG. 10 is a circuit diagram of the tuning circuit and the detection circuit in FIG. 9 and the vicinity thereof.
[図 11]図 11は図 10におけるスイッチング部である電子スィッチの回路図である。 FIG. 11 is a circuit diagram of an electronic switch which is a switching unit in FIG.
[図 12]図 12は硬貨の材質の相違による同調特性図である。 [FIG. 12] FIG. 12 is a tuning characteristic diagram according to the difference in coin material.
[図 13]図 13は硬貨の厚さの相違による同調特性図である。 [FIG. 13] FIG. 13 is a tuning characteristic diagram according to the difference in coin thickness.
園 14]図 14は本発明の実施の形態 2における識別対象である硬貨の断面図である。 14] FIG. 14 is a cross-sectional view of a coin to be identified in the second embodiment of the present invention.
[図 15]図 15は図 14に示す硬貨の上面からの深さに対する同調回路の出力電圧の 変化を示す特性図である。 FIG. 15 is a characteristic diagram showing a change in the output voltage of the tuning circuit with respect to the depth from the upper surface of the coin shown in FIG.
園 16]図 16は本発明の実施の形態 3における硬貨識別装置の同調回路の一部を示 す回路図である。 16] FIG. 16 is a circuit diagram showing a part of the tuning circuit of the coin discriminating apparatus according to Embodiment 3 of the present invention.
園 17]図 17は本発明の実施の形態 4における硬貨識別装置のブロック図である。 17] FIG. 17 is a block diagram of a coin identifying device according to Embodiment 4 of the present invention.
[図 18]図 18は図 17における発振部の回路図である。 FIG. 18 is a circuit diagram of the oscillation unit in FIG.
園 19]図 19は図 17に示す硬貨識別装置の第 1、第 2センサから出力される出力波形 と各部の出力信号波形を示す図である。 19] FIG. 19 is a diagram showing output waveforms output from the first and second sensors of the coin discriminating apparatus shown in FIG. 17 and output signal waveforms of each part.
園 20]図 20は実施の形態 1、 4に適用する緩衝回路の一例を示す回路図である。 FIG. 20 is a circuit diagram showing an example of a buffer circuit applied to the first and fourth embodiments.
[図 21]図 21は従来の硬貨識別装置の概略構成を示す正面透視図である。 FIG. 21 is a front perspective view showing a schematic configuration of a conventional coin identifying device.
符号の説明 Explanation of symbols
20, 20A 硬貨  20, 20A coin
21 , 201 硬貨識別装置  21, 201 Coin identification device
22 筐体  22 Enclosure
23 投入口  23 slot
24 通路  24 passage
24A スナバ  24A snubber
25 第 1センサ  25 1st sensor
26 第 2センサ  26 Second sensor
27 ゲート  27 Gate
28 返却通路 振り分け通路 28 Return passage Distribution passage
収納筒  Storage cylinder
水晶振動子 Crystal oscillator
, 206 マイクロコンピュータ , 206 Microcomputer
発振器  Oscillator
分周器 Divider
, 205 切替制御部, 205 Switching control unit
, 202 同調回路, 202 Tuning circuit
A, 41B, 43A, 43B コアA, 41B, 43A, 43B core
A, 42B, 44A, 44B コィノレ A, 42B, 44A, 44B
検出回路  Detection circuit
アナログ.デジタル変換器 (A/Dコンパ 識別回路  Analog to digital converter (A / D comparator identification circuit
出力端子  Output terminal
記憶部 Storage
A, 50B 磁力線A, 50B Magnetic field lines
, 53, 54, 55 出力波形, 53, 54, 55 Output waveform
A, 53A, 54A, 55A 波形レべノレ A 時刻A, 53A, 54A, 55A Waveform Renore A Time
, 62, 63, 64 日寺間帯, 62, 63, 64
A, 62A, 63A, 64A 信号A, 62A, 63A, 64A signal
B, 62B, 63B, 64B 信号B, 62B, 63B, 64B signal
C, 62C, 63C, 64C リセッ卜信号D, 62D, 63D, 64D 信号C, 62C, 63C, 64C Reset signal D, 62D, 63D, 64D signal
, 76 入力端子 A, 67B, 67C 抵抗, 76 Input terminal A, 67B, 67C Resistor
D, 67E, 67F, 67G 抵抗 A, 68B, 68C, 68D スィッチング部 オフセット切替回路D, 67E, 67F, 67G resistors A, 68B, 68C, 68D Switching section Offset switching circuit
, 84 電源, 84 Power
A, 71B, 71C, 71D スィッチング部E, 71F, 71G, 71H スィッチング部J, 71K スイッチング部A, 71B, 71C, 71D Switching section E, 71F, 71G, 71H Switching section J, 71K Switching section
, 80 端子 , 80 terminals
A 結合コンデンサA coupling capacitor
1 , 732 コンデンサ群1, 732 capacitors
A, 73B, 73C, 73D コン サ ピークホールド回路 A, 73B, 73C, 73DConsole Peak hold circuit
リセット回路  Reset circuit
ゲイン切替回路 Gain switching circuit
A オペアンプA operational amplifier
A, 78B, 78C, 78D, 78E 抵抗A, 79B, 79C, 79D スィッチン 入力端子 A, 83B, 83C, 83D, 83E 抵抗A, 85B Nチャンネル FETA, 78B, 78C, 78D, 78E Resistor A, 79B, 79C, 79D Switch input terminal A, 83B, 83C, 83D, 83E Resistor A, 85B N-channel FET
A, 86B 端子 A, 86B terminals
発振回路  Oscillator circuit
第 1切替部  1st switching part
第 2切替部  Second switching part
第 3切替部  3rd switching part
整形部  Shaping department
制御部  Control unit
検出部 103， 104， 105, 106, 107Detection unit 103, 104, 105, 106, 107
113, 114, 115， 116, 117113, 114, 115, 116, 117
118, 119, 120 特性曲線 118, 119, 120 Characteristic curve
131 表面材  131 Surface material
132 中心材  132 Core material
133, 134 特性曲線  133, 134 Characteristic curve
151 回路  151 circuit
152, 157 端子  152, 157 terminals
154A, 154B スィッチング咅 154A, 154B Switching 咅
156, 158 コンデンサ 156, 158 capacitors
203 増幅部  203 Amplifier
204 発振部  204 Oscillator
210 入力端子  210 Input terminal
211 コンノ レータ  211 Contortor
21 1A マイナス入力端子  21 1A Negative input terminal
21 1B プラス入力端子  21 1B Positive input terminal
211C 出力端子  211C output terminal
212A, 212B, 212C, 212D, 212E 212A, 212B, 212C, 212D, 212E
212F, 212G, 212H, 212J 抵抗212F, 212G, 212H, 212J Resistor
213 コンデンサ 213 capacitor
214 トランジスタ  214 transistors
215 出力端子  215 output terminal
216 ジセッ卜回路  216 Discharge circuit
216A 入力端子  216A input terminal
216B トランジスタ  216B transistor
216C, 216D 抵抗  216C, 216D resistors
221A, 221B コンデンサ 221A, 221B capacitors
22A, 222B, 222C, 222D 231 , 232, 233, 234 時間帯 22A, 222B, 222C, 222D 231, 232, 233, 234 time zone
231A, 232A, 233A, 234A リセット信号  231A, 232A, 233A, 234A Reset signal
231B, 232B, 233B, 234B 信号  231B, 232B, 233B, 234B signal
231C, 232C, 233C, 234C 信号  231C, 232C, 233C, 234C signal
241 オペアンプ  241 operational amplifier
242 抵抗  242 resistance
243 コンデンサ  243 capacitors
244 ボノレテージフォロア  244 Bonoretage Follower
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0008] 以下、図面を参照して本発明の実施の形態を説明する。なお、各実施の形態にお いて先行する実施の形態と同様のものには同符号を付し、説明を簡略化する場合が ある。  Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that in each embodiment, the same symbols are attached to the same components as the preceding embodiments, and the description may be simplified.
[0009] (実施の形態 1)  [0009] (Embodiment 1)
図 1は、本発明の実施の形態 1における硬貨識別装置 21の概略構成を示す正面 透視図である。硬貨識別装置 21は、筐体 22と、投入口 23と、通路 24と、第 1センサ 25 (以下、センサ 25)と、第 2センサ 26 (以下、センサ 26)と、ゲート 27と、返去 P通路 2 8と、振り分け通路 29と、収納筒 30とを有する。  FIG. 1 is a front perspective view showing a schematic configuration of a coin identifying device 21 according to Embodiment 1 of the present invention. The coin identification device 21 includes a housing 22, an insertion slot 23, a passage 24, a first sensor 25 (hereinafter referred to as sensor 25), a second sensor 26 (hereinafter referred to as sensor 26), a gate 27, and a return. P passage 28, distribution passage 29, and storage cylinder 30 are provided.
[0010] 硬貨 20を受け入れるための投入口 23は筐体 22の上方に設けられ、スナバ 24Aを 介して通路 24に連結されている。通路 24は約 10° 〜； 12° の傾斜で下方に向かつ て設けられている。センサ 25、 26は通路 24の側壁面に、この順に装着されている。  [0010] An insertion port 23 for receiving the coin 20 is provided above the housing 22, and is connected to the passage 24 via a snubber 24A. The passage 24 is provided downwardly with an inclination of about 10 ° to 12 °. The sensors 25 and 26 are mounted on the side wall surface of the passage 24 in this order.
[0011] 例えば、センサ 25の直径は 8. 3mm、センサ 26の直径は 12. 5mmである。センサ  [0011] For example, the diameter of the sensor 25 is 8.3 mm, and the diameter of the sensor 26 is 12.5 mm. Sensor
25、 26は、通路 24の底面から中心までの距離が例えば、 13. 25mmになるよう装着 されている。また、センサ 25、 26の中心間は例えば、 25. Omm離れている。  25 and 26 are mounted such that the distance from the bottom surface to the center of the passage 24 is 13.25 mm, for example. Further, the centers of the sensors 25 and 26 are, for example, 25.Omm apart.
[0012] ゲート 27は通路 24の終端に設けられ、硬貨 20を真贋により振り分ける。偽貨が導 かれる返却通路 28はゲート 27の一方に連結され、真貨が導かれる振り分け通路 29 はゲート 27の他方に連結されている。収納筒 30は振り分け通路 29に連結され、振り 分け通路 29により振り分けられた硬貨 20を金種別に収納する。  [0012] The gate 27 is provided at the end of the passage 24, and distributes the coins 20 by authenticity. The return passage 28 through which the false coins are introduced is connected to one side of the gate 27, and the sorting passage 29 through which the true coins are introduced is connected to the other side of the gate 27. The storage cylinder 30 is connected to the distribution passage 29 and stores the coins 20 distributed by the distribution passage 29 in denominations.
[0013] 次に、図 2〜図 4を用いて硬貨識別装置 21の電気回路を中心に説明する。図 2は 硬貨識別装置 21の構成を単純化して説明するためのブロック図である。図 3、図 4は センサ 25、 26の断面図である。 Next, the electrical circuit of the coin identifying device 21 will be described mainly with reference to FIGS. Figure 2 3 is a block diagram for simplifying and explaining the configuration of the coin identifying device 21. FIG. 3 and 4 are sectional views of the sensors 25 and 26. FIG.
[0014] 図 2に示すように硬貨識別装置 21は電気回路として、センサ 25、 26と、発振回路 9 0と、 =1ンデンサ群 731、 732と、第 1切替咅 と第 2切替咅 と第 3切替咅 と、整 形部 94と、制御部 95と、記憶部 49とを有する。センサ 25とコンデンサ群 731、センサ 26とコンデンサ群 732、および発振回路 90は検出部 96を構成している。制御部 95 には基準信号が予め記憶された記憶部 49が接続されている。制御部 95は整形部 9 4を経て入力された検出信号と記憶部 49に記憶された基準信号とを比較することに より硬貨 20の真贋と種別とを判定する。  As shown in FIG. 2, the coin discriminating device 21 includes, as an electric circuit, sensors 25 and 26, an oscillation circuit 90, a first capacitor group 731 and 732, a first switching rod, a second switching rod, 3 A switching unit, a shaping unit 94, a control unit 95, and a storage unit 49 are provided. The sensor 25 and the capacitor group 731, the sensor 26 and the capacitor group 732, and the oscillation circuit 90 constitute a detection unit 96. The control unit 95 is connected to a storage unit 49 in which reference signals are stored in advance. The control unit 95 determines the authenticity and type of the coin 20 by comparing the detection signal input through the shaping unit 94 and the reference signal stored in the storage unit 49.
[0015] 次に、図 3、図 4を用いてセンサ 25、 26を説明する。センサ 25は、通路 24の両側壁 面に対向して装着されたフェライトコア 41A、 41Bに、それぞれコイル 42A、 42B力 S 巻回されて構成されている。また、センサ 26も同様に、通路 24の両側壁面に対向し て装着されたフェライトコア 43A、 43Bに、それぞれコイル 44A、 44Bが巻回されて構 成されている。以下、センサ 25、 26は基本的に同じ構成であるので、代表してセンサ 25を中心に説明する。  Next, the sensors 25 and 26 will be described with reference to FIGS. 3 and 4. The sensor 25 is configured by winding coils 42A and 42B with force S on ferrite cores 41A and 41B mounted on both side walls of the passage 24, respectively. Similarly, the sensor 26 is configured by winding coils 44A and 44B around ferrite cores 43A and 43B mounted to face both side walls of the passage 24, respectively. Hereinafter, since the sensors 25 and 26 have basically the same configuration, the sensor 25 will be described as a representative.
[0016] コイル 42Aとコイル 42Bとの磁気接続は、第 1切替部 91により直列同相接続と直列 逆相接続に切り替えられる。図 3はコイル 42Aとコイル 42Bとが直列同相接続された 場合の磁力線 50Aの様子を示している。磁力線 50Aは、通路 24中の硬貨 20を貫通 する方向に出力され、主に硬貨 20の材質の特徴を効率良く検知する。  [0016] The magnetic connection between the coil 42A and the coil 42B is switched by the first switching unit 91 between a series in-phase connection and a series anti-phase connection. Fig. 3 shows the magnetic field lines 50A when the coil 42A and the coil 42B are connected in series and in phase. The magnetic field lines 50A are output in a direction penetrating the coin 20 in the passage 24, and mainly detect the characteristics of the material of the coin 20 efficiently.
[0017] 図 4はコイル 42Aとコイル 42Bとが直列逆相接続された場合の磁力線 50Bの様子 を示している。磁力線 50Bは、通路 24中の硬貨 20で制限される方向に出力され、主 に硬貨 20の凹凸や厚みの特徴を効率良く検知する。  [0017] FIG. 4 shows the state of the magnetic lines of force 50B when the coil 42A and the coil 42B are connected in series and reverse phase. The magnetic field lines 50B are output in a direction limited by the coins 20 in the passage 24, and mainly detect the unevenness and thickness characteristics of the coins 20 efficiently.
[0018] すなわち、一組のコイル 42A、 42Bを含むセンサ 25と、発振回路 90とを有する検 出部 96は、コイル 42A、 42Bの間を硬貨 20が通過することによって変化する検出信 号を出力する。なおこのようにコイル 42Aとコイル 42Bの磁気接続を直列同相接続と 直列逆相接続に切り替えて硬貨 20の異なる情報を取得する原理については後述す  That is, the detection unit 96 having the sensor 25 including the pair of coils 42A and 42B and the oscillation circuit 90 generates a detection signal that changes as the coin 20 passes between the coils 42A and 42B. Output. The principle of acquiring different information of the coin 20 by switching the magnetic connection between the coil 42A and the coil 42B to the series in-phase connection and the series anti-phase connection in this way will be described later.
[0019] なおコイル 42Aとコイル 42Bとを直列接続している力 直列接続に限ることはなぐ 並列接続すなわち、並列同相接続と並列逆相接続とを切り替えてもよい。直列接続 をすると変化が大きく微小の変化を検出することができる。これに対して、並列接続を すれば安定した出力を検知することができる。 [0019] It should be noted that the force connecting the coil 42A and the coil 42B in series is not limited to the series connection. Parallel connection, that is, parallel in-phase connection and parallel anti-phase connection may be switched. When connected in series, changes are large and minute changes can be detected. On the other hand, stable output can be detected by parallel connection.
[0020] 前述のようにセンサ 26は、センサ 25と同様の構成であり、センサ 26の直径はセン サ 25の直径より大きい。そのため、同相接続と逆相接続とを切り替えることにより、セ ンサ 25では硬貨 20の材質の情報と凹凸情報とを、センサ 26では材質の情報と厚み 情報とをそれぞれ検知することができる。  [0020] As described above, the sensor 26 has the same configuration as the sensor 25, and the diameter of the sensor 26 is larger than the diameter of the sensor 25. Therefore, by switching between the in-phase connection and the reverse-phase connection, the sensor 25 can detect the material information and unevenness information of the coin 20, and the sensor 26 can detect the material information and thickness information.
[0021] 次に第 1切替部 91、第 3切替部 93の機能について説明する。図 5は、コイル 42A、 42Bからなるセンサ 25と第 1切替部 91を構成するスイッチング部 71A、 71Bとスイツ チング部 71Jとの接続構成を示す回路図である。スイッチング部 71Aを短絡し、スイツ チング部 71Jを図の下側に接続すると、コイル 42A、 42Bは直列同相接続される。一 方、スイッチング部 71Bを短絡し、スイッチング部 71Jを図の上側に接続すると、コィ ル 42A、 42Bは直列逆相接続される。このようにして第 1切替部 91はコイル 42A、 42 Bの磁気的接続を直列同相接続と直列逆相接続とに切り替える。同様にして第 1切 替部 91は、センサ 26におけるコイル 44A、 44Bの接続をそれぞれ直列同相接続と 直列逆相接続とに切り替える。  Next, functions of the first switching unit 91 and the third switching unit 93 will be described. FIG. 5 is a circuit diagram showing a connection configuration between the sensor 25 including the coils 42A and 42B, the switching units 71A and 71B constituting the first switching unit 91, and the switching unit 71J. When the switching unit 71A is short-circuited and the switching unit 71J is connected to the lower side of the figure, the coils 42A and 42B are connected in series and in phase. On the other hand, when the switching unit 71B is short-circuited and the switching unit 71J is connected to the upper side of the figure, the coils 42A and 42B are connected in series in reverse phase. In this way, the first switching unit 91 switches the magnetic connection of the coils 42A and 42B between the series in-phase connection and the series anti-phase connection. Similarly, the first switching unit 91 switches the connection of the coils 44A and 44B in the sensor 26 to a series in-phase connection and a series anti-phase connection, respectively.
[0022] 図 6は、コイル 42A、 42Bカゝらなるセンサ 25と、第 3切替部 93を構成するスィッチン グ部 71E、 71Fと、コンデンサ群 731に含まれるコンデンサ 73A、 73Bとの接続構成 を示す回路図である。なお簡略化のため第 1切替部 91は省略している。第 3切替部 93は、センサ 25に対して接続するコンデンサ 73A、 73Bを切り替える。コンデンサ 7 3A、 73Bは、互いに静電容量が異なり、コンデンサ群 731に含まれている。このよう にコンデンサ 73A、 73Bをそれぞれ独立に設けているので、直列同相接続と直列逆 相接続の周波数調整を容易に行なうことができる。同様に、コンデンサ群 732は 2つ のコンデンサを独立に含んでおり、第 3切替部 93はセンサ 26のコイル 44A、 44B力 S 直列同相接続の場合と直列逆相接続の場合とに応じてコンデンサを選択して切り替 えることで周波数調整を行う。このように検出部 96が互いに静電容量の異なる複数 のコンデンサ 73A、 73Bを有し、第 3切替部 93がセンサ 25またはセンサ 26に対して 接続するコンデンサ 73A、 73Bを切り替えることが好ましい。なお、コンデンサ群 731 、 732では、静電容量の異なるコンデンサで構成する以外に、静電容量の同じ複数 のコンデンサを用いて直列および/または並列に接続してもよい。すなわち第 3切替 部 93は、センサ 25、 26に接続する静電容量を同相接続、逆相接続に適した値に切 り替えればよぐコンデンサ群 731、 732の構成は限定されない。 FIG. 6 shows a connection configuration of the sensor 25 including the coils 42A and 42B, the switching units 71E and 71F configuring the third switching unit 93, and the capacitors 73A and 73B included in the capacitor group 731. FIG. Note that the first switching unit 91 is omitted for simplification. The third switching unit 93 switches the capacitors 73A and 73B connected to the sensor 25. The capacitors 73 A and 73 B have different electrostatic capacities, and are included in the capacitor group 731. Since the capacitors 73A and 73B are provided independently as described above, the frequency adjustment of the series in-phase connection and the series anti-phase connection can be easily performed. Similarly, the capacitor group 732 includes two capacitors independently, and the third switching unit 93 includes capacitors 44A and 44B force S of the sensor 26 according to the series in-phase connection and the series anti-phase connection. Select and switch to adjust the frequency. Thus, it is preferable that the detection unit 96 includes a plurality of capacitors 73A and 73B having different capacitances, and the third switching unit 93 switches the capacitors 73A and 73B connected to the sensor 25 or the sensor 26. Capacitor group 731 732 may be connected in series and / or in parallel using a plurality of capacitors having the same capacitance, in addition to the capacitors having different capacitances. That is, the configuration of the capacitor groups 731 and 732 is not limited as long as the third switching unit 93 switches the capacitance connected to the sensors 25 and 26 to a value suitable for in-phase connection and reverse-phase connection.
[0023] なお、第 3切替部 93はセンサ 26のコイル 44A、 44Bが直列同相接続の場合と直列 逆相接続の場合とに応じてコンデンサを選択して切り替えることで周波数調整を行う 以外に、センサ 26のコイル 44A、 44Bの接続を変えないでコンデンサを選択して切り 替えて周波数を変えてもよい。すなわち第 3切替部 93による周波数調整は、第 1切 替部 91によるコイル 44A、 44Bの同相接続と逆相接続との切り替えと同時に動作さ せることには限定されない。周波数を変化させるだけでも、異なる複数の硬貨特性を 検出すること力 Sでさる。 [0023] Note that the third switching unit 93 performs frequency adjustment by selecting and switching a capacitor depending on whether the coils 44A and 44B of the sensor 26 are connected in series in-phase or in series. The frequency may be changed by selecting and switching the capacitor without changing the connection of the coils 44A and 44B of the sensor 26. That is, the frequency adjustment by the third switching unit 93 is not limited to the operation at the same time when the first switching unit 91 switches the in-phase connection and the reverse-phase connection of the coils 44A and 44B. Even by changing the frequency, the force S can be used to detect different coin characteristics.
[0024] 次に第 2切替部 92の機能について説明する。第 2切替部 92は、センサ 25、 26を含 む検出部 96から出力される検出信号を切り替えて整形部 94を介して制御部 95に送 る役割を果たす。  Next, the function of the second switching unit 92 will be described. The second switching unit 92 plays a role of switching the detection signal output from the detection unit 96 including the sensors 25 and 26 and sending it to the control unit 95 via the shaping unit 94.
[0025] 次に、このように構成された硬貨識別装置 21における識別方法の一例について説 明する。図 7は、硬貨 20がコイル 42A、 42B間およびコイル 44A、 44Bを通過する時 におけるセンサ 25、 26の出力を検波してその出力を平滑した包絡線波形である。出 力波形 52は、センサ 25のコイル 42A、 42Bを直列同相接続した場合に得られ、出力 波形 53は、コイル 42A、 42Bを直列逆相接続した場合に得られる。また、出力波形 5 4は、センサ 26のコイル 44A、 44Bを直列同相接続した場合に得られ、出力波形 55 は、コイル 44A、 44Bを直列逆相接続した場合に得られる。  Next, an example of an identification method in the coin identification device 21 configured as described above will be described. FIG. 7 shows an envelope waveform obtained by detecting the outputs of the sensors 25 and 26 when the coin 20 passes between the coils 42A and 42B and the coils 44A and 44B, and smoothing the outputs. The output waveform 52 is obtained when the coils 42A and 42B of the sensor 25 are connected in series and in phase, and the output waveform 53 is obtained when the coils 42A and 42B are connected in series and out of phase. The output waveform 54 is obtained when the coils 44A and 44B of the sensor 26 are connected in series and in phase, and the output waveform 55 is obtained when the coils 44A and 44B are connected in series anti-phase.
[0026] 本実施の形態では、第 1切替部 91が、コイル 42A、 42Bの接続を直列同相接続、 直列逆相接続に切り替える。また同時に第 3切替部 93は、センサ 25へコンデンサ 73 Aを接続する力、コンデンサ 73Bを接続する力、、選択して切り替える。そのため、例え ば時刻 56Aにおける硬貨 20の材質の特徴を示す直列同相接続波形レベル 52Aと、 硬貨 20の凹凸の特徴を示す直列逆相接続波形レベル 53Aとを、ほぼ同時に検出す ること力 Sでさる。  [0026] In the present embodiment, the first switching unit 91 switches the connection of the coils 42A and 42B to the series in-phase connection and the series anti-phase connection. At the same time, the third switching unit 93 selects and switches the force for connecting the capacitor 73A to the sensor 25 and the force for connecting the capacitor 73B. Therefore, for example, at time 56A, the series in-phase connection waveform level 52A indicating the characteristics of the material of the coin 20 and the series anti-phase connection waveform level 53A indicating the unevenness of the coin 20 are detected almost simultaneously with the force S. Monkey.
[0027] なお、直径 8. 3mmのセンサ 25と、直径 12. 5mmのセンサ 26とが 25. Omm離し て配置されている。したがって、センサ 25、 26間に直径 14. 60mm以上の硬貨 20が 流入すると、硬貨 20はセンサ 25、 26の双方で検知される。したがって、センサ 25で 直列同相接続波形レベル 52Aと直列逆相接続波形レベル 53Aとを検出するとともに 、センサ 26により直列同相接続波形レベル 54Aと直列逆相接続波形レベル 55Aを ほぼ同時に検出することもできる。 [0027] The sensor 25 having a diameter of 8.3 mm and the sensor 26 having a diameter of 12.5 mm are separated by 25. Omm. Are arranged. Therefore, when a coin 20 having a diameter of 14.60 mm or more flows between the sensors 25 and 26, the coin 20 is detected by both the sensors 25 and 26. Therefore, the sensor 25 can detect the series in-phase connection waveform level 52A and the series anti-phase connection waveform level 53A, and the sensor 26 can detect the series in-phase connection waveform level 54A and the series anti-phase connection waveform level 55A almost simultaneously. .
[0028] 第 1切替部 91、第 2切替部 92、第 3切替部 93における切り替え操作は、制御部 95 が行う。あるいは別に専用の切替制御をするマイコンを用意して、所定のタイミングで 第 1切替部 91、第 2切替部 92、第 3切替部 93を切り替えてもよい。  The control unit 95 performs switching operations in the first switching unit 91, the second switching unit 92, and the third switching unit 93. Alternatively, a microcomputer that performs dedicated switching control may be prepared, and the first switching unit 91, the second switching unit 92, and the third switching unit 93 may be switched at a predetermined timing.
[0029] このように本実施の形態においては、第 1切替部 91がコイル 44A、 44Bを直列同 相接続、直列逆相接続に切り替えている。そのためセンサ 26においても時刻 56Aに おける硬貨 20の材質の特徴を示す直列同相接続波形レベル 54Aと、硬貨 20の厚 みの特徴を示す直列逆相接続波形レベル 55Aをほぼ同時に検出することができる。  As described above, in the present embodiment, the first switching unit 91 switches the coils 44A and 44B to the series in-phase connection and the series anti-phase connection. Therefore, the sensor 26 can detect the series in-phase connection waveform level 54A indicating the characteristics of the material of the coin 20 at the time 56A and the series anti-phase connection waveform level 55A indicating the characteristics of the thickness of the coin 20 almost simultaneously.
[0030] したがって時刻 56Aにおいて、センサ 25の波形レベル 52A、 53Aにより、硬貨 20 の同一場所において材質と凹凸情報を検知する。この検知と同時に、センサ 26の波 形レベル 54A、 55Aにより、硬貨 20の同一場所において材質と厚み情報を検知する 。このようにセンサ 25とセンサ 26との相互の情報を検知することができる。したがって 、より精密に硬貨 20を識別することができる。  Therefore, at time 56A, the material and the unevenness information are detected at the same location of the coin 20 by the waveform levels 52A and 53A of the sensor 25. Simultaneously with this detection, the material and thickness information are detected at the same location of the coin 20 by the waveform levels 54A and 55A of the sensor 26. Thus, mutual information between the sensor 25 and the sensor 26 can be detected. Therefore, the coin 20 can be identified more precisely.
[0031] 次に図 8を用いて、第 1切替部 91による切り替えと、この切り替えによりセンサ 25、 2 6から出力される情報波形を説明する。図 8は図 7に示す各波形を拡大して示してい る。横軸のフルスパンは lmsecの時間を表している。第 1切替部 91は、この lmsecを それぞれ 250 secの 4つの時間帯 6；!〜 64に分割している。また第 2切替部 92は、 第 1切替部 91と連動して、センサ 25、 26から整形部 94への出力を切り替えている。 第 1切替部 91、第 2切替部 92が時間帯 6；!〜 64の一連の動作を繰り返すことにより、 制御部 95は整形部 94を介して連続してセンサ 25、 26の出力を順次取り込んでいる Next, switching by the first switching unit 91 and information waveforms output from the sensors 25 and 26 by this switching will be described with reference to FIG. Fig. 8 shows an enlarged view of each waveform shown in Fig. 7. The full span on the horizontal axis represents lmsec time. The first switching unit 91 divides this lmsec into four time zones 6;!-64 each of 250 sec. The second switching unit 92 switches the output from the sensors 25 and 26 to the shaping unit 94 in conjunction with the first switching unit 91. When the first switching unit 91 and the second switching unit 92 repeat a series of operations in the time zone 6;! To 64, the control unit 95 sequentially captures the outputs of the sensors 25 and 26 via the shaping unit 94. Out
〇 Yes
[0032] すなわち、時間帯 61では、センサ 25のコイル 42A、 42Bが直列同相接続され、硬 貨 20の材質の特徴が主に検知される。また、時間帯 62では、センサ 25のコイル 42 A、 42Bが直列逆相接続され、硬貨 20の凹凸が主に検知される。 [0033] 時間帯 63では、センサ 26のコイル 44A、 44Bが直列同相接続され、硬貨 20の材 質の特徴が主に検知される。また、時間帯 64では、センサ 26のコイル 44A、 44B力 S 直列逆相接続され、硬貨 20の厚みが主に検知される。 That is, in the time zone 61, the coils 42A and 42B of the sensor 25 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected. In the time zone 62, the coils 42A and 42B of the sensor 25 are connected in series in reverse phase, and the unevenness of the coin 20 is mainly detected. [0033] In the time zone 63, the coils 44A and 44B of the sensor 26 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected. In the time zone 64, the coils 44A and 44B of force S of the sensor 26 are connected in series in reverse phase, and the thickness of the coin 20 is mainly detected.
[0034] 以上のように、制御部 95は第 1切替部 91の作用により硬貨 20の同一場所におい て 1つのセンサあたり 2つの情報を受け取ることができる。これによりセンサの数を減ら しても必要な種類数の情報を取得できるとともに情報を取得する位置の同一性が高 まり、識別精度が向上する。上述のように lmsecの間に 4種類の情報を取得する場 合、硬貨 20が通路 24を通過する速度は約 0. 2m/Secなので、これらの情報を取得 する硬貨 20の位置は 0. 2mm以内の範囲となる。また第 2切替部 92を設けることに よって整形部 94を共用化できるため、回路構成を単純化でき、コスト低減に寄与するAs described above, the control unit 95 can receive two pieces of information per sensor at the same place of the coin 20 by the action of the first switching unit 91. As a result, even if the number of sensors is reduced, the necessary number of types of information can be acquired, the identity of the information acquisition positions is increased, and the identification accuracy is improved. As described above, when four types of information are acquired during lmsec, the speed at which the coin 20 passes through the passage 24 is about 0.2 m / sec, so the position of the coin 20 from which the information is acquired is 0.2 mm. Within the range. Also, since the shaping unit 94 can be shared by providing the second switching unit 92, the circuit configuration can be simplified and the cost can be reduced.
〇 Yes
[0035] 次に、具体的な回路構成の例とその動作について図 8〜図 10を用いて説明する。  Next, an example of a specific circuit configuration and its operation will be described with reference to FIGS.
図 9は硬貨識別装置 21の具体的なブロック図である。図 10は図 9における同調回路 40と検出回路 45、およびその近傍の回路図である。  FIG. 9 is a specific block diagram of the coin identification device 21. FIG. 10 is a circuit diagram of the tuning circuit 40 and the detection circuit 45 in FIG. 9 and the vicinity thereof.
[0036] 図 9において、水晶振動子 35は例えば 8MHzで発振し、マイクロコンピュータ 36内 の発振器 37に接続されている。発振器 37からはクロック信号が出力され、このクロッ ク信号は分周器 38と切替制御部 39に接続されている。すなわち、水晶振動子 35と 発振器 37と分周器 38は、図 2における発振回路 90を構成している。発振回路 90は センサ 25、 26のインダクタンス値に関わらず所定の周波数で後述の同調回路 40を 他励発振させる他励式発振回路である。  In FIG. 9, a crystal resonator 35 oscillates at, for example, 8 MHz, and is connected to an oscillator 37 in the microcomputer 36. A clock signal is output from the oscillator 37, and this clock signal is connected to the frequency divider 38 and the switching control unit 39. That is, the crystal unit 35, the oscillator 37, and the frequency divider 38 constitute the oscillation circuit 90 in FIG. The oscillation circuit 90 is a separately-excited oscillation circuit that separately oscillates a tuning circuit 40 described later at a predetermined frequency regardless of the inductance values of the sensors 25 and 26.
[0037] 分周器 38の出力はセンサ 25、 26を含んで構成された同調回路 40に接続されてい る。コィノレ 42A、 42B、 44A、 44Bは、コンデンサ 73A〜73Dと接続されて同調回路 40を構成している。すなわち、同調回路 40と切替制御部 39は図 2における検出部 9 6、第 1切替部 91、第 2切替部 92を構成している。同調回路 40内の接続は、切替制 御部 39の出力で電子的に切り替えられる。また、分周器 38の分周比は切替制御部 39の出力を基に切り替えられる。  The output of the frequency divider 38 is connected to a tuning circuit 40 including the sensors 25 and 26. The coinlets 42A, 42B, 44A, and 44B are connected to capacitors 73A to 73D to form a tuning circuit 40. That is, the tuning circuit 40 and the switching control unit 39 constitute the detection unit 96, the first switching unit 91, and the second switching unit 92 in FIG. The connection in the tuning circuit 40 is electronically switched by the output of the switching control unit 39. Further, the frequency division ratio of the frequency divider 38 is switched based on the output of the switching control unit 39.
[0038] 同調回路 40の出力は検出回路 45に入力される。検出回路 45は、検波回路と、ピ ークホールド回路と、このピークホールド回路をリセットするリセット回路とを内蔵して いる。検出回路 45内のリセット回路は切替制御部 39の出力でリセットされる。検出回 路 45の出力は、アナログ 'デジタル変換器 (A/Dコンバータ） 46を介して識別回路 4 7に接続されている。検出回路 45のピークホールド回路とリセット回路、および A/D コンバータ 46は同調回路 40からの検出信号を整形して包絡線波形を識別回路 47 に対して出力する。これらは図 2における整形部 94を構成している。 The output of the tuning circuit 40 is input to the detection circuit 45. The detection circuit 45 includes a detection circuit, a peak hold circuit, and a reset circuit that resets the peak hold circuit. Yes. The reset circuit in the detection circuit 45 is reset by the output of the switching control unit 39. The output of the detection circuit 45 is connected to an identification circuit 47 through an analog / digital converter (A / D converter) 46. The peak hold circuit and reset circuit of the detection circuit 45, and the A / D converter 46 shape the detection signal from the tuning circuit 40 and output an envelope waveform to the discrimination circuit 47. These constitute the shaping unit 94 in FIG.
[0039] 識別回路 47の出力は出力端子 48に接続されている。出力端子 48からは、投入さ れた硬貨 20の真贋と金種とを示すデータが出力される。すなわち、識別回路 47と切 替制御部 39は図 2における制御部 95を構成している。なお分周器 38と同調回路 40 との間で接続されたオフセット切替回路 69については後述する。  The output of the identification circuit 47 is connected to the output terminal 48. From the output terminal 48, data indicating the authenticity and denomination of the inserted coin 20 is output. That is, the identification circuit 47 and the switching control unit 39 constitute the control unit 95 in FIG. The offset switching circuit 69 connected between the frequency divider 38 and the tuning circuit 40 will be described later.
[0040] 次に、再び図 8を用いて分周器 38、同調回路 40、切替制御部 39、検出回路 45か らのそれぞれの出力とそれらの関係について説明する。分周器 38の分周比は切替 制御部 39によって切り替えられる。そして分周器 38は異なる周波数の信号 61A〜6 4Aを出力する。分周器 38は時間帯 61の間、例えば周波数 100kHzの信号 61Aを コイル 42A、 42Bに出力するように分周比を切り替える。  Next, the respective outputs from the frequency divider 38, the tuning circuit 40, the switching control unit 39, and the detection circuit 45 and their relationship will be described with reference to FIG. 8 again. The frequency division ratio of the frequency divider 38 is switched by the switching control unit 39. The frequency divider 38 outputs signals 61A to 64A having different frequencies. The frequency divider 38 switches the frequency division ratio so as to output a signal 61A having a frequency of 100 kHz to the coils 42A and 42B during the time zone 61, for example.
[0041] 以下同様に、分周器 38は時間帯 62の間、分周比を切り替えて、例えば周波数 12 0kHzの信号 62Aをコイル 42A、 42Bに出力する。時間帯 63の間、分周比を切り替 えて、例えば周波数 170kHzの信号 63Aをコイル 44A、 44Bに出力し、時間帯 64の 間、例えば周波数 2151^^½の信号64八をコィル44八、 44Bに出力する。  Similarly, the frequency divider 38 switches the frequency division ratio during the time zone 62 and outputs, for example, a signal 62A having a frequency of 120 kHz to the coils 42A and 42B. During the time zone 63, the frequency division ratio is switched, for example, a signal 63A with a frequency of 170 kHz is output to the coils 44A and 44B, and a signal 64 with a frequency 2151 Output to.
[0042] 信号 61A〜64Aを受けて、同調回路 40は時間帯 6；!〜 64においてそれぞれ信号  [0042] Upon receiving signals 61A-64A, tuning circuit 40 receives signals in time zone 6;! -64, respectively.
61B〜64Bを出力する。なお図に示すように同調回路 40の動作が安定し、その出力 が略一定になるまで約 100 secかかる。  61B to 64B are output. As shown in the figure, it takes about 100 seconds until the operation of the tuning circuit 40 becomes stable and its output becomes substantially constant.
[0043] 切替制御部 39は、各時間帯 6；!〜 64の終端において 50 secのリセット信号 61C 〜64Cをそれぞれ出力する。これらのリセット信号を基に、検出回路 45内のピークホ 一ルド回路はリセットされる。  [0043] The switching control unit 39 outputs reset signals 61C to 64C of 50 sec at the end of each time zone 6;! To 64, respectively. Based on these reset signals, the peak hold circuit in the detection circuit 45 is reset.
[0044] 検出回路 45は、同調回路 40から出力された信号 61B〜64Bを検波してピークホ 一ルドし、信号 61D〜64Dを出力する。検出回路 45はリセット回路を有しているので 、各時間帯 6；!〜 64の終端においてリセット信号 61C〜64Cを用いてリセットし、前の 時間における影響を受けないようにしている。 A/Dコンバータ 46は信号 61D〜64 Dをデジタル量に変換して、識別回路 47へ供給する。 [0044] The detection circuit 45 detects the signals 61B to 64B output from the tuning circuit 40, peaks them, and outputs the signals 61D to 64D. Since the detection circuit 45 has a reset circuit, it is reset by using the reset signals 61C to 64C at the end of each time zone 6;! To 64 so as not to be affected by the previous time. A / D converter 46 signals 61D to 64 D is converted into a digital quantity and supplied to the identification circuit 47.
[0045] 硬貨 20がセンサ 25、 26を通過する時間はそれぞれ約 100msecである。したがつ て、 1枚の硬貨 20についてセンサ 25、 26は、それぞれ 100ポイントの異なる場所に おける特徴を順次抽出する。本実施の形態では、同相接続と逆相接続の切り替えと 、センサ 25、 26の切り替えを切替制御部 39で切り替えて、 100msec間に 400個の 特徴データを取得する。すなわち、切替制御部 39で 400回の切り替え（100ポイント X 2 X 2)を行なって!/、る。このように切替制御部 39が頻繁に切り替えを行って!/、るた め、識別回路 47は硬貨 20が投入されてからセンサ 25、 26の位置まで来るタイミング を計らなくても硬貨 20の識別に必要な特徴データを取得することができる。すなわち 切替制御部 39と識別回路 47とが連動しなくてもよい。  [0045] The time for the coin 20 to pass the sensors 25 and 26 is about 100 msec. Therefore, for each coin 20, the sensors 25 and 26 sequentially extract features at different points of 100 points each. In the present embodiment, switching between the in-phase connection and the reverse-phase connection and switching of the sensors 25 and 26 are switched by the switching control unit 39, and 400 feature data are acquired in 100 msec. That is, the switching control unit 39 performs 400 switching (100 points X 2 X 2)! Thus, since the switching control unit 39 frequently switches! /, Therefore, the identification circuit 47 can identify the coin 20 even if the timing to reach the position of the sensors 25 and 26 after the coin 20 is inserted is not measured. Feature data required for That is, the switching control unit 39 and the identification circuit 47 do not have to be linked.
[0046] 本実施の形態ではセンサ 25で硬貨 20の凹凸と材質とを検知し、センサ 26で硬貨 2 0の厚みと材質とを検知して精密に硬貨 20を識別している。しかし、 1個のセンサの みであっても、このセンサを同相接続と逆相接続との切り替えにより、硬貨 20の凹凸 または厚みと材質とを識別することができる。以下、 1個のセンサを用いた場合に必 要な切り替え回数につ!/、て述べる。  In the present embodiment, the unevenness and material of the coin 20 are detected by the sensor 25, and the thickness and material of the coin 20 are detected by the sensor 26, so that the coin 20 is accurately identified. However, even with only one sensor, the unevenness or thickness of the coin 20 and the material can be identified by switching the sensor between in-phase connection and reverse-phase connection. The following describes the number of switching required when using one sensor!
[0047] 切替制御部 39による切り替えが遅いと硬貨 20の精密な特徴を検知することができ ない。少なくとも 1個のセンサについて、異なる 5ポイント以上の場所における硬貨 20 の特徴を取得する必要がある。さらに同相接続と逆相接続との切り替えを考慮すると 、硬貨 20の通過時間内に 10回以上の切り替えが必要となる。また、切替制御部 39 による切り替えは、早いほど精密な検知情報を取得することができる。しかし、必要以 上に早くすることはマイクロコンピュータ 36への負担を重くすることになる。以上から 切替制御部 39による切り替えは 1個のセンサについて 10回〜 1000回が好ましい。  [0047] If the switching by the switching control unit 39 is slow, precise features of the coin 20 cannot be detected. For at least one sensor, it is necessary to acquire the characteristics of coins 20 at different points of 5 points or more. Furthermore, when switching between in-phase connection and reverse-phase connection is considered, it is necessary to switch 10 times or more within the transit time of the coin 20. In addition, the faster the switching by the switching control unit 39, the more accurate detection information can be acquired. However, making it faster than necessary increases the burden on the microcomputer 36. From the above, the switching by the switching control unit 39 is preferably 10 to 1000 times for one sensor.
[0048] 次に図 10を用いて、より具体的な回路構成を説明する。トランジスタ 66のコレクタと 電源 70との間には、同調回路 40が接続されている。入力端子 65は分周器 38の出 力に接続されるとともに、抵抗 67Aを介してトランジスタ 66のベースに接続されている 。トランジスタ 66のベースとグランドとの間には抵抗 67Bが接続されており、トランジス タ 66のェミッタには、オフセット切替回路 69が接続されている。同調回路 40の出力 は端子 72を介して検出回路 45に入力される。 [0049] 次に同調回路 40について説明する。電源 70には、スイッチング部 71A〜71Dの 一方の端子が全て接続されている。スイッチング部 71Aの他方の端子は、スィッチン グ部 71Eの一方の端子とスイッチング部 71Jの一方の選択端子とコイル 42Aの他方 の端子に接続されている。スイッチング部 71Jの共通端子はコイル 42Bの他方の端子 に接続されており、コイル 42Bの一方の端子は、トランジスタ 66のコレクタに接続され た端子 72に接続されている。また、スイッチング部 71Eの他方の端子はコンデンサ 7 3Aを介して端子 72に接続されている。 Next, a more specific circuit configuration will be described with reference to FIG. A tuning circuit 40 is connected between the collector of the transistor 66 and the power source 70. The input terminal 65 is connected to the output of the frequency divider 38 and is connected to the base of the transistor 66 through the resistor 67A. A resistor 67B is connected between the base of the transistor 66 and the ground, and an offset switching circuit 69 is connected to the emitter of the transistor 66. The output of the tuning circuit 40 is input to the detection circuit 45 via the terminal 72. Next, the tuning circuit 40 will be described. One terminal of each of the switching units 71A to 71D is connected to the power source 70. The other terminal of the switching unit 71A is connected to one terminal of the switching unit 71E, one selection terminal of the switching unit 71J, and the other terminal of the coil 42A. The common terminal of the switching unit 71J is connected to the other terminal of the coil 42B, and one terminal of the coil 42B is connected to the terminal 72 connected to the collector of the transistor 66. The other terminal of the switching unit 71E is connected to the terminal 72 via the capacitor 73A.
[0050] スイッチング部 71Bの他方の端子は、コイル 42Aの一方の端子とスイッチング部 71 Jの他方の選択端子とスイッチング部 71Fの一方の端子に接続されている。また、スィ ツチング部 71Fの他方の端子はコンデンサ 73Bを介して端子 72に接続されている。  [0050] The other terminal of the switching unit 71B is connected to one terminal of the coil 42A, the other selection terminal of the switching unit 71J, and one terminal of the switching unit 71F. The other terminal of the switching unit 71F is connected to the terminal 72 via the capacitor 73B.
[0051] スイッチング部 71Cの他方の端子は、スイッチング部 71Gの一方の端子とスィッチ ング部 71Kの一方の選択端子とコイル 44Aの他方の端子に接続されている。スイツ チング部 71Kの共通端子は、コイル 44Bの他方の端子に接続されており、コイル 44 Bの一方の端子は端子 72に接続されている。また、スイッチング部 71Gの他方の端 子はコンデンサ 73Cを介して端子 72に接続されている。  [0051] The other terminal of the switching unit 71C is connected to one terminal of the switching unit 71G, one selection terminal of the switching unit 71K, and the other terminal of the coil 44A. The common terminal of the switching unit 71K is connected to the other terminal of the coil 44B, and one terminal of the coil 44B is connected to the terminal 72. The other terminal of the switching unit 71G is connected to the terminal 72 via the capacitor 73C.
[0052] スイッチング部 71Dの他方の端子は、コイル 44Aの一方の端子とスイッチング部 71 Kの他方の選択端子とスイッチング部 71Hの一方の端子に接続されている。また、ス イッチング部 71Hの他方の端子はコンデンサ 73Dを介して端子 72に接続されている [0052] The other terminal of switching unit 71D is connected to one terminal of coil 44A, the other selection terminal of switching unit 71K, and one terminal of switching unit 71H. The other terminal of the switching unit 71H is connected to the terminal 72 via the capacitor 73D.
〇 Yes
[0053] そして、スイッチング部 71A〜71Dと、スイッチング部 71E〜71Hと、スイッチング部  [0053] Then, switching units 71A to 71D, switching units 71E to 71H, and a switching unit
71J、 71Kは、切替制御部 39により図 8に示す時間帯 6；!〜 64で順次切り替えられて いる。すなわち、時間帯 61では、スイッチング部 71Aとスイッチング部 71Eは短絡さ れ、スイッチング部 71Jは他方の選択端子側に切り替えられる。このことにより、コイル 42Aとコイル 42Bとは直列同相接続される。そして、コイル 42Aとコイル 42Bの直列 接続体と並列にコンデンサ 73Aが接続される。  71J and 71K are sequentially switched by the switching control unit 39 in time zone 6;!-64 shown in FIG. That is, in time zone 61, switching unit 71A and switching unit 71E are short-circuited, and switching unit 71J is switched to the other selection terminal side. Thus, the coil 42A and the coil 42B are connected in series and in phase. A capacitor 73A is connected in parallel with the series connection body of the coil 42A and the coil 42B.
[0054] 時間帯 62では、スイッチング部 71Bとスイッチング部 71Fは短絡され、スイッチング 部 71Jは一方の選択端子側に切り替えられる。このことにより、コイル 42Aとコイル 42 Bとは直列逆相接続される。そして、コイル 42Aとコイル 42Bの直列接続体と並列に コンデンサ 73Bが接続される。 In time zone 62, switching unit 71B and switching unit 71F are short-circuited, and switching unit 71J is switched to one selection terminal side. As a result, the coil 42A and the coil 42B are connected in series in reverse phase. And in parallel with the series connection of coil 42A and coil 42B Capacitor 73B is connected.
[0055] 時間帯 63では、スイッチング部 71Cとスイッチング部 71Gは短絡され、スイッチング 部 71Kは他方の選択端子側に切り替えられる。このことにより、コイル 44Aとコイル 44 Bとは直列同相接続される。そして、コイル 44Aとコイル 44Bの直列接続体と並列に コンデンサ 73Cが接続される。  In time zone 63, switching unit 71C and switching unit 71G are short-circuited, and switching unit 71K is switched to the other selection terminal side. Thus, the coil 44A and the coil 44B are connected in series and in phase. A capacitor 73C is connected in parallel with the series connection body of the coil 44A and the coil 44B.
[0056] 時間帯 64では、スイッチング部 71Dとスイッチング部 71Hは短絡され、スイッチング 部 71Kは一方の選択端子側に切り替えられる。このことにより、コイル 44Aとコイル 44 Bとは直列逆相接続される。そして、コイル 44Aとコイル 44Bの直列接続体と並列に コンデンサ 73Dが接続される。  [0056] In time zone 64, switching unit 71D and switching unit 71H are short-circuited, and switching unit 71K is switched to one selection terminal side. Thus, the coil 44A and the coil 44B are connected in series in reverse phase. A capacitor 73D is connected in parallel with the series connection body of the coil 44A and the coil 44B.
[0057] なお、スイッチング部 71A〜71Dとスイッチング部 71E〜71Hはそれぞれ選ばれた 一個のスイッチング部のみがオンとなり、他のスイッチング部はオフとなっている。この ように、スイッチング部 71A、 71B、 71Jは図 2におけるセンサ 25に対して第 1切替部 91を構成している。またスイッチング部 71C、 71D、 71Kは図 2におけるセンサ 26に 対する第 1切替部 91を構成している。そしてスイッチング部 71E、 71Fはセンサ 25に 対して第 3切替部 93を構成し、スイッチング部 71G、 71Hはセンサ 26に対して第 3切 替部 93を構成している。  [0057] Note that only one of the selected switching units 71A to 71D and 71E to 71H is on, and the other switching units are off. In this manner, the switching units 71A, 71B, 71J constitute a first switching unit 91 for the sensor 25 in FIG. The switching units 71C, 71D and 71K constitute a first switching unit 91 for the sensor 26 in FIG. The switching units 71E and 71F constitute a third switching unit 93 for the sensor 25, and the switching units 71G and 71H constitute a third switching unit 93 for the sensor 26.
[0058] また切替制御部 39は、 1msecの間に検出回路 45に対してセンサ 25とセンサ 26と を切り替える。すなわち、スイッチング部 71A、 71B、 71C、 71Dは図 2における第 2 切替部 92を構成している。  The switching control unit 39 switches the sensor 25 and the sensor 26 with respect to the detection circuit 45 during 1 msec. That is, the switching units 71A, 71B, 71C, 71D constitute the second switching unit 92 in FIG.
[0059] スイッチング部 71A〜71Dの一方の端子は電源 70に直接接続されている。すなわ ち、第 1切替部 91はセンサ 25に対しスイッチング部 71A、 71Bの組とスイッチング部 71Jとを有し、スイッチング部 71A、 71Bの組はセンサ 25と電源 70との間に接続され ている。これにより第 1切替部 91は同調回路 40に高周波的な悪影響を与えることなく 切り替えを行なうことができる。また見方を変えると第 2切替部 92は、電源 70と、セン サ 25、 26との間に設けられている。これにより第 2切替部 92もまた同調回路 40に高 周波的な悪影響を与えることなく切り替えを行なうことができる。  [0059] One terminal of each of the switching units 71A to 71D is directly connected to the power source 70. That is, the first switching unit 91 has a set of switching units 71A and 71B and a switching unit 71J for the sensor 25, and the set of switching units 71A and 71B is connected between the sensor 25 and the power source 70. Yes. As a result, the first switching unit 91 can perform switching without adversely affecting the tuning circuit 40 in terms of high frequency. In other words, the second switching unit 92 is provided between the power source 70 and the sensors 25 and 26. As a result, the second switching unit 92 can also perform switching without adversely affecting the tuning circuit 40 in terms of high frequency.
[0060] 図 10の回路図では、電源 70とコイル 42A、 44Aとの接続を、コイルとコンデンサで 構成された並列回路の外部に設けられたスイッチング部 71A〜71Dで切り替えてい る。そして、コイル 42A、 42Bとコンデンサ 73A、 73Bのいずれかとの並列回路中に スイッチング部 71E、 71Fの組とスイッチング部 71Jが設けられている。一方、コイル 4 4A、 44Bとコンデンサ 73C、 73Dのいずれかとの並列回路中にスイッチング部 71G 、 71Hの組とスイッチング部 71Kが設けられている。このような簡単な構成でコンデン サ 73A〜73Dも含めた切り替えができ、第 1切替部 91、第 2切替部 92の機能を実現 すること力 Sできる。コイルとコンデンサとで構成された並列回路に含まれる抵抗値は小 さいほど望ましい。そのためこのようにスイッチング部の個数を少なくして回路を構成 することが好ましい。 [0060] In the circuit diagram of FIG. 10, the connection between the power source 70 and the coils 42A and 44A is switched by the switching units 71A to 71D provided outside the parallel circuit composed of the coil and the capacitor. The A set of switching units 71E and 71F and a switching unit 71J are provided in a parallel circuit of the coils 42A and 42B and one of the capacitors 73A and 73B. On the other hand, a set of switching units 71G and 71H and a switching unit 71K are provided in a parallel circuit of the coils 44A and 44B and any of the capacitors 73C and 73D. With such a simple configuration, switching including the capacitors 73A to 73D can be performed, and it is possible to realize the functions of the first switching unit 91 and the second switching unit 92. The smaller the resistance value included in the parallel circuit composed of the coil and capacitor, the better. Therefore, it is preferable to configure the circuit by reducing the number of switching units in this way.
[0061] また、同調回路 40を形成するコンデンサ 73A〜73Dはそれぞれ独立に設けられて いるので、直列同相接続と直列逆相接続の周波数調整を容易に行なうことができる。  [0061] Further, since the capacitors 73A to 73D forming the tuning circuit 40 are independently provided, the frequency adjustment of the series in-phase connection and the series anti-phase connection can be easily performed.
[0062] 同調回路 40の出力は端子 72へ出力され、検出回路 45に入力される。検出回路 4 5の出力は、端子 80から A/Dコンバータ 46に出力される。検出回路 45は、ピークホ 一ルド回路 74と、リセット回路 75と、入力端子 76と、ゲイン切替回路 77とで構成され ている。ピークホールド回路 74は端子 72に接続され、公知の検波回路を含む。リセ ット回路 75はピークホールド回路 74をリセットする。入力端子 76には切替制御部 39 からリセット回路 75にリセット信号が入力される。ゲイン切替回路 77は、ピークホーノレ ド回路 74の出力端と端子 80との間に設けられている。  The output of the tuning circuit 40 is output to the terminal 72 and input to the detection circuit 45. The output of the detection circuit 45 is output from the terminal 80 to the A / D converter 46. The detection circuit 45 includes a peak hold circuit 74, a reset circuit 75, an input terminal 76, and a gain switching circuit 77. The peak hold circuit 74 is connected to the terminal 72 and includes a known detection circuit. Reset circuit 75 resets peak hold circuit 74. A reset signal is input to the input terminal 76 from the switching control unit 39 to the reset circuit 75. The gain switching circuit 77 is provided between the output terminal of the peak Honored circuit 74 and the terminal 80.
[0063] ゲイン切替回路 77は、オペアンプ 77Aの入力と出力との間に直列接続された抵抗 78A〜78Dと、抵抗 78A〜78Dのそれぞれに並列接続されたスイッチング部 79A 〜79Dとで構成されている。スイッチング部 79A〜79Dは、図 8に示す時間帯 6；!〜 6 4にそれぞれ対応して切替制御部 39により切り替えられる。 ゲイン切替回路 77は、 スイッチング部 79A〜79Dの ON— OFFを切り替えることでセンサ 25、 26の各出力 におけるゲインの変化幅を最大にする。これにより信号 61D〜64Dの SN比が高まり 、測定精度が向上する。  [0063] The gain switching circuit 77 includes resistors 78A to 78D connected in series between the input and output of the operational amplifier 77A, and switching units 79A to 79D connected in parallel to the resistors 78A to 78D, respectively. Yes. The switching units 79A to 79D are switched by the switching control unit 39 in correspondence with time zones 6;! To 64 shown in FIG. The gain switching circuit 77 maximizes the gain change width at each output of the sensors 25 and 26 by switching the switching units 79A to 79D between ON and OFF. This increases the signal-to-noise ratio of the signals 61D to 64D and improves the measurement accuracy.
[0064] なお図 10に示すゲイン切替回路 77は、直列接続された抵抗 78A〜78Dと、抵抗 7 8A〜78Dのそれぞれに並列接続されたスイッチング部 79A〜79Dとで構成されて いる。これ以外に、抵抗 78A〜78Dを並列接続し、抵抗 78A〜78Dのそれぞれにス イッチング部 79A〜79Dを直列に接続してゲイン切替回路 77を構成してもよい。 [0065] 次にオフセット切替回路 69について説明する。オフセット切替回路 69は、抵抗 67 C、 67D、 67E、 67F、 67Gとスイッチングき 68A〜68Dとで構成されている。抵抗 6 7C、 67D、 67E、 67F、 67Gはトランジスタ 66のェミッタとグランドとの間に直列接続 されている。スイッチング部 68A〜68Dは抵抗 67D〜67Gの両端にそれぞれ接続さ れている。スイッチング部 68A〜68Dは切替制御部 39により、図 8における時間帯 6 1〜64でそれぞれ切り替えられ、それぞれの切り替えに対して予め決められたオフセ ット電圧を検出回路 45の出力電圧に付与する。すなわち、オフセット切替回路 69は 、スイッチング部 68A〜68Dを切り替えることにより、オフセット電圧を制御して検出 回路 45の出力電圧変化幅を大きくする。これにより信号 61D〜64Dの SN比が高ま り、測定精度が向上する。 Note that gain switching circuit 77 shown in FIG. 10 includes resistors 78A to 78D connected in series and switching units 79A to 79D connected in parallel to resistors 78A to 78D, respectively. In addition, the gain switching circuit 77 may be configured by connecting the resistors 78A to 78D in parallel and connecting the switching units 79A to 79D in series to the resistors 78A to 78D. Next, the offset switching circuit 69 will be described. The offset switching circuit 69 includes resistors 67C, 67D, 67E, 67F, and 67G and switching devices 68A to 68D. Resistors 67C, 67D, 67E, 67F, and 67G are connected in series between the emitter of transistor 66 and ground. Switching sections 68A to 68D are connected to both ends of resistors 67D to 67G, respectively. The switching units 68A to 68D are switched by the switching control unit 39 in time zones 61 to 64 in FIG. 8, respectively, and an offset voltage predetermined for each switching is applied to the output voltage of the detection circuit 45. . That is, the offset switching circuit 69 controls the offset voltage to increase the output voltage change width of the detection circuit 45 by switching the switching units 68A to 68D. This increases the signal-to-noise ratio of signals 61D to 64D and improves measurement accuracy.
[0066] なお、図 10に示すオフセット切替回路 69では、抵抗 67D〜67Gが直列接続され、 それぞれの抵抗 67D〜67Gとスイッチング部 68A〜68Dとが並列接続されている。 これ以外に、抵抗 67D〜67Gを並列接続して、それぞれの抵抗 67D〜67Gと直列 にスイッチング部 68A〜68Dを接続してもよい。また、ピークホールド回路 74の入力 に複数のツエナー電圧の異なるツエナーダイオードを並列に揷入し、これらのツエナ 一ダイオードを電子スィッチで切り替えることにより、オフセット電圧を切り替えてもよ い。 In the offset switching circuit 69 shown in FIG. 10, resistors 67D to 67G are connected in series, and the resistors 67D to 67G and switching units 68A to 68D are connected in parallel. In addition, the resistors 67D to 67G may be connected in parallel, and the switching units 68A to 68D may be connected in series with the resistors 67D to 67G. Alternatively, the offset voltage may be switched by inserting a plurality of Zener diodes having different Zener voltages in parallel to the input of the peak hold circuit 74 and switching these Zener diodes with an electronic switch.
[0067] このようにゲイン切替回路 77とオフセット切替回路 69とで、センサ 25、 26の各出力 におけるゲインの変化幅を最大にすることが精密な測定を行なうに際して重要なこと である。  [0067] In this way, it is important for the gain switching circuit 77 and the offset switching circuit 69 to maximize the gain change width at each output of the sensors 25 and 26 when performing precise measurement.
[0068] 次に、スイッチング部 71A〜71Kの好ましい構成について説明する。図 11は、本 実施の形態で用いるスイッチング部 71A〜71Kのいずれかを示す回路図である。特 に同調回路 40内で用いるスイッチング部 71E〜71Kにおいては、電界効果トランジ スタ（FET)を用いた形式の電子スィッチを用いることが好ましい。すなわち、第 1切替 部 91、第 2切替部 92は複数のスイッチング素子である FETで構成することが好まし い。これは周波数の切り替えに際して同調回路 40のアイソレーションを向上させるた めである。なお、この構成は、スイッチング部 68A〜68Dと、スイッチング部 79A〜7 9Dに使用することもできる。 [0069] 入力端子 81には、切替制御部 39で制御される信号が入力される。入力端子 81とト ランジスタ 82のベースとの間には抵抗 83Aが接続されている。また、トランジスタ 82 のベースとグランドとの間には抵抗 83Bが接続されている。トランジスタ 82のェミッタ は直接グランドに接続されており、コレクタは抵抗 83Cを介して、例えば 24Vの電源 8 4に接続されている。 Next, a preferred configuration of the switching units 71A to 71K will be described. FIG. 11 is a circuit diagram showing one of the switching units 71A to 71K used in the present embodiment. In particular, in the switching units 71E to 71K used in the tuning circuit 40, it is preferable to use an electronic switch of a type using a field effect transistor (FET). That is, it is preferable that the first switching unit 91 and the second switching unit 92 are configured by FETs that are a plurality of switching elements. This is to improve the isolation of the tuning circuit 40 when switching the frequency. This configuration can also be used for the switching units 68A to 68D and the switching units 79A to 79D. A signal controlled by the switching control unit 39 is input to the input terminal 81. A resistor 83A is connected between the input terminal 81 and the base of the transistor 82. A resistor 83B is connected between the base of the transistor 82 and the ground. The emitter of the transistor 82 is directly connected to the ground, and the collector is connected to, for example, a 24 V power supply 84 via a resistor 83C.
[0070] また、トランジスタ 82のコレクタは抵抗 83Dを介して Nチャンネル FET85Aのゲート に接続されている。トランジスタ 82のコレクタは抵抗 83Eを介して Nチャンネル FET8 5Bのゲートにも接続されている。 FET85Aのドレインは一方の端子 86Aに接続され ており、 FET85Aのソースは FET85Bのソースに接続されている。 FET85Bのドレイ ンは他方の端子 86Bに接続されて!/、る。  [0070] The collector of the transistor 82 is connected to the gate of the N-channel FET 85A via the resistor 83D. The collector of the transistor 82 is also connected to the gate of the N-channel FET 85B through a resistor 83E. The drain of FET85A is connected to one terminal 86A, and the source of FET85A is connected to the source of FET85B. The drain of FET85B is connected to the other terminal 86B!
[0071] このように 2個の FET85A、 85Bは直列に接続されている。そのため、端子 86A、 8 6B間のアイソレーションは向上するとともに、高周波性能が向上する。また、スィッチ ング部 71E〜71Kが FET85A、 85Bで構成されているので、オン抵抗を極めて小さ くすること力 Sできる。なお、同調回路 40におけるスイッチング部 71J、 71Kは、それぞ れ図 11に示す電子スィッチを 2個用いればよ!/、。  Thus, the two FETs 85A and 85B are connected in series. Therefore, the isolation between the terminals 86A and 86B is improved and the high frequency performance is improved. Also, since the switching parts 71E to 71K are composed of FET85A and 85B, the on-resistance can be made extremely small. The switching units 71J and 71K in the tuning circuit 40 may use two electronic switches shown in FIG.
[0072] 次に対向するセンサ 26における 2つのコイル 44A、 44Bの磁気接続を切り替えて 硬貨 20の異なる情報を取得する原理について説明する。図 12は、コイル 44Aと 44B とを直列同相接続し、同厚で材質の異なる硬貨 20を投入した場合の同調回路 40の 出力特性であり、周波数に対する出力電圧の変化を示している。  Next, the principle of acquiring different information of the coin 20 by switching the magnetic connection between the two coils 44A and 44B in the opposing sensor 26 will be described. FIG. 12 shows the output characteristics of the tuning circuit 40 when the coils 44A and 44B are connected in series in phase, and coins 20 of the same thickness and different materials are inserted, and shows the change of the output voltage with respect to the frequency.
[0073] コイル 44A、 44Bの近傍に金属が存在しない無負荷時には特性曲線 103が出力さ れる。その中心周波数は約 150kHzである。また、コイル 44A、 44Bの近傍に金属が 存在する有負荷時には特性曲線 104〜； 107が出力される。その中心周波数は約 17 0kHzである。特性曲線 104は、硬貨 20を構成する負荷金属として、銅を用いた場 合であり、特性曲線 105は負荷金属として、黄銅を用いた場合である。また、特性曲 線 106は、負荷金属として、白銅を用いた場合であり、特性曲線 107は負荷金属とし て、ニッケルを用いた場合である。このように、特性曲線は負荷としての金属の種類 により特徴あるレベルを示す。したがって、このレベルの特徴を用いて投入された硬 貨 20の材質を検知することができる。 [0074] なお無負荷時に比べて有負荷時は約 20kHzだけ同調回路 40の中心周波数が高 くなる。したがって、分周器 38から出力する出力周波数を、無負荷時の中心周波数 に比べて 20kHz高く設定すれば硬貨 20の材質を感度よく検知できる。また、この設 定周波数は、有負荷時のピーク周波数より、若干高めに設定すれば安定性が良好と なる。すなわちコイル 44A、 44Bが同相接続される際の発振回路 90の発振周波数は 、コイル 44A、 44Bの間を硬貨 20が通過する前の同調周波数より、予め定められた 周波数 (例えば 20kHz)だけ離れて設定することが好ましい。 [0073] A characteristic curve 103 is output when no metal is present in the vicinity of the coils 44A and 44B. Its center frequency is about 150kHz. In addition, the characteristic curves 104 to 107 are output when there is a load in the presence of metal near the coils 44A and 44B. Its center frequency is about 170 kHz. The characteristic curve 104 is when copper is used as the load metal constituting the coin 20, and the characteristic curve 105 is when brass is used as the load metal. The characteristic curve 106 is the case where white copper is used as the load metal, and the characteristic curve 107 is the case where nickel is used as the load metal. In this way, the characteristic curve shows a characteristic level depending on the type of metal as the load. Therefore, the material of the inserted coin 20 can be detected using this level of characteristics. [0074] Note that the center frequency of the tuning circuit 40 is increased by about 20 kHz when there is a load compared to when there is no load. Therefore, if the output frequency output from the frequency divider 38 is set 20 kHz higher than the center frequency at no load, the material of the coin 20 can be detected with high sensitivity. In addition, if this set frequency is set slightly higher than the peak frequency under load, the stability will be good. That is, the oscillation frequency of the oscillation circuit 90 when the coils 44A and 44B are connected in phase is separated from the tuning frequency before the coin 20 passes between the coils 44A and 44B by a predetermined frequency (for example, 20 kHz). It is preferable to set.
[0075] 無負荷時のピーク周波数は、切替制御部 39 (制御部 95)が分周器 38の分周比に より周波数を変化させながら A/Dコンバータ 46の出力を測定することにより検出し ている。この検出した値は、マイクロコンピュータ 36内の記憶部 49に格納する。そし て、硬貨 20の非投入時に記憶部 49に格納された周波数になるように分周器 38が分 周比を切り替え、発振周波数を補正している。このようにして、経時変化や温度変化 を補正しているので、環境が変化しても精密に硬貨 20を識別できる。  [0075] The peak frequency at no load is detected by the switching control unit 39 (control unit 95) measuring the output of the A / D converter 46 while changing the frequency according to the frequency division ratio of the frequency divider 38. ing. The detected value is stored in the storage unit 49 in the microcomputer 36. Then, when the coin 20 is not inserted, the frequency divider 38 switches the frequency division ratio so as to obtain the frequency stored in the storage unit 49 and corrects the oscillation frequency. In this way, since the change over time and the change in temperature are corrected, the coin 20 can be accurately identified even if the environment changes.
[0076] また、無負荷時のピーク周波数を生産時に製品毎に検出して、各製品の記憶部 49 に記憶させることにより、発振器 37の出力周波数を最適化することができる。そのた め製品毎のバラツキに左右されなレ、高!/、識別性能が達成可能である。  [0076] Further, the output frequency of the oscillator 37 can be optimized by detecting the peak frequency at no load for each product during production and storing it in the storage unit 49 of each product. For this reason, it is possible to achieve high, high, and discriminating performance that are not affected by variations among products.
[0077] また、切替制御部 39 (制御部 95)は出荷後も硬貨 20の非投入時にピーク周波数を 検出している力 S、この測定範囲は生産時に製品毎に記憶したピーク周波数を中心と した比較的狭い範囲（生産時より狭い範囲）に限定できる。そのためピーク周波数の 検出時間が短縮できる。  [0077] In addition, the switching control unit 39 (control unit 95) is a force S that detects the peak frequency when the coin 20 is not inserted even after shipment, and this measurement range is centered on the peak frequency stored for each product during production. Can be limited to a relatively narrow range (a range narrower than that during production). As a result, the peak frequency detection time can be shortened.
[0078] 図 13は、コイル 44A、 44Bが直列逆相接続され、同質で厚みの異なる硬貨 20を投 入した場合の同調回路 40の出力特性である。コイル 44A、 44Bの近傍に金属が存 在しない無負荷時には特性曲線 113が出力される。また、コイル 44A、 44Bの近傍 に金属が存在する有負荷時には特性曲線 114〜120が出力される。いずれの場合 も中心周波数は約 215kHzである。有負荷時の特性曲線 114では、無負荷時の特 性曲線 113に比べ、約 0. 8Vの渦電流によるロスが生ずる。そのため電圧レベルが 低下している。また、特性曲線 114〜； 120に示すように、金属の厚みにより、そのロス の大きさが異なる。すなわち、薄い金属の特性曲線 114から徐々に厚みを増すと、特 性曲線 115〜； 120と変化する。したがって、このレベルの特徴を用いて、投入された 硬貨 20の厚みを検知することができる。このためコイル 44A、 44Bが逆相接続される 際の発振周波数は、コイル 44A、 44Bの間を硬貨 20が通過する前の同調周波数と 実質的に同一の周波数に設定されていることが好ましい。 FIG. 13 shows an output characteristic of the tuning circuit 40 when the coils 44A and 44B are connected in series in reverse phase and coins 20 having the same quality and different thicknesses are inserted. The characteristic curve 113 is output at no load when no metal is present in the vicinity of the coils 44A and 44B. In addition, the characteristic curves 114 to 120 are output when there is a load in which a metal exists in the vicinity of the coils 44A and 44B. In either case, the center frequency is about 215 kHz. The characteristic curve 114 with load causes a loss due to an eddy current of about 0.8 V compared to the characteristic curve 113 with no load. As a result, the voltage level has dropped. Moreover, as shown in the characteristic curves 114 to 120, the magnitude of the loss varies depending on the thickness of the metal. That is, when the thickness is gradually increased from the characteristic curve 114 of a thin metal, Sex curve 115 ~; Therefore, the thickness of the inserted coin 20 can be detected using this level of feature. For this reason, it is preferable that the oscillation frequency when the coils 44A and 44B are connected in reverse phase is set to substantially the same frequency as the tuning frequency before the coin 20 passes between the coils 44A and 44B.
[0079] なお、この周波数の設定は、製品毎に最適の周波数に設定する。また、図 12、図 1 3では、センサ 26について説明した力 センサ 25でも同様の原理である。ただし、セ ンサ 25はセンサ 26より小径であるため図 4における磁力線 50Bが硬貨 20の表面方 向に広がらない。そのため、コイル 42A、 42Bが逆相接続された場合は、硬貨 20の 表面の比較的微小な面積の凹凸を反映した情報が取得できる。  It should be noted that this frequency is set to an optimum frequency for each product. In FIGS. 12 and 13, the same principle applies to the force sensor 25 described for the sensor 26. However, since the sensor 25 has a smaller diameter than the sensor 26, the magnetic field lines 50B in FIG. 4 do not spread toward the surface of the coin 20. Therefore, when the coils 42A and 42B are connected in reverse phase, information reflecting irregularities of a relatively small area on the surface of the coin 20 can be acquired.
[0080] 以上のように、硬貨識別装置 21では、発振器 37の出力が分周器 38を介して同調 回路 40に供給されており、発振器 37は同調回路 40と独立して設けられている。その ため硬貨 20の影響や周囲温度などの環境の影響でコイル 42A、 42B、 44A、 44B のインピーダンスが変化しても、発振器 37の発振周波数に影響を与えることはなぐ 安定して硬貨 20を識別することができる。  As described above, in the coin identifying device 21, the output of the oscillator 37 is supplied to the tuning circuit 40 via the frequency divider 38, and the oscillator 37 is provided independently of the tuning circuit 40. Therefore, even if the impedance of the coils 42A, 42B, 44A, 44B changes due to the influence of the coin 20 or the environment such as the ambient temperature, it does not affect the oscillation frequency of the oscillator 37. can do.
[0081] (実施の形態 2)  [0081] (Embodiment 2)
実施の形態 1では単一材料で構成された硬貨 20を対象としてその材料を識別する 原理を説明した。本実施の形態では 2種類以上の金属のクラッド材で構成された硬 貨 20Aの材料を識別する原理と、それに対応する構成につ!/、て説明する。  In the first embodiment, the principle of identifying the material of a coin 20 composed of a single material has been described. In the present embodiment, the principle of identifying the material of the coin 20A composed of two or more kinds of metal clad materials and the corresponding configuration will be described.
[0082] 図 14は上記のように構成された硬貨 20Aの断面図である。例えば表面材 131は白 銅であり、中心材 132は銅である。すなわち硬貨 20Aは例えば米国の 10、 25、 50セ ントである。  FIG. 14 is a cross-sectional view of the coin 20A configured as described above. For example, the surface material 131 is white copper, and the center material 132 is copper. That is, the coin 20A is, for example, 10, 25, 50 cents in the United States.
[0083] 図 12に示したように、硬貨材質によって同調回路 40の出力特性は変化する。図 13 では同じ材質で硬貨厚みが異なる場合の出力特性の違いを示している力 S、硬貨材 質が異なる場合も出力電圧は異なる。この出力電圧の違いを利用して表面材 131と 中心材 132とを識別すること力 Sできる。  [0083] As shown in FIG. 12, the output characteristics of the tuning circuit 40 vary depending on the coin material. Figure 13 shows the difference in output characteristics when the same material is used and the coin thickness is different. The output voltage is also different when the force S and the coin material are different. Using this difference in output voltage, it is possible to distinguish the surface material 131 and the central material 132 from each other.
[0084] 図 15は図 14に示す硬貨 20Aの上面からの深さに対する同調回路 40の出力電圧 の変化を示す特性図である。特性曲線 133は特性曲線 134よりも高い発振周波数の 信号を同調回路 40に入力した場合を示している。この際、コイル 44A、 44Bは逆相 接続されている。 FIG. 15 is a characteristic diagram showing a change in output voltage of the tuning circuit 40 with respect to the depth from the upper surface of the coin 20A shown in FIG. A characteristic curve 133 shows a case where a signal having an oscillation frequency higher than that of the characteristic curve 134 is input to the tuning circuit 40. At this time, coils 44A and 44B are out of phase. It is connected.
[0085] コイル 44A、 44Bの発生する交流磁界が硬貨 20Aの厚み方向に浸透する際、その 侵入深さは周波数により異なる。すなわち、高周波では表皮効果により磁界は深くま で浸透せずに表面材 131の影響が大きぐ低周波では磁界は深くまで浸透し表面材 131と中心材 132が出力電圧レベルに影響する。したがって、表面材 131と中心材 1 32による出力レベルの相違力も硬貨 20Aを識別することができる。  [0085] When the AC magnetic field generated by the coils 44A and 44B penetrates in the thickness direction of the coin 20A, the penetration depth varies depending on the frequency. That is, at high frequencies, the magnetic field does not penetrate deeply due to the skin effect, and the influence of the surface material 131 is large. At low frequencies, the magnetic field penetrates deeply, and the surface material 131 and the central material 132 affect the output voltage level. Therefore, the coin 20A can also be identified by the difference in power level between the surface material 131 and the central material 132.
[0086] すなわち図 10において、入力端子 65に分周器 38から切替制御部 39で切り替えら れた 2種類の異なる周波数を交互に入力する。硬貨 20Aを構成する表面材 131の材 質と中心材 132の材質とが異なると、この入力される周波数における同調回路 40で の出力レベルが異なる。そのため、例えば入力端子 65から 100kHzの信号を入力し た際の無負荷時と有負荷時との出力電圧の差と、 200kHzの信号を入力した際の無 負荷時と有負荷時との出力電圧の差とを検出する。そして予め既存の硬貨 20Aの場 合に得られる値を記憶部 49に記憶させ、検出した差を記憶させた値と識別回路 47 ( 制御部 95)で比較する。これにより硬貨 20Aの材質を識別することができる。このよう に 1個のセンサ 26を用いて、印加する周波数を切り替えることにより、硬貨 20Aの材 質を検知することができる。  That is, in FIG. 10, two different frequencies switched by the switching control unit 39 from the frequency divider 38 are alternately input to the input terminal 65. If the material of the surface material 131 and the material of the central material 132 constituting the coin 20A are different, the output level of the tuning circuit 40 at this input frequency is different. For this reason, for example, the difference between the output voltage when there is no load and when there is a load when a 100 kHz signal is input from the input terminal 65, and the output voltage when there is no load and when there is a load when a 200 kHz signal is input. To detect the difference. The value obtained in the case of the existing coin 20A is stored in the storage unit 49 in advance, and the detected difference is compared with the stored value by the identification circuit 47 (control unit 95). Thereby, the material of the coin 20A can be identified. Thus, the material of the coin 20A can be detected by switching the frequency to be applied using one sensor 26.
[0087] (実施の形態 3)  (Embodiment 3)
図 16は、本実施の形態における同調回路の一部を示す回路図である。実施の形 態 1では同調回路 40においてセンサ 25、 26とコンデンサ 73A〜73Dとを並列接続 している。本実施の形態では、センサ 25、 26とコンデンサ 156、 158を直列接続して 同調回路を構成する。すなわち直列同調回路を用いた点で実施の形態 1と相違し、 回路 151と、回路 151同様の構成の回路とを並列接続することで図 10における同調 回路 40に代えて用いる。すなわち回路 151はセンサ 25を含む部分のみ示している。  FIG. 16 is a circuit diagram showing a part of the tuning circuit in the present embodiment. In the first embodiment, in the tuning circuit 40, the sensors 25 and 26 and the capacitors 73A to 73D are connected in parallel. In this embodiment, sensors 25 and 26 and capacitors 156 and 158 are connected in series to form a tuning circuit. That is, unlike the first embodiment in that a series tuning circuit is used, the circuit 151 and a circuit having the same configuration as the circuit 151 are connected in parallel and used instead of the tuning circuit 40 in FIG. That is, the circuit 151 shows only the part including the sensor 25.
[0088] 回路 151は図 10におけるトランジスタ 66のコレクタと、検出回路 45の端子 72との間 に揷入される。この場合、直列同調回路であるため、検出回路 45の端子 72に接続さ れた結合コンデンサ 72 Aは省略することができる。  The circuit 151 is inserted between the collector of the transistor 66 and the terminal 72 of the detection circuit 45 in FIG. In this case, since it is a series tuning circuit, the coupling capacitor 72 A connected to the terminal 72 of the detection circuit 45 can be omitted.
[0089] 以下、回路 151の構成について説明する。回路 151の一方の端子 152は、コイル 4 2Aの一方の端子に接続されており、コイル 42Aの他方の端子は、スイッチング部 15 4Aの共通端子に接続されている。スイッチング部 154Aの一方の選択端子はコイル 42Bの一方の端子に接続されており、コイル 42Bの他方の端子は、コンデンサ 156 を介してスイッチング部 154Bの一方の選択端子に接続されている。また、スィッチン グ部 154Bの共通端子は、回路 151の他方の端子 157に接続されている。スィッチン グ部 154Aの他方の選択端子は、コイル 42Bの他方の端子に接続されており、コイル 42Bの一方の端子は、コンデンサ 158を介してスイッチング部 154Bの他方の選択端 子に接続されている。 Hereinafter, the configuration of the circuit 151 will be described. One terminal 152 of the circuit 151 is connected to one terminal of the coil 42A, and the other terminal of the coil 42A is connected to the switching unit 15 Connected to 4A common terminal. One selection terminal of the switching unit 154A is connected to one terminal of the coil 42B, and the other terminal of the coil 42B is connected to one selection terminal of the switching unit 154B via the capacitor 156. The common terminal of the switching unit 154B is connected to the other terminal 157 of the circuit 151. The other selection terminal of the switching unit 154A is connected to the other terminal of the coil 42B, and one terminal of the coil 42B is connected to the other selection terminal of the switching unit 154B via the capacitor 158. .
[0090] スイッチング部 154A、 154Bは、実施の形態 1のスイッチング部 71J、 71Kと同様に 構成されている。また、回路 151を形成するコンデンサ 156、 158はそれぞれ独立に 設けられている。そのため、直列同相接続と直列逆相接続の周波数調整を容易に行 なうことができる。  [0090] Switching units 154A and 154B are configured in the same manner as switching units 71J and 71K in the first embodiment. Capacitors 156 and 158 forming the circuit 151 are provided independently. Therefore, the frequency adjustment of the series in-phase connection and the series anti-phase connection can be easily performed.
[0091] 以上のように構成された回路 151の動作を説明する。図 9における切替制御部 39 の出力によりスイッチング部 154A、 154Bが実線で示した方向に切り替えられる。す ると、コイル 42A、 42Bが直列同相接続されるとともに、この直列接続体にコンデンサ 156が直列接続される。コイル 42A、 42Bが直列同相接続されるので硬貨 20の材質 を効率よく検知することができる。  The operation of the circuit 151 configured as described above will be described. The switching units 154A and 154B are switched in the direction indicated by the solid line by the output of the switching control unit 39 in FIG. Then, the coils 42A and 42B are connected in series and in phase, and the capacitor 156 is connected in series to this series connection body. Since the coils 42A and 42B are connected in series and in phase, the material of the coin 20 can be detected efficiently.
[0092] また、切替制御部 39の出力によりスイッチング部 154A、 154Bが点線で示す方向 に切り替えられると、コイル 42A、 42Bが直列逆相接続される。同時にこの直列接続 体にコンデンサ 158が直列接続される。コイル 42A、 42Bが直列逆相接続されるの で、硬貨 20の材厚を効率よく検知することができる。  In addition, when switching units 154A and 154B are switched in the direction indicated by the dotted line by the output of switching control unit 39, coils 42A and 42B are connected in series in reverse phase. At the same time, a capacitor 158 is connected in series to this series connection body. Since the coils 42A and 42B are connected in series with opposite phases, the thickness of the coin 20 can be detected efficiently.
[0093] 回路 151は、直列同調回路であるので、共振回路の共振の鋭さの度合いを表す値 である Q値が高い。直列同調回路における Q値は、同調回路に含まれる内部抵抗を R、コンデンサの容量を C、角周波数を ωとすると、 Rと ωと Cの積の逆数で表される。 また回路 151を用いると、スイッチング部 154A、 154Bだけで図 2における第 1切替 部 91、第 3切替部 93を構成することができる。  Since the circuit 151 is a series tuning circuit, the Q value that is a value representing the degree of resonance sharpness of the resonance circuit is high. The Q value in a series tuning circuit is expressed by the reciprocal of the product of R, ω and C, where R is the internal resistance included in the tuning circuit, C is the capacitance of the capacitor, and ω is the angular frequency. In addition, when the circuit 151 is used, the first switching unit 91 and the third switching unit 93 in FIG. 2 can be configured only by the switching units 154A and 154B.
[0094] (実施の形態 4)  [0094] (Embodiment 4)
図 17は、実施の形態 4における硬貨識別装置 201の電気回路を中心としたブロッ ク図である。図 18は図 17における発振部 204の回路図である。基本的な構成は実 施の形態 1における図 2と同様である力 S、本実施の形態では発振回路 90の構成が異 なる。すなわち実施の形態 1では、固定周波数で発振する発振器 37の出力を、分周 器 38を介して同調回路 40に供給する。これ対して、本実施の形態では、同調周波 数が可変の同調回路 202を含む自励式発振回路を用いる。 FIG. 17 is a block diagram centering on the electric circuit of the coin discriminating apparatus 201 in the fourth embodiment. FIG. 18 is a circuit diagram of the oscillation unit 204 in FIG. The basic configuration is real The force S is the same as that in FIG. 2 in the first embodiment, and the configuration of the oscillation circuit 90 is different in the present embodiment. That is, in the first embodiment, the output of the oscillator 37 that oscillates at a fixed frequency is supplied to the tuning circuit 40 via the frequency divider 38. On the other hand, in the present embodiment, a self-excited oscillation circuit including a tuning circuit 202 having a variable tuning frequency is used.
[0095] 図 17と図 9との比較からわ力、るように、この構成では切替制御部 39、同調回路 40、 水晶発振子 35、発振器 37、分周器 38に代わって切替制御部 205、発振部 204が 設けられている。切替制御部 205は切替制御部 39に相当し、発振部 204内の接続 を切り替えるとともに、検出回路 45のゲインを切り替えている。発振部 204の出力は、 検出回路 45に接続されている。切替制御部 205と A/Dコンバータ 46と識別回路 4 7とはマイクロコンピュータ 206で構成されており、出力端子 48からは投入された硬貨 20の真贋と金種とを示すデータが出力される。すなわちこの構成では、発振部 204 が図 2における検出部 96を構成している。  [0095] As shown in the comparison between FIG. 17 and FIG. 9, in this configuration, the switching control unit 205 is replaced with the switching control unit 39, the tuning circuit 40, the crystal oscillator 35, the oscillator 37, and the frequency divider 38. An oscillation unit 204 is provided. The switching control unit 205 corresponds to the switching control unit 39, switches the connection in the oscillation unit 204, and switches the gain of the detection circuit 45. The output of the oscillation unit 204 is connected to the detection circuit 45. The switching control unit 205, the A / D converter 46, and the identification circuit 47 are composed of a microcomputer 206, and data indicating the authenticity and denomination of the inserted coin 20 is output from the output terminal 48. That is, in this configuration, the oscillation unit 204 constitutes the detection unit 96 in FIG.
[0096] 図 18に示すように、発振部 204は同調回路 202と発振用の増幅部 203とで構成さ れている。同調回路 202はセンサ 25、 26と、センサ 25、 26に並列接続されたコンデ ンサ 221A、 221B、 222A〜222Dとで形成されている。すなわち発振部 204は自 励発振する。発振部 204の詳細は後述する。  As shown in FIG. 18, the oscillating unit 204 includes a tuning circuit 202 and an amplifying unit 203 for oscillation. The tuning circuit 202 is formed of sensors 25 and 26 and capacitors 221A, 221B and 222A to 222D connected in parallel to the sensors 25 and 26. That is, the oscillation unit 204 self-oscillates. Details of the oscillator 204 will be described later.
[0097] 次に図 19を用いて、切替制御部 205による切り替えと、この切り替えによりセンサ 2 5、 26から出力される信号の波形を説明する。切替制御部 205は lmsecを 4つの時 間帯 231、 232、 233、 234に等間隔に分害 ijしている。切替制御部 205カ時間帯 23 ；!〜 234までの一連の時間を繰り返すことにより、検出回路 45は連続してセンサ 25、 26の出力を順次取り込んでいる。  Next, with reference to FIG. 19, switching by the switching control unit 205 and waveforms of signals output from the sensors 25 and 26 by this switching will be described. The switching control unit 205 divides lmsec into four time zones 231, 232, 233, and 234 at equal intervals. Switching control unit 205 Time zone 23; By repeating a series of times from! To 234, the detection circuit 45 successively takes in the outputs of the sensors 25 and 26 sequentially.
[0098] 時間帯 231では、センサ 25のコイル 42A、 42Bが直列同相接続され、硬貨 20の材 質の特徴が主に検知される。また、時間帯 232では、センサ 25のコイル 42A、 42B が直列逆相接続され、硬貨 20の凹凸が主に検知される。  [0098] In the time zone 231, the coils 42A and 42B of the sensor 25 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected. Further, in the time zone 232, the coils 42A and 42B of the sensor 25 are connected in series in reverse phase, and the unevenness of the coin 20 is mainly detected.
[0099] 時間帯 233では、センサ 26のコイル 44A、 44Bが直列同相接続され、硬貨 20の材 質の特徴が主に検知される。また、時間帯 234では、センサ 26のコイル 44A、 44B が直列逆相接続され、硬貨 20の厚みが主に検知される。  [0099] In the time zone 233, the coils 44A and 44B of the sensor 26 are connected in series and in phase, and the characteristics of the material of the coin 20 are mainly detected. In the time zone 234, the coils 44A and 44B of the sensor 26 are connected in series in reverse phase, and the thickness of the coin 20 is mainly detected.
[0100] 切替制御部 205は各時間帯 23；!〜 234の終端において 50 secのリセット信号 23 1A〜234Aを出力する。図 18に示すように増幅部 203内にはリセット回路 216が設 けられている。また実施の形態 1で述べたように検出回路 45内にはピークホールド回 路 74が設けられている。切替制御部 205はリセット信号 231A〜234Aによってリセッ ト回路 216とピークホールド回路 74とをリセットする。 [0100] The switching control unit 205 sets the reset signal 23 for 50 seconds at the end of each time zone 23;! Outputs 1A to 234A. As shown in FIG. 18, a reset circuit 216 is provided in the amplification unit 203. Further, as described in the first embodiment, a peak hold circuit 74 is provided in the detection circuit 45. The switching control unit 205 resets the reset circuit 216 and the peak hold circuit 74 by the reset signals 231A to 234A.
[0101] 発振部 204は各時間帯 23；!〜 234において信号 231B〜234Bを出力する。発振 部 204の出力が安定してその出力が略一定になるまで約 100 secかかる。発振部 204は、各時間帯 23；!〜 234の終端においてリセット回路 216を用いてリセットし、後 続する時間への影響を与えなレ、ようにしてレ、る。  [0101] The oscillator 204 outputs signals 231B to 234B in each time zone 23;! It takes about 100 seconds for the output of the oscillation unit 204 to stabilize and to become substantially constant. The oscillating unit 204 uses the reset circuit 216 to reset at the end of each time zone 23 ;! to 234, and does not affect the subsequent time.
[0102] 発振部 204の出力が安定するまでの時間は、安定化部を用いることで短縮すること 力 Sできる。また発振部 204の出力が安定するまでの時間を短縮すれば、センサ 25、 2 6の同相接続、逆相接続をより頻繁に切り替えることができ、測定位置の同一性をさら に向上することあでさる。  [0102] The time until the output of the oscillation unit 204 is stabilized can be shortened by using the stabilization unit. In addition, if the time until the output of the oscillation unit 204 stabilizes is shortened, the in-phase connection and reverse-phase connection of the sensors 25 and 26 can be switched more frequently, and the identity of the measurement position can be further improved. I'll do it.
[0103] 安定化部の具体例としては、同調回路 202の出力端子 215と検出回路 45との間に オペアンプを用いた緩衝回路を設けることにより実現できる。図 20は緩衝回路の一 例を示す回路図である。出力端子 215はコンデンサ 243、抵抗 242を介してォペア ンプ 241のプラス入力端子に接続されている。またオペアンプ 241のマイナス入力端 子はオペアンプ 241の出力側と接続されている。このようなボルテージフォロア 244を 緩衝回路として用いること力できる。なおこのような緩衝回路は実施の形態 1で用い てもよい。すなわち、接続端子 72と検出回路 45との間にボルテージフォロア 244を 揷入してもよい。  A specific example of the stabilization unit can be realized by providing a buffer circuit using an operational amplifier between the output terminal 215 of the tuning circuit 202 and the detection circuit 45. FIG. 20 is a circuit diagram showing an example of a buffer circuit. The output terminal 215 is connected to the positive input terminal of the op amp 241 via the capacitor 243 and the resistor 242. The negative input terminal of the operational amplifier 241 is connected to the output side of the operational amplifier 241. Such a voltage follower 244 can be used as a buffer circuit. Such a buffer circuit may be used in the first embodiment. That is, a voltage follower 244 may be inserted between the connection terminal 72 and the detection circuit 45.
[0104] また、安定化部の別の例としては、図 10におけるオフセット切替回路 69を用いるこ とができる。すなわち、切替制御部 205でオフセット切替回路 69を制御し、 250 se cの切替間隔のそれぞれ最初の 50 sec間だけオフセット電圧を制御し、発振の立 ち上がりを高速化する。具体的には、オフセット切替回路 69のスイッチング部 68A〜 68Dを切替制御部 205で制御することで安定化部を実現できる。なおこのような制御 を実施の形態 1で用いてもよい。すなわち、切替制御部 39でスイッチング部 68A〜6 8Dを上記のように制御してもよい。  [0104] As another example of the stabilization unit, the offset switching circuit 69 in FIG. 10 can be used. In other words, the switching control unit 205 controls the offset switching circuit 69 to control the offset voltage for the first 50 sec of each 250 sec switching interval, thereby speeding up the rise of oscillation. Specifically, the stabilization unit can be realized by controlling the switching units 68A to 68D of the offset switching circuit 69 by the switching control unit 205. Such control may be used in the first embodiment. That is, the switching control unit 39 may control the switching units 68A to 68D as described above.
[0105] 検出回路 45は、各時間帯 23；!〜 234において発振部 204の出力した信号 231B 〜234Bを検波して、ピークホールドして信号 231C〜234Cを出力する。検出回路 4 5以降の作用は実施の形態 1と同様なので詳細な説明を省略する。 [0105] The detection circuit 45 outputs the signal 231B output from the oscillation unit 204 in each time zone 23;! ~ 234B is detected, peak-holded, and signals 231C to 234C are output. Since the operation after the detection circuit 45 is the same as that of the first embodiment, the detailed description is omitted.
[0106] 次に図 18を用いて発振部 204の回路構成を説明する。発振部 204は同調回路 20 2と、同調回路 202に正帰還接続された増幅部 203とを有する。  Next, the circuit configuration of the oscillation unit 204 will be described with reference to FIG. The oscillation unit 204 includes a tuning circuit 202 and an amplification unit 203 connected to the tuning circuit 202 in a positive feedback connection.
[0107] まず、増幅部 203について説明する。増幅部 203の入力端子 210はコンパレータ 2 11のマイナス入力端子 211Aに接続されて!/、る。マイナス入力端子 211Aとプラス入 力端子 211Bとの間には抵抗 212Aが接続されている。また、電源 70とグランドとの 間には抵抗 212Bと 212Cとが直列接続されている。そして、その接続点はプラス入 力端子 211Bに接続されており、コンパレータ 211のプラス入力端子 211Bに基準電 圧を与えている。また、プラス入力端子 211Bとグランドとの間には、コンデンサ 213 が接続されている。  First, the amplification unit 203 will be described. The input terminal 210 of the amplifying unit 203 is connected to the negative input terminal 211A of the comparator 211. A resistor 212A is connected between the negative input terminal 211A and the positive input terminal 211B. Resistors 212B and 212C are connected in series between the power supply 70 and the ground. The connection point is connected to the positive input terminal 211B, and applies a reference voltage to the positive input terminal 211B of the comparator 211. A capacitor 213 is connected between the positive input terminal 211B and the ground.
[0108] コンパレータ 211の出力端子 211Cとマイナス入力端子 211Aとの間には帰還抵抗  [0108] A feedback resistor is connected between the output terminal 211C and the negative input terminal 211A of the comparator 211.
212Dが接続されており、出力端子 211Cと電源 70との間にはプルアップ抵抗 212E が接続されている。また、コンパレータ 211の出力端子 211Cと NPN型のトランジスタ 214のベースとの間には抵抗 212Fが接続されている。トランジスタ 214のベースとグ ランドとの間には抵抗 212Jが接続されている。トランジスタ 214のェミッタとグランドと の間には、抵抗 212Gと抵抗 212Hが直列に接続されている。  212D is connected, and a pull-up resistor 212E is connected between the output terminal 211C and the power supply 70. A resistor 212F is connected between the output terminal 211C of the comparator 211 and the base of the NPN transistor 214. A resistor 212J is connected between the base of the transistor 214 and the ground. A resistor 212G and a resistor 212H are connected in series between the emitter of the transistor 214 and the ground.
[0109] 抵抗 212Gはオフセット電圧調整に用いられ、抵抗 212Gにより適切なオフセット電 圧が設定されている。なお、抵抗 212Gの代わりに、実施の形態 1で示したオフセット 切替回路 69を用いてもよい。  [0109] The resistor 212G is used for offset voltage adjustment, and an appropriate offset voltage is set by the resistor 212G. Instead of the resistor 212G, the offset switching circuit 69 described in Embodiment 1 may be used.
[0110] トランジスタ 214のコレクタは、端子 72に接続されるとともに、発振部 204の出力端 子 215に接続されている。また、トランジスタ 214のベースと抵抗 212Fの接続点には リセット回路 216が接続されている。リセット回路 216は、入力端子 216Aと NPN型の トランジスタ 216Bのベースとの間に抵抗 216Cが接続されており、トランジスタ 216B のベースとグランドとの間には抵抗 216Dが接続されている。  The collector of the transistor 214 is connected to the terminal 72 and also connected to the output terminal 215 of the oscillation unit 204. A reset circuit 216 is connected to a connection point between the base of the transistor 214 and the resistor 212F. In the reset circuit 216, a resistor 216C is connected between the input terminal 216A and the base of the NPN transistor 216B, and a resistor 216D is connected between the base of the transistor 216B and the ground.
[0111] トランジスタ 216Bのェミッタはグランドに接続されるとともに、コレクタはトランジスタ 2 14のベースと抵抗 212Fとの接続点に接続されている。また、リセット回路 216の入 力端子 216Aは、切替制御部 205に接続されており、リセット回路 216はリセット信号 231A〜234Aの入力タイミングでリセットされる。したがって、このタイミングで発振部 204の出力は停止する。 [0111] The emitter of the transistor 216B is connected to the ground, and the collector is connected to the connection point between the base of the transistor 214 and the resistor 212F. The input terminal 216A of the reset circuit 216 is connected to the switching control unit 205, and the reset circuit 216 is a reset signal. It is reset at the input timing of 231A to 234A. Therefore, the output of the oscillator 204 stops at this timing.
[0112] 次に、同調回路 202について説明する。同調回路 202は、端子 72と入力端子 210 との間に接続されており、発振部 204の発振周波数を決定する。同調回路 202は、 実施の形態 1で説明した同調回路 40とほぼ同様の回路であり、その相違点を中心に 説明する。 [0112] Next, the tuning circuit 202 will be described. The tuning circuit 202 is connected between the terminal 72 and the input terminal 210 and determines the oscillation frequency of the oscillation unit 204. The tuning circuit 202 is substantially the same circuit as the tuning circuit 40 described in the first embodiment, and the difference will be mainly described.
[0113] 同調回路 202においては、電源、 70と端子 72との間に、コンデンサ 221A、 221B力 S 直列に接続されている。そして、コンデンサ 221Aとコンデンサ 221Bとの接続点は、 増幅部 203の入力端子 210に接続されている。この構成では、同調回路 202が増幅 部 203を構成するコンパレータ 211の入力とトランジスタ 214のコレクタ（出力）との間 に接続されることにより発振部 204が自励発振する。  [0113] In the tuning circuit 202, the capacitors 221A and 221B are connected in series between the power source 70 and the terminal 72. A connection point between the capacitor 221A and the capacitor 221B is connected to the input terminal 210 of the amplifying unit 203. In this configuration, the tuning circuit 202 is connected between the input of the comparator 211 constituting the amplification unit 203 and the collector (output) of the transistor 214, so that the oscillation unit 204 self-oscillates.
[0114] また、スイッチング部 71Eの他方の端子と端子 72の間にはコンデンサ 222Aが接続 されている。同様に、スイッチング部 71Fの他方の端子と端子 72の間にはコンデンサ 222Bが接続されており、スイッチング部 71Gの他方の端子と端子 72の間にはコンデ ンサ 222Cが接続されている。また、スイッチング部 71Hの他方の端子と端子 72の間 にはコンデンサ 222Dが接続されて!/、る。コンデンサ 222A〜222Dはそれぞれ実施 の形態 1におけるコンデンサ 73A〜73Dに相当する。  [0114] Further, a capacitor 222A is connected between the other terminal of switching unit 71E and terminal 72. Similarly, a capacitor 222B is connected between the other terminal of the switching unit 71F and the terminal 72, and a capacitor 222C is connected between the other terminal of the switching unit 71G and the terminal 72. Also, a capacitor 222D is connected between the other terminal of the switching unit 71H and the terminal 72! /. Capacitors 222A to 222D correspond to capacitors 73A to 73D in the first embodiment, respectively.
[0115] なお、電源 70と端子 72との間にコンデンサ 221A、 221Bの直列体が並列に接続 されている。この直列体の付加による合成容量を補正するため、コンデンサ 222A〜 222Dの値は実施の形態 1におけるコンデンサ 73A〜73Dの値より小さい。したがつ て、同調周波数は実施の形態 1における同調回路 40とほぼ同様である。  [0115] A series body of capacitors 221A and 221B is connected in parallel between the power supply 70 and the terminal 72. In order to correct the combined capacitance due to the addition of this series body, the values of capacitors 222A to 222D are smaller than the values of capacitors 73A to 73D in the first embodiment. Therefore, the tuning frequency is substantially the same as the tuning circuit 40 in the first embodiment.
[0116] また、スイッチング部 71A〜71Kの切り替えは、切替制御部 205で切り替えられる。  Further, switching of the switching units 71A to 71K is switched by the switching control unit 205.
この切り替えタイミングは実施の形態 1で説明した切替制御部 39の切り替えタイミン グと同様である。  This switching timing is the same as the switching timing of the switching control unit 39 described in the first embodiment.
[0117] このように本実施の形態においても、硬貨 20がセンサ 25、 26を通過する時間内に 発振部 204から出力される信号を複数回切り替える切替制御部 205が設けられてい る。切替制御部 205は硬貨 20がセンサ 25、 26を通過する間に発振部 204から出力 される信号を高速で切り替えるので、硬貨 20の同一部位における複数の特徴の相互 関係を検出すること力できる。したがって、識別回路 47はこの同一部位における相互 関係の特徴をも含めた硬貨 20の精密な識別を行なうことができる。 As described above, also in the present embodiment, the switching control unit 205 that switches the signal output from the oscillating unit 204 a plurality of times within the time when the coin 20 passes the sensors 25 and 26 is provided. Since the switching control unit 205 switches the signal output from the oscillation unit 204 at a high speed while the coin 20 passes the sensors 25 and 26, a plurality of features in the same part of the coin 20 are mutually switched. Can detect the relationship. Therefore, the identification circuit 47 can perform accurate identification of the coin 20 including the feature of the correlation in the same part.
[0118] また、切替制御部 205を用いて、センサ 25、 26を硬貨 20の材質を検出する同相接 続と、硬貨 20の材厚を検出する逆相接続とに切り替えるため、硬貨識別装置 201を 小型化することができるともに、低価格化を図ることもできる。これらの効果は実施の 形態 1と同様である。 [0118] In addition, since the switching control unit 205 is used to switch the sensors 25 and 26 between in-phase connection for detecting the material of the coin 20 and reverse-phase connection for detecting the material thickness of the coin 20, The 201 can be downsized and the price can be reduced. These effects are the same as those of the first embodiment.
[0119] さらに、本実施の形態においては、自励で発振する発振部 204を設けているので、 分周器 38等が不要となり、実施の形態 1と比べて少ない部品で構成することができる 。また、常に同調周波数で発振させることにより、安定した同調状態を保つことができ 、正確な識別が可能である。  [0119] Furthermore, in the present embodiment, since the oscillation unit 204 that oscillates by self-excitation is provided, the frequency divider 38 and the like are not necessary, and the configuration can be configured with fewer parts compared to the first embodiment. . In addition, by always oscillating at the tuning frequency, a stable tuning state can be maintained and accurate identification is possible.
[0120] なお、本実施の形態においては、図 6に示した第 3切替部 93と同様の構成をコンデ ンサ 71E〜71H、 221A、 221Bのいずれ力、 1個以上に適用してコンデンサ 71E〜7 1H、 221A、 221Bと静電容量の異なるコンデンサに切り替えるようにしてもよい。こ のようにすれば発振部 204の発振周波数が変わり、実施の形態 2と同様の効果が得 られる。またこのように発振周波数を変えることによって複数の金属で構成された硬 貨 20Aの材料を識別する構成は、センサ 25やセンサ 26の磁気的接続切り替えを行 わなレ、硬貨識別装置に適用してもよ!/、。  In the present embodiment, the same configuration as that of the third switching unit 93 shown in FIG. 6 is applied to one or more of the capacitors 71E to 71H, 221A, and 221B, and the capacitors 71E to 71E 7 It may be switched to a capacitor having a different capacitance from 1H, 221A, and 221B. In this way, the oscillation frequency of the oscillation unit 204 changes, and the same effect as in the second embodiment can be obtained. In addition, the configuration for identifying the material of the coin 20A made of a plurality of metals by changing the oscillation frequency in this way is applied to a coin identification device that does not switch the magnetic connection of the sensor 25 and the sensor 26. Moyo! /
[0121] なおこれらの実施の形態では整形部 94 (検出回路 45)で包絡線波形を形成してい るがこれに限定されない。例えば検出回路 45をリセットする直前の出力電圧や、測定 間隔における出力電圧のピーク値を検出することでも硬貨 20を識別することはできる In these embodiments, the waveform of the envelope is formed by the shaping unit 94 (detection circuit 45), but the present invention is not limited to this. For example, the coin 20 can be identified by detecting the output voltage immediately before resetting the detection circuit 45 or the peak value of the output voltage at the measurement interval.
〇 Yes
産業上の利用可能性  Industrial applicability
[0122] 本発明による硬貨識別装置は、硬貨の材質と材厚の相互関係をほぼ同一位置で 検知して精密な識別ができるので、自動販売機等に搭載される硬貨識別装置として 有用である。 [0122] The coin discriminating device according to the present invention is useful as a coin discriminating device mounted on a vending machine or the like because it can detect and accurately discriminate the mutual relationship between the material and thickness of coins at almost the same position. .

Claims

請求の範囲 The scope of the claims
[1] 一組のコイルを含む第 1センサと、発振回路と、を有し、電源から電圧供給されるとと もに前記一組のコイルの間を硬貨が通過することによって変化する検出信号を出力 する検出部と、  [1] A detection signal that includes a first sensor including a set of coils and an oscillation circuit, and is supplied with a voltage from a power source and changes when a coin passes between the set of coils. A detector that outputs
前記硬貨が前記一組のコイルの間を通過する間に前記一組のコイルの磁気的接続 を同相接続と逆相接続とに複数回切り換える第 1切替部と、  A first switching unit that switches the magnetic connection of the set of coils between in-phase connection and reverse-phase connection a plurality of times while the coin passes between the set of coils;
基準信号を記憶する記憶部と、  A storage unit for storing a reference signal;
前記検出信号と前記基準信号とを比較することにより前記硬貨の真贋と種別とを判 定する制御部と、を備えた、  A control unit that determines the authenticity and type of the coin by comparing the detection signal and the reference signal;
硬貨識別装置。  Coin identification device.
[2] 前記第 1切替部は、 2組のスイッチング部を有し、前記スイッチング部の一方は前記 第 1センサと前記電源との間に接続されている、  [2] The first switching unit has two sets of switching units, and one of the switching units is connected between the first sensor and the power source.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[3] 前記検出部は一組のコイルからなる第 2センサをさらに有する、 [3] The detection unit further includes a second sensor including a set of coils.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[4] 前記第 1センサによる検出信号と前記第 2センサによる検出信号とを切り替えて出力 する第 2切替部をさらに備えた、 [4] The apparatus further includes a second switching unit that switches and outputs the detection signal from the first sensor and the detection signal from the second sensor.
請求項 3記載の硬貨識別装置。  The coin identifying device according to claim 3.
[5] 前記第 2切替部は、前記電源と、前記第 1センサ、前記第 2センサとの間に設けられ た、 [5] The second switching unit is provided between the power source, the first sensor, and the second sensor.
請求項 4記載の硬貨識別装置。  The coin identifying device according to claim 4.
[6] 前記第 2切替部は複数のスイッチング素子で構成された、 [6] The second switching unit includes a plurality of switching elements.
請求項 4記載の硬貨識別装置。  The coin identifying device according to claim 4.
[7] 前記検出部は前記第 1センサに対し接続されたコンデンサをさらに有する、 [7] The detection unit further includes a capacitor connected to the first sensor.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[8] 前記コンデンサは前記第 1センサに対し直列接続されている、 [8] The capacitor is connected in series to the first sensor.
請求項 7記載の硬貨識別装置。  The coin identifying device according to claim 7.
[9] 前記検出部は、複数のコンデンサをさらに有し、 前記硬貨識別装置は、前記第 1センサに対して接続する前記複数のコンデンサを切 り替える第 3切替部をさらに備えた、 [9] The detection unit further includes a plurality of capacitors, The coin identifying device further includes a third switching unit for switching the plurality of capacitors connected to the first sensor.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[10] 前記第 3切替部は複数のスイッチング素子で構成された、 [10] The third switching unit includes a plurality of switching elements.
請求項 9記載の硬貨識別装置。  The coin identifying device according to claim 9.
[11] 前記検出信号をオフセットさせるオフセット電圧を切り替えるオフセット切替回路をさ らに備えた、 [11] An offset switching circuit for switching an offset voltage for offsetting the detection signal is further provided.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[12] 前記発振回路は複数の周波数を切り替えて発振する、 [12] The oscillation circuit oscillates by switching a plurality of frequencies.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[13] 前記検出部のゲインを変化させ、前記検出信号のゲインを切り替えるゲイン切替回 路をさらに備えた、 [13] The apparatus further includes a gain switching circuit that changes the gain of the detection unit and switches the gain of the detection signal.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[14] 前記発振回路は、前記第 1センサのインダクタンス値に関わらず所定の周波数で発 振する他励式発振回路である、 [14] The oscillation circuit is a separately-excited oscillation circuit that oscillates at a predetermined frequency regardless of the inductance value of the first sensor.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[15] 前記発振回路の発振周波数は、前記一組のコイルの間を前記硬貨が通過する前の 同調周波数に基づレ、て設定されてレ、る、 [15] The oscillation frequency of the oscillation circuit is set based on a tuning frequency before the coin passes between the pair of coils.
請求項 14記載の硬貨識別装置。  15. The coin identification device according to claim 14.
[16] 前記一組のコイルが同相接続される際の前記発振回路の発振周波数は、前記一組 のコイルの間を前記硬貨が通過する前の同調周波数より、予め定められた周波数だ け離れて設定された、 [16] The oscillation frequency of the oscillation circuit when the set of coils are connected in phase is separated by a predetermined frequency from the tuning frequency before the coin passes between the set of coils. Set,
請求項 15記載の硬貨識別装置。  The coin identifying device according to claim 15.
[17] 前記一組のコイルが逆相接続される際の前記発振回路の発振周波数は、前記一組 のコイルの間を前記硬貨が通過する前の同調周波数と実質的に同一の周波数に設 定された、 [17] The oscillation frequency of the oscillation circuit when the pair of coils are connected in reverse phase is set to be substantially the same as the tuning frequency before the coin passes between the pair of coils. Defined,
請求項 15記載の硬貨識別装置。  The coin identifying device according to claim 15.
[18] 前記制御部は、前記一組のコイルの間を前記硬貨が通過する前の同調周波数を検 出して、前記発振回路の発振周波数を補正する、 [18] The control unit detects a tuning frequency before the coin passes between the pair of coils. To correct the oscillation frequency of the oscillation circuit,
請求項 14記載の硬貨識別装置。  15. The coin identification device according to claim 14.
[19] 前記発振回路は、前記制御部に制御されて前記発振回路の発振周波数を補正する 分周器を含む、 [19] The oscillation circuit includes a frequency divider that is controlled by the control unit and corrects an oscillation frequency of the oscillation circuit.
請求項 18記載の硬貨識別装置。  The coin identifying device according to claim 18.
[20] 前記検出部は、前記第 1センサに接続され、前記第 1センサとともに同調回路を構成 するコンデンサと、 [20] The detection unit is connected to the first sensor and forms a tuning circuit together with the first sensor;
前記同調回路と接続され、前記同調回路ととともに前記発振回路を構成する増幅部 と、をさらに有し、  An amplifying unit connected to the tuning circuit and forming the oscillation circuit together with the tuning circuit;
前記発振回路は、自励式発振回路である、  The oscillation circuit is a self-excited oscillation circuit.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[21] 前記検出信号を整形して包絡線波形を前記制御部に対して出力する整形部をさら に備えた、 [21] The apparatus further includes a shaping unit that shapes the detection signal and outputs an envelope waveform to the control unit.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
[22] 前記整形部はピークホールド回路と前記ピークホールド回路を初期状態にするリセッ ト回路とを有する、 [22] The shaping unit includes a peak hold circuit and a reset circuit that sets the peak hold circuit to an initial state.
請求項 21記載の硬貨識別装置。  The coin identifying device according to claim 21.
[23] 前記検出部から前記制御部への出力を安定化させる安定化部をさらに備えた、 請求項 1記載の硬貨識別装置。 23. The coin identifying device according to claim 1, further comprising a stabilizing unit that stabilizes an output from the detecting unit to the control unit.
[24] 前記安定化部は、前記検出部と前記制御部との間に接続された緩衝回路で構成さ れた、 [24] The stabilization unit includes a buffer circuit connected between the detection unit and the control unit.
請求項 23記載の硬貨識別装置。  24. The coin identifying device according to claim 23.
[25] 前記安定化部は、前記検出信号をオフセットさせるオフセット電圧を切り替えることで 前記発振回路の発振振幅の立ち上がりを高速化するオフセット切替回路で構成され た、 [25] The stabilization unit is configured by an offset switching circuit that speeds up the rise of the oscillation amplitude of the oscillation circuit by switching an offset voltage that offsets the detection signal.
請求項 23記載の硬貨識別装置。  24. The coin identification device according to claim 23.
[26] 前記第 1切替部は複数のスイッチング素子で構成された、 [26] The first switching unit includes a plurality of switching elements.
請求項 1記載の硬貨識別装置。  The coin identification device according to claim 1.
PCT/JP2007/063708 2006-07-18 2007-07-10 Coin identification device WO2008010434A1 (en)

Priority Applications (2)

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US12/303,325 US20090242354A1 (en) 2006-07-18 2007-07-10 Coin discriminating device
CN2007800267824A CN101490724B (en) 2006-07-18 2007-07-10 Coin identification device

Applications Claiming Priority (4)

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JP2006195252 2006-07-18
JP2006-195252 2006-07-18
JP2007108898A JP5130773B2 (en) 2006-07-18 2007-04-18 Coin identification device
JP2007-108898 2007-04-18

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
EP3196845A4 (en) * 2014-09-16 2018-05-16 Nippon Conlux Co., Ltd. Coin processing device

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Publication number Priority date Publication date Assignee Title
JPH04323580A (en) * 1991-04-23 1992-11-12 Matsushita Electric Works Ltd Battery capacity display device
JPH0696324A (en) * 1992-09-11 1994-04-08 Fuji Electric Co Ltd Coin sorting device
JP2002184470A (en) * 2000-12-11 2002-06-28 Fuji Electric Co Ltd Charge/discharge current measuring apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04323580A (en) * 1991-04-23 1992-11-12 Matsushita Electric Works Ltd Battery capacity display device
JPH0696324A (en) * 1992-09-11 1994-04-08 Fuji Electric Co Ltd Coin sorting device
JP2002184470A (en) * 2000-12-11 2002-06-28 Fuji Electric Co Ltd Charge/discharge current measuring apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3196845A4 (en) * 2014-09-16 2018-05-16 Nippon Conlux Co., Ltd. Coin processing device

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