WO2007117756A2 - Enhanced clock control in packet networks - Google Patents
Enhanced clock control in packet networks Download PDFInfo
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- WO2007117756A2 WO2007117756A2 PCT/US2007/061490 US2007061490W WO2007117756A2 WO 2007117756 A2 WO2007117756 A2 WO 2007117756A2 US 2007061490 W US2007061490 W US 2007061490W WO 2007117756 A2 WO2007117756 A2 WO 2007117756A2
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- time
- clock
- pdu
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- server
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
- H04J3/0661—Clock or time synchronisation among packet nodes using timestamps
- H04J3/0667—Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays
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- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G5/00—Setting, i.e. correcting or changing, the time-indication
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/14—Time supervision arrangements, e.g. real time clock
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/28—Timers or timing mechanisms used in protocols
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/14—Monitoring arrangements
Definitions
- Embodiments of the present invention generally relate to methods of controlling the clock of a network element deployed within a communications network and, more specifically, to enhanced clock control in packet networks.
- each element in the network has its own clock (referred to herein as a "client clock”) running independently of the other clocks in the network.
- Quartz oscillators typically serve as client clocks in network elements, providing frequency to support local timescale generation. While quartz oscillators offer good frequency stability over short term measurement intervals, their intermediate and long term frequency stability does not meet the telecommunications standards. Therefore, client clocks must be checked and corrected against external traceable sources. Furthermore, given the immense number of elements in the network, the clock of each element is required to not only provide good frequency stability over all measurement intervals, but also be reproducible throughout the entire network with the lowest cost per element.
- TDM time-division multiplexing
- SONET time-division multiplexing
- next generation networks may be based on a packet-switched infrastructure (such networks are referred herein as "packet networks") and there may be situations where the physical medium interconnecting network elements is no longer capable of transporting frequency information at the physical layer. Therefore, packed-based methods for transporting timing information are required.
- Figure 1 illustrates a variety of timing sources that may be available to a network element 100.
- Timing sources include a Network Time Protocol (NTP) server 110, a Precision Timing Protocol (PTP) server 120, direct link sources 130, a multicast NTP server 140, a multicast PTP server 150, and a Real-Time Protocol (RTP) server 160.
- NTP server 110 and the PTP server 120 enable packed- based methods for transporting timing information through an IP-WAN 115 and LAN 125, respectively.
- PTP server and "PTP server” as used herein mean that the servers operate in a unicast mode, where there is a secure one to one association between a server and a client ensuring a level of traceability.
- the direct link sources 130 are sources such as Global Positioning Satellite (GPS), Building Integrated Timing Suppy (BITS), SONET, SDH, and PDH, which provide timing information to a network element through a direct link 135.
- the multicast NTP server 140 and multicast PTP server 150 are multicast servers, capable of providing packet-based timing information with an N to M association between a server and a client, where N and M may be any integer greater or equal to one and N «M.
- Timing sources Even though a variety of timing sources may be available to the network element 100, not all timing sources are available in all cases. Also, their frequency stability is not always satisfactory for the telecommunications standard.
- Primary tier inputs refer to timing information that comes over a verifiable (traceable) path from a known reliable timing source, such as the NTP server 110, the PTP server 120, or direct link sources 130.
- “Secondary tier inputs” originate from a better or equal stratum source than the local oscillator, but are not explicitly verifiable.
- the multicast NTP server 140 and multicast PTP server 150 could be used as secondary tier inputs, which would allow extracting time and frequency information with lower cost, lower power local oscillators without adding the burden of additional client transactions to the primary tier sources.
- One embodiment of the present invention sets forth a method for autonomously validating the time and frequency information received from a server clock and generating a frequency estimate between a client clock and the server clock.
- the method includes the steps of receiving at least two protocol data units (PDUs), where each PDU includes a plurality of time stamps, extracting the plurality of time stamps from each PDU, and performing an offset measurement for each PDU to compute a time offset between the client clock and the server clock for each PDU, where each offset measurement is based on at least two of the time stamps associated with the PDU for which the offset measurement is being performed.
- PDUs protocol data units
- the method also includes the steps of performing minimum offset filtering (MOF) on the time offsets to remove any time offsets that are based on invalid time stamp data and performing frequency estimate filtering (FEF) on the filtered time offsets to produce the frequency estimate and providing the frequency estimate to the MiFLL to achieve a good stability in the client clock for any specified time measurement interval.
- MOF minimum offset filtering
- FEF frequency estimate filtering
- One advantage of the disclosed methods is that control of the client clock may be achieved by using less trustworthy timing sources such as multicast NTP and multicast PTP servers to supplement the primary tier sources.
- the disclosed methods include the algorithms for cross-checking the measurement data obtained from the multicast NTP and multicast PTP servers, autonomously establishing validity of the channel, and concluding whether the current frequency estimate from a channel may be used in the MiFLL algorithm.
- time and frequency information at the client clocks can be extracted with lower cost, lower power oscillators without adding the burden to the primary tier sources, thereby reducing costs for both the servers and the clients.
- Figure 1 illustrates a variety of timing sources that may be available to a network element
- Figure 2 illustrates the notions of time stamps, according to one embodiment of the present invention
- Figure 3A illustrates frequency estimate generation process, according to one embodiment of the present invention
- FIG. 3B illustrates the steps of the MiFLL PDU measurement process, according to one embodiment of the present invention.
- FIG. 3C illustrates the steps of the MiFLL PDU measurement process, according to another embodiment of the present invention.
- Figure 4 is a conceptual diagram of a synchronization element configured to implement one or more aspects of the present invention.
- Figure 5 illustrates a computing device configured to implement one or more aspects of the present invention.
- Figure 2 illustrates the notions of time stamps, according to one embodiment of the present invention.
- Both the primary tier and the secondary tier sources utilize variants of a time stamping process illustrated in Figure 2.
- a time measurement process may involve four time stamps along a timeline 200, which are defined as follows:
- Ti is a time stamp representing the best estimate of the transmit originating epoch of a protocol data unit (PDU) originating from the clock of a client 210,
- PDU protocol data unit
- T 2 is a time stamp representing the best estimate of the receive termination epoch of a PDU terminating at the clock of a server 220
- T 3 is a time stamp representing the best estimate of the transmit origination epoch of a PDU originating from the clock of the server 220, and
- T 4 is a time stamp representing the best estimate of the receive termination epoch of a PDU terminating at the clock of the client 210.
- Each time stamp represents a critical epoch in a protocol transaction.
- Precise time stamps are typically conveyed in a single packet or, more generally, a single PDU, with the exception of PTP which supports the notion of a follow-up packet with a precise time stamp.
- the time stamps are used to generate an estimate of the frequency difference between the client clock and the originating source clock at the server, referred to herein as a "frequency estimate”.
- the term "channel” is used to reference a particular server clock and an associated path and the term “outlier” is used to reference a timing source that is determined to be invalid.
- FIG. 3A illustrates frequency estimate generation process, according to one embodiment of the present invention.
- Time stamps 305 are supplied to a MiFLL PDU measurement process 310 which filters the error component due to PDV, as described in more details in Figure 3B, and produces an output 375.
- the output 375 may be a frequency estimate with an associated validity flag for a channel associated with the server 220 or a frequency estimate with an associated validity flag and removed frequency outliers.
- the time stamps on a given transaction depend on the type of transaction (one-way or two- way transactions), not all four time stamps T 1 -T 4 are always present in a PDU.
- the transaction is a result of a one-way flow and, therefore, only T 1 and T 2 are present in a PDU.
- the primary tier inputs such as unicast NTP and PTP
- the group of time stamps may consist of all four time stamps. Specifically, for unicast NTP all four time stamps are present in every transaction, but for unicast PTP all four time stamps are present only once every N transactions and the rest of the time there are only time stamps T 1 and T 2 .
- FIG. 3B illustrates the steps of the MiFLL PDU measurement process 310, according to one embodiment of the present invention.
- the process begins in step 320 where a PDU validation is performed. This is a standard step assessing if the packet is formed correctly, if the packet is free of errors, and if the packet has the expected addresses.
- step 320 may check if the packet passes authentication.
- the time stamp data 325 is provided to step 330, where an offset measurement is performed.
- Offset measurements for multicast one way measurements typically does not support any correction for propagation delay while two-way measurement include compensation with time accuracy limited by delay asymmetry in path.
- the offset measurement for one-way transfer operations such as, for example, a packet or PDU flow originating at the clock of the server 220 and terminating at the clock of the client 210 is straight forward.
- the originating time stamp T 3 is recorded with respect to the server view of time (server time scale) while the terminating time stamp T 4 is recorded with respect to the client view of time (client time scale) and the measurement offset S 1n for a transaction n can be calculated as follows:
- the offset measurement is biased by the one-way packet delay.
- the packet delay cannot be estimated with a one-way measurement.
- the packet delay bias can be minimized by weighting measurements over a relatively short temporal frame with lower values.
- the packet flow models for a non-congested network support the notion that a minimum delay floor (discussed in more details in step 340) of a network can be effectively established.
- the residual bias can either be reduced by estimating the one-way delay through some other means, such as using time stamps associated with the reverse direction, or ignored in the case of frequency estimation as frequency offset is simply the rate of change of the phase offset, which is zero for a constant phase bias error.
- step 340 where the minimum offset filter (MOF) pre-processes the offset data to extract data concentrated near the delay floor.
- MOF minimum offset filter
- This step significantly improves the resulting client clock performance.
- One property of packet networks is that packet delay variation has a distribution function with a "floor".
- the floor is defined herein as the minimum delay that a packet or a PDU can experience in a given path.
- the floor can be viewed as a condition where both output and system queues (in all equipment that is involved in the flow, including the source, destination, and intervening elements) are near their minimum when a particular packet needs the resource.
- floor-based transfer noise will have the minimum limited to the following four factors.
- First factor is the physical layer propagation "speed of light" delay.
- Second - is the time stamp resolution.
- Third - mapping delays over TDM-based transport.
- fourth limiting factor is other small delay variation mechanisms such as physical layer clock jitter and backplane clock domain jitter.
- the MOF algorithm of step 340 utilizes data associated with each channel at time epoch n and channel measurement property data.
- the following data is associated with each channel at time epoch n:
- ⁇ utm i[n] the un-tilted measurement offset estimate of the i th channel at time index n;
- Out_Validj[n] the output validity flag of the i th channel at time index n.
- Each buffer entry is indexed by the time epoch index (n).
- a circular buffer implementation is a preferred means to efficiently operate on the last N samples.
- the initialization condition is ln_Valid [j] and Out Valid[j] is FALSE for all entries in the buffer.
- resj the native timestamp resolution of the measurement (nanoseconds per Isb);
- bufmini the minimum number of valid buffer entries required to process a valid output
- slewm o f the slew limiting factor to constrain outlier induced deviation from the floor 0 ⁇ slew mO f ⁇ 1.
- the MOF algorithm of step 340 is as follows:
- Step 1 Add the current (index n) sample to the MOF buffer and remove the oldest index sample.
- Step 2 Verify that at least bufminj of the inputs are valid. If not, set current Out_Va1 idi[n] to false and exit.
- Step 3 Update the un-tilted buffer entries.
- Step 3a Calculate the new tilt factor:
- Step 3b Initialize cumulative tilt (ctilt) to zero;
- Step 3c Operate on the circular store as follows.
- the current sample is n modulo N and the oldest sample is (n-N+l) modulo N.
- Set index j (n-N+l) modulo N;
- Step 3d: ⁇ utmi [j] ⁇ mi [j]+ctilt;
- Step 3g: j (j+ 1 ) modulo N go to step 3d.
- Step 4 Update the current minimum measurement offset value at time n.
- Step 4a Search through the set of un-tilted entries (with in_valid set TRUE) and determine the index jfi OO r of the minimum entry. In cases of ties, the newer entries have priority;
- minimum offset data 345 is provided to step 350, where a frequency estimate filter (FEF) performs a linear filtering process and generates the rate of change of phase delay (fractional frequency error) of a particular input channel with respect to the local oscillator.
- FEF frequency estimate filter
- the output 375 of the FEF algorithm is a frequency estimate and an associated validity flag for the current channel.
- FEF algorithm presented in this embodiment constitutes a computationally efficient operation.
- the FEF algorithm of step 350 utilizes data associated with each channel at time epoch n and FEF data.
- the following data is associated with each channel at time epoch n:
- f est i[n] the output frequency estimate with respect to the local oscillator of the i th channel at time index n;
- Out_FEF_Validi[n] the output validity flag of the i th channel at time index n.
- the five data elements defined are maintained if the FEF buffer. Each buffer entry is indexed by the time epoch index (n).
- a circular buffer implementation is a preferred means to efficiently operate on the last N samples.
- the initialization condition is ln_FEF_Valid [j] and Out_FEF_Valid[j] is FALSE for all entries in the buffer.
- the FEF data for the FEF algorithm of step 350 is defined as follows:
- Buffer depth is 2 bl (M) elements
- r est the ratio parameter to control the time constant of the secondary stage frequency-smoothing filter.
- the FEF algorithm of step 350 is as follows:
- Step 1 Add the current (index n) sample to the FEF buffer and remove the oldest index sample.
- Step 2 If the input data is valid update the osmini[n] parameter as:
- Step 3 Convert to a smoothed frequency estimate.
- Step 3a If the both the newest and oldest ln_FEF_Validj[n] entries are valid, convert to a frequency to a frequency estimate:
- Step 3b Else set current entry Out_FEF_Validi[n]: to FALSE.
- Step 4 If the Out_FEF_Valid is TRUE update the f est i[n] parameter as:
- FIG. 3C illustrates the steps of the MiFLL PDU measurement process 310, according to another embodiment of the present invention.
- steps 320, 330, 340, and 350 are as described in Figure 3B with an additional step 360.
- a frequency estimate 355 is provided to step 360, where the frequency clustering (FC) algorithm detects and removes frequency estimation outliers that are inconsistent with the previous channel behavior before these outliers can negatively impact the client output frequency.
- FC frequency clustering
- the expectation is that the frequency estimates associated with individual server clocks and associated paths should be similar at a given time epoch n.
- the similarity in the estimate is based on the following three assumptions. First assumption is that the local oscillator frequency offset is common to all measurements at a given time epoch.
- the FC algorithm serves to accommodate the difference in steady state PDV between the channels.
- the FC algorithm accommodates gradual changes in the underlying stability of a frequency estimate.
- real-world effects such as loading or path changes, are anticipated.
- the FC algorithm detecting and removing frequency outliers, may be viewed as a firewall which eliminates detectable outliers. Noise effects within this firewall cannot be eliminated, but the weighted ensembling in the MiFLL section of the algorithm is designed to minimize the effect.
- the FC algorithm of step 360 utilizes data associated with each channel at time epoch n, defined as follows:
- fj[n] the frequency error estimate with respect to the local oscillator of the i lh channel at time index n;
- Cluster_Validj[n] the cluster validity flag of the i th channel at time index n;
- ⁇ ci [n] smoothing factor for the i th channel cluster Allan variance filter at time index n. (0 ⁇ min ⁇ c ⁇ m ax ⁇ 1 ).
- FC algorithm of step 360 is as follows:
- Step 1 Initialize all Cluster_Valid flags to TRUE.
- Step 2 Calculate m, where m is the number of elements with both ln_Valid and Cluster_Valid asserted.
- Step 3 Calculate the centroid of the candidate cluster:
- Step 4 For each valid channel:
- Step 4b If the distance exceeds threshold
- Step 5 Recalculate m. If no change then clustering is complete else go to Step 3.
- the Allan Variance is a metric for estimating frequency stability of real- world random frequency processes.
- the frequency estimation samples fj[n] are with respect to the local free-running oscillator.
- the MiFLL algorithms are based on allowing the local oscillator to operate in the free-run state. There is no necessity to varactor-steer the oscillator which will, in turn, introduce noise and non-linear effects.
- varactor steering is employed the MiFLL algorithm is readily extended by utilizing an estimate of the steering correction to effectively obtain free-running data.
- the final output of the system is usually accomplished with digital frequency synthesis to compensate for the open loop (free-running) error in the local oscillator.
- the variance estimate would be biased by the oscillator noise over the integration time used for frequency estimation.
- this excess oscillator noise is very small compared to the channel noise, and the local oscillator can be used as reference for the short term input noise calculation.
- Allan Variance estimates are only updated after the clustering algorithm is completed at time n. Only the valid set of m channels is updated.
- An Allan Variance sample is constructed for a channel as follows:
- ⁇ c ⁇ [n] is the smoothing factor for the i th channel cluster Allan variance filter at time index n.
- the smoothing factor balances the responsiveness of the estimator to gradually changes in the noise level with the confidence interval of the estimator.
- the behavior is constrained by a global maximum and minimum value (0 ⁇ C i[n] ⁇ c ⁇ ma ⁇ 1).
- ⁇ cl is set to ⁇ max and gradually reduced to ⁇ min as follows:
- ⁇ ci [n] (1 - ⁇ c ) ⁇ C i[n-1] + a c ⁇ C i[n], where a c is the global adaptation factor for the system.
- both ⁇ ci is set to ⁇ max and ⁇ 2 i[n] is set to a global maximum level ⁇ 2 Cmax - All channels need to be initialized at the system startup. Also, after a persistent period of invalid condition (either input or cluster), the channel should be re-initialized.
- FIG. 4 is a conceptual diagram of a synchronization element 400 configured to implement one or more aspects of the present invention.
- the synchronization element 400 includes, without limitation, a clock unit 410, a frequency estimate generating unit 430, a network protocol stack 460, a media access controller (MAC) 470, and a physical layer (PHY) 480.
- the synchronization element 400 transmits packets over the transmitting output (TX) 485 and receives packets over the receiving input (RX) 495.
- the clock unit 410 includes, without limitation, a time stamp unit (TSU) 415 to generate the time stamps and a client clock 425.
- TSU time stamp unit
- the frequency estimate generating unit 430 includes, without limitation, a port interface 435, a time stamp interface 445, and a clock interface 455.
- the frequency estimate generating unit 430 implements the algorithms described herein with the binding to the client clock 425 and the hardware TSU 415.
- the port interface 435 is used to dispatch and/or receive multicast NTP and PTP messages.
- the time stamp interface 445 is used to dispatch and/or receive time stamps. In certain instantiations the timestamp interface 445 and port interface 435 may be integrated into a single combined interface.
- the clock interface 455 is used to read and modify the local clock 425 in accordance with the result generated in the frequency estimate generating unit 430.
- the synchronization element 400 can be implemented in any processor that contains a time stamping unit and a local clock.
- FIG. 5 illustrates a computing device 500 configured to implement one or more aspects of the present invention.
- the computing device 500 includes a processor 510, a memory 515, and an application circuitry 520.
- the memory 515 and the application circuitry 520 are coupled to the processor 510.
- the processor 510 includes the synchronization element 400.
- the synchronization element 400 executes the algorithms described in the present invention and enables the client clock 425 within the computing device 500 to be synchronized with the most precise server clocks on the network.
- the computing device 500 may be any type of computing device that includes application circuitry requiring a client clock to produce a timing signal.
- computing device examples include, without limitation, a personal computer, a data center server, a router, an IP telephony device, a cellular phone, and a personal digital assistant.
- the more likely instantiation is in embedded computing devices with built-in timestamp and clock support.
- These computing devices find general application is telecommunication and industrial applications required client synchronization including DSL aggregators, passive optical networks ONUs and wireless base stations and access points.
- the present invention enables a computing device to
- One advantage of the disclosed methods is that control of the client clock may be achieved by using less trustworthy timing sources such as multicast NTP and multicast PTP servers to supplement the primary tier sources.
- the disclosed methods include the algorithms for cross-checking the measurement data obtained from the multicast NTP and multicast PTP servers, autonomously establishing validity of the channel, and concluding whether the current frequency estimate from a channel may be used in the MiFLL algorithm.
- time and frequency information at the client clocks can be generated with lower cost, lower power oscillators without adding the burden to the primary tier sources, thereby reducing costs for both the servers and the clients.
- the disclosed methods classify the various timing sources available in terms of "validity” and "suitability” and weigh them appropriately for use in the overall solution.
- Such a classification improves the outcome of the MiFLL algorithm because only the most reliable primary and secondary tier inputs are supplied to the MiFLL.
- the disclosed methods enable client clocks with good stability for the short term, intermediary, and long term measurement intervals that are easily reproducible throughout an entire network.
- the present invention can be implemented in hardware or software, with the software being delivered as a program product for use with a computer system.
- the program(s) of the program product defines functions of the embodiments (including the methods described herein) and can be contained on a variety of computer-readable storage media.
- Illustrative computer-readable storage media include, but are not limited to: (i) non-writable storage media (e.g., read-only memory devices within a computer such as CD-ROM disks readable by a CD-ROM drive) on which information is permanently stored; (ii) writable storage media (e.g., floppy disks within a diskette drive or hard-disk drive) on which alterable information is stored.
- Such computer-readable storage media when carrying computer- readable instructions that direct the functions of the present invention, are embodiments of the present invention.
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Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
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JP2008553517A JP2009525710A (en) | 2006-02-01 | 2007-02-01 | Advanced clock control in packet networks |
AU2007235206A AU2007235206A1 (en) | 2006-02-01 | 2007-02-01 | Enhanced clock control in packet networks |
EP07756590.1A EP1984837B1 (en) | 2006-02-01 | 2007-02-01 | Enhanced clock control in packet networks |
MX2008010018A MX2008010018A (en) | 2006-02-01 | 2007-02-01 | Enhanced clock control in packet networks. |
CN2007800120035A CN101416431B (en) | 2006-02-01 | 2007-02-01 | Enhanced clock control in packet networks |
BRPI0707441-7A BRPI0707441A2 (en) | 2006-02-01 | 2007-02-01 | improved clock control in packet networks |
CA002653145A CA2653145A1 (en) | 2006-02-01 | 2007-02-01 | Enhanced clock control in packet networks |
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US76396706P | 2006-02-01 | 2006-02-01 | |
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US11/669,882 US8064484B2 (en) | 2006-02-01 | 2007-01-31 | Enhanced clock control in packet networks |
US11/669,882 | 2007-01-31 |
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EP (1) | EP1984837B1 (en) |
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CN (1) | CN101416431B (en) |
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- 2007-02-01 MX MX2008010018A patent/MX2008010018A/en unknown
- 2007-02-01 KR KR1020087021430A patent/KR20080107402A/en not_active Application Discontinuation
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Also Published As
Publication number | Publication date |
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US8064484B2 (en) | 2011-11-22 |
MX2008010018A (en) | 2009-02-05 |
EP1984837A4 (en) | 2013-04-03 |
AU2007235206A1 (en) | 2007-10-18 |
CN101416431A (en) | 2009-04-22 |
KR20080107402A (en) | 2008-12-10 |
JP2009525710A (en) | 2009-07-09 |
EP1984837B1 (en) | 2019-05-08 |
WO2007117756A3 (en) | 2008-09-25 |
EP1984837A2 (en) | 2008-10-29 |
BRPI0707441A2 (en) | 2011-05-03 |
CA2653145A1 (en) | 2007-10-18 |
US20080049743A1 (en) | 2008-02-28 |
CN101416431B (en) | 2013-06-12 |
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