WO2007107932A3 - Method and apparatus for vector processing of digital signal - Google Patents

Method and apparatus for vector processing of digital signal Download PDF

Info

Publication number
WO2007107932A3
WO2007107932A3 PCT/IB2007/050904 IB2007050904W WO2007107932A3 WO 2007107932 A3 WO2007107932 A3 WO 2007107932A3 IB 2007050904 W IB2007050904 W IB 2007050904W WO 2007107932 A3 WO2007107932 A3 WO 2007107932A3
Authority
WO
WIPO (PCT)
Prior art keywords
vector processing
digital signal
matrix signals
vector
signals
Prior art date
Application number
PCT/IB2007/050904
Other languages
French (fr)
Other versions
WO2007107932A2 (en
Inventor
Xia Zhu
Original Assignee
Koninkl Philips Electronics Nv
Xia Zhu
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Xia Zhu filed Critical Koninkl Philips Electronics Nv
Publication of WO2007107932A2 publication Critical patent/WO2007107932A2/en
Publication of WO2007107932A3 publication Critical patent/WO2007107932A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G06F15/8084—Special arrangements thereof, e.g. mask or switch

Abstract

The present invention provides a method and apparatus for performing vector processing on matrix signals in a vector processor, which transforms triangular matrix signals by using its vector processing rule, to form rectangular matrix signals, and then performs a corresponding vector processing on the rectangular matrix signals, so as to improve the operation efficiency and save storage resources.
PCT/IB2007/050904 2006-03-23 2007-03-16 Method and apparatus for vector processing of digital signal WO2007107932A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN200610071776.8 2006-03-23
CN200610071776 2006-03-23

Publications (2)

Publication Number Publication Date
WO2007107932A2 WO2007107932A2 (en) 2007-09-27
WO2007107932A3 true WO2007107932A3 (en) 2009-03-05

Family

ID=38436828

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2007/050904 WO2007107932A2 (en) 2006-03-23 2007-03-16 Method and apparatus for vector processing of digital signal

Country Status (1)

Country Link
WO (1) WO2007107932A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101132267B (en) * 2007-09-29 2010-06-16 中兴通讯股份有限公司 Method for generating and analyzing continuous resource allocation signal and device thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050071412A1 (en) * 2003-09-29 2005-03-31 International Business Machines Corporation Method and structure for producing high performance linear algebra routines using a hybrid full-packed storage format
US20060173947A1 (en) * 2005-01-31 2006-08-03 International Business Machines Corporation Method and structure for a hybrid full-packed storage format as a single rectangular format data structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050071412A1 (en) * 2003-09-29 2005-03-31 International Business Machines Corporation Method and structure for producing high performance linear algebra routines using a hybrid full-packed storage format
US20060173947A1 (en) * 2005-01-31 2006-08-03 International Business Machines Corporation Method and structure for a hybrid full-packed storage format as a single rectangular format data structure

Non-Patent Citations (8)

* Cited by examiner, † Cited by third party
Title
AGARWAL R C ET AL: "Vector and parallel algorithms for Cholesky factorization on IBM 3090", PROCEEDINGS OF THE 1989 ACM/IEEE CONFERENCE ON SUPERCOMPUTING, 13-17 NOVEMBER 1989, RENO, NEVADA, USA, vol. 2, 13 November 1989 (1989-11-13), pages 225 - 233, XP000090885, ISBN: 978-0-89791-341-6 *
CHI XUEBIN ET AL: "Developing high performance BLAS, LAPACK and ScaLAPACK on HITACHI SR8000", PROCEEDINGS OF THE FOURTH INTERNATIONAL CONFERENCE/EXHIBITION ON HIGH PERFORMANCE COMPUTING IN THE ASIA-PACIFIC REGION, 14-17 MAY 2000, BEIJING, CHINA, vol. 2, 2000, pages 993 - 997 vol.2, XP002508768, ISBN: 0-7695-0589-2 *
GARG V ET AL: "Performance modeling of dense Cholesky factorization on the MasPar MP-2", CONCURRENCY: PRACTICE AND EXPERIENCE, vol. 9, no. 7, July 1997 (1997-07-01), pages 697 - 719, XP002508769 *
GUNNELS J A ET AL: "A new array format for symmetric and triangular matrices", APPLIED PARALLEL COMPUTING, PARA 2004, LECTURE NOTES IN COMPUTER SCIENCE, vol. 3732, February 2006 (2006-02-01), pages 247 - 255, XP019028527, ISBN: 978-3-540-29067-4 *
GUSTAVSON F G: "New generalized data structures for matrices lead to a variety of high performance dense linear algebra algorithms", APPLIED PARALLEL COMPUTING, PARA 2004, LECTURE NOTES IN COMPUTER SCIENCE, vol. 3732, February 2006 (2006-02-01), pages 11 - 20, XP019028517, ISBN: 978-3-540-29067-4 *
JUNG J H ET AL: "Exploiting structure of symmetric or triangular matrices on a GPU", WORKSHOP ON GENERAL PURPOSE PROCESSING ON GRAPHICS PROCESSING UNITS, 4 OCTOBER 2007, BOSTON, MA, USA, XP002508770, Retrieved from the Internet <URL:https://www.cs.umd.edu/~jjung/research/cholgpu/Exploiting_Structure.pdf> [retrieved on 20081218] *
ORTEGA J M ET AL: "The ijk forms of factorization methods II. Parallel systems", PARALLEL COMPUTING, vol. 7, no. 2, June 1988 (1988-06-01), pages 149 - 162, XP000081488, ISSN: 0167-8191 *
ORTEGA J M: "The ijk forms of factorization methods I. Vector computers", PARALLEL COMPUTING, vol. 7, no. 2, June 1988 (1988-06-01), pages 135 - 147, XP000004248, ISSN: 0167-8191 *

Also Published As

Publication number Publication date
WO2007107932A2 (en) 2007-09-27

Similar Documents

Publication Publication Date Title
MY188206A (en) Adaptive processing with multiple media processing nodes
WO2007132404A3 (en) Method for changing over from a first adaptive data processing version to a second adaptive data processing version
WO2012068494A3 (en) Context switch method and apparatus
WO2010047794A3 (en) Environmental data collection
WO2009051065A1 (en) Image generation method, device, its program and recording medium with program recorded therein
MX2009000520A (en) Methods for producing fuels and solvents.
WO2009093956A8 (en) Method, apparatus, and computer program product for improved graphics performance
WO2010086194A3 (en) Apparatus, method and computer program for manipulating an audio signal comprising a transient event
WO2011084214A3 (en) Method and apparatus for performing a shift and exclusive or operation in a single instruction
EP2300913A4 (en) Methods and systems for developing, debugging, and executing data integration applications
WO2007078913A3 (en) Cross-architecture execution optimization
WO2011034561A8 (en) Method and system for processing an image received from a remote source
NO20090572L (en) Seismic data processing
WO2010138861A3 (en) Contextual content targeting
WO2009157707A3 (en) Image processing method and apparatus
EP1857938A4 (en) Information processing apparatus and information processing method
WO2009008886A3 (en) Client-side in formation processing system, apparatus and methods
WO2012106416A8 (en) Method and apparatus for compressive sensing of sparse signals with reduced compression complexity
WO2012088218A3 (en) Method and computing systems for improved imaging of acquired data
EP2016563B8 (en) Method for improving the performance in processing an interprocess digital mockup
WO2010071310A3 (en) Method and apparatus for enhancing performance of doherty power amplifier
WO2012027571A3 (en) Circuit and method for computing circular convolution in streaming mode
WO2009038013A1 (en) Noise removal system, noise removal method, and noise removal program
WO2009125945A3 (en) Photoresist stripper composition, and a photoresist peeling method employing the same
EA201291224A1 (en) METHOD FOR EXTRACTING BETAINE FROM MELASSES

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07735138

Country of ref document: EP

Kind code of ref document: A2

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07735138

Country of ref document: EP

Kind code of ref document: A2