WO2007074423A3 - Method and system for byte slice processing data packets at a packet switch - Google Patents
Method and system for byte slice processing data packets at a packet switch Download PDFInfo
- Publication number
- WO2007074423A3 WO2007074423A3 PCT/IB2006/055051 IB2006055051W WO2007074423A3 WO 2007074423 A3 WO2007074423 A3 WO 2007074423A3 IB 2006055051 W IB2006055051 W IB 2006055051W WO 2007074423 A3 WO2007074423 A3 WO 2007074423A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- packet
- data packets
- processor
- packet switch
- switch
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/50—Overload detection or protection within a single switching element
- H04L49/505—Corrective measures
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3072—Packet splitting
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9042—Separate storage for different parts of the packet, e.g. header and payload
Abstract
A method and system for byte slice processing of received data packets at a packet switch is provided. When a data packet is received at the packet switch, the packet is buffered by a buffer manager and then processed by a processor to determine to which outgoing port to send the packet. When aggregate bandwidth of all incoming ports is high, resources of the processor can be optimized to minimize hardware logic, and maximize a processing rate of the switch. One optimization is to limit the number of bytes that are sent to the processor based on some preliminary identification of packet type together with known configuration information about the receiving port interface type, so that only information within the data packets that is deemed necessary is sent to the processor.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US32200405A | 2005-12-29 | 2005-12-29 | |
US11/322,004 | 2005-12-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2007074423A2 WO2007074423A2 (en) | 2007-07-05 |
WO2007074423A3 true WO2007074423A3 (en) | 2009-05-07 |
Family
ID=38218366
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2006/055051 WO2007074423A2 (en) | 2005-12-29 | 2006-12-28 | Method and system for byte slice processing data packets at a packet switch |
Country Status (1)
Country | Link |
---|---|
WO (1) | WO2007074423A2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113033673B (en) * | 2021-03-24 | 2022-10-25 | 河南中烟工业有限责任公司 | Training method and system for motor working condition abnormity detection model |
US20220116325A1 (en) * | 2021-12-22 | 2022-04-14 | Intel Corporation | Packet format adjustment technologies |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6160819A (en) * | 1998-02-19 | 2000-12-12 | Gte Internetworking Incorporated | Method and apparatus for multiplexing bytes over parallel communications links using data slices |
US6237052B1 (en) * | 1996-05-03 | 2001-05-22 | Netcell Corporation | On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively |
US20020085507A1 (en) * | 2000-12-28 | 2002-07-04 | Maple Optical Systems, Inc. | Address learning technique in a data communication network |
US6690646B1 (en) * | 1999-07-13 | 2004-02-10 | International Business Machines Corporation | Network capacity planning based on buffers occupancy monitoring |
US20050041665A1 (en) * | 2003-08-20 | 2005-02-24 | 3Com Corporation | System and method for distributed multicast routing |
-
2006
- 2006-12-28 WO PCT/IB2006/055051 patent/WO2007074423A2/en active Application Filing
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6237052B1 (en) * | 1996-05-03 | 2001-05-22 | Netcell Corporation | On-the-fly redundancy operation for forming redundant drive data and reconstructing missing data as data transferred between buffer memory and disk drives during write and read operation respectively |
US6160819A (en) * | 1998-02-19 | 2000-12-12 | Gte Internetworking Incorporated | Method and apparatus for multiplexing bytes over parallel communications links using data slices |
US6690646B1 (en) * | 1999-07-13 | 2004-02-10 | International Business Machines Corporation | Network capacity planning based on buffers occupancy monitoring |
US20020085507A1 (en) * | 2000-12-28 | 2002-07-04 | Maple Optical Systems, Inc. | Address learning technique in a data communication network |
US20050041665A1 (en) * | 2003-08-20 | 2005-02-24 | 3Com Corporation | System and method for distributed multicast routing |
Also Published As
Publication number | Publication date |
---|---|
WO2007074423A2 (en) | 2007-07-05 |
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