WO2007067635A3 - Eliminating clock skew by using bidirectional signaling - Google Patents

Eliminating clock skew by using bidirectional signaling Download PDF

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Publication number
WO2007067635A3
WO2007067635A3 PCT/US2006/046573 US2006046573W WO2007067635A3 WO 2007067635 A3 WO2007067635 A3 WO 2007067635A3 US 2006046573 W US2006046573 W US 2006046573W WO 2007067635 A3 WO2007067635 A3 WO 2007067635A3
Authority
WO
WIPO (PCT)
Prior art keywords
signal transmission
signal
transmission system
periodic
clock skew
Prior art date
Application number
PCT/US2006/046573
Other languages
French (fr)
Other versions
WO2007067635A2 (en
Inventor
Vladimir Prodanov
Mihai Banu
Bryan D Ackland
Original Assignee
Applied Materials Inc
Vladimir Prodanov
Mihai Banu
Bryan D Ackland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc, Vladimir Prodanov, Mihai Banu, Bryan D Ackland filed Critical Applied Materials Inc
Publication of WO2007067635A2 publication Critical patent/WO2007067635A2/en
Publication of WO2007067635A3 publication Critical patent/WO2007067635A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G06F1/105—Distribution of clock signals, e.g. skew in which the distribution is at least partially optical
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
    • H04L7/0012—Synchronisation information channels, e.g. clock distribution lines by comparing receiver clock with transmitter clock

Abstract

A clock signal distribution circuit including: a signal transmission system having first and second signal transmission lines, each extending from the first end to the second end of the signal transmission system, the first signal transmission line for carrying a first periodic signal from the first end to the second end of the signal transmission system, the second signal transmission line for carrying a second periodic signal from the second end to the first end of the signal transmission system transmission; and a local clock signal generator circuit including a detector system for detecting at a preselected location along the signal transmission system the first and second periodic signals, wherein the generator circuit generates from both the detected first and second periodic signals a local clock signal that has a predetermined skew that is between to the skews of the detected first and second periodic signals.
PCT/US2006/046573 2005-12-06 2006-12-06 Eliminating clock skew by using bidirectional signaling WO2007067635A2 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US74280305P 2005-12-06 2005-12-06
US60/742,803 2005-12-06
US75118005P 2005-12-16 2005-12-16
US60/751,180 2005-12-16
US11/407,315 US20070127922A1 (en) 2005-12-06 2006-04-18 Eliminating clock skew by using bidirectional signaling
US11/407,315 2006-04-18

Publications (2)

Publication Number Publication Date
WO2007067635A2 WO2007067635A2 (en) 2007-06-14
WO2007067635A3 true WO2007067635A3 (en) 2008-05-08

Family

ID=38118882

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/046573 WO2007067635A2 (en) 2005-12-06 2006-12-06 Eliminating clock skew by using bidirectional signaling

Country Status (3)

Country Link
US (1) US20070127922A1 (en)
TW (1) TW200737724A (en)
WO (1) WO2007067635A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103209154B (en) * 2007-07-20 2016-12-28 蓝色多瑙河系统公司 Phase synchronized local carriers is utilized to produce the method and system of multi-point signal

Citations (2)

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US6647506B1 (en) * 1999-11-30 2003-11-11 Integrated Memory Logic, Inc. Universal synchronization clock signal derived using single forward and reverse direction clock signals even when phase delay between both signals is greater than one cycle
US20050047445A1 (en) * 2003-08-29 2005-03-03 Stepanov Dmitrii Yu Clock signal distribution network and method

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Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6647506B1 (en) * 1999-11-30 2003-11-11 Integrated Memory Logic, Inc. Universal synchronization clock signal derived using single forward and reverse direction clock signals even when phase delay between both signals is greater than one cycle
US7043657B1 (en) * 1999-11-30 2006-05-09 Integrated Memory Logic, Inc. Universal synchronization clock signal derived using single forward and reverse direction clock signals even when phase delay between both signals is greater than one cycle
US20050047445A1 (en) * 2003-08-29 2005-03-03 Stepanov Dmitrii Yu Clock signal distribution network and method

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
PRODANOV V. ET AL.: "GHz Serial Passive Clockk Distribution in VLSI Using Bidirectional Signaling", CONFERENCE 2006, IEEE CUSTOM INTEGRATED CIRCUITS, 1 September 2006 (2006-09-01), pages 285 - 288, XP031052472 *
YANG Y.C. ET AL.: "A One-Wire Approach for Skew-Compensating Clock Distribution Based on Bidirectional Techniques", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 36, no. 2, February 2001 (2001-02-01), XP011061452 *

Also Published As

Publication number Publication date
WO2007067635A2 (en) 2007-06-14
US20070127922A1 (en) 2007-06-07
TW200737724A (en) 2007-10-01

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