WO2007048387A3 - Semiconductor component comprising a p-n junction, and method for the production thereof - Google Patents

Semiconductor component comprising a p-n junction, and method for the production thereof Download PDF

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Publication number
WO2007048387A3
WO2007048387A3 PCT/DE2006/001848 DE2006001848W WO2007048387A3 WO 2007048387 A3 WO2007048387 A3 WO 2007048387A3 DE 2006001848 W DE2006001848 W DE 2006001848W WO 2007048387 A3 WO2007048387 A3 WO 2007048387A3
Authority
WO
WIPO (PCT)
Prior art keywords
junction
semiconductor component
production
conducting region
semiconductor
Prior art date
Application number
PCT/DE2006/001848
Other languages
German (de)
French (fr)
Other versions
WO2007048387A2 (en
Inventor
Anton Mauder
Frank Pfirsch
Hans-Joachim Schulze
Stefan Sedlmaier
Armin Willmeroth
Original Assignee
Infineon Technologies Austria
Anton Mauder
Frank Pfirsch
Hans-Joachim Schulze
Stefan Sedlmaier
Armin Willmeroth
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Austria, Anton Mauder, Frank Pfirsch, Hans-Joachim Schulze, Stefan Sedlmaier, Armin Willmeroth filed Critical Infineon Technologies Austria
Publication of WO2007048387A2 publication Critical patent/WO2007048387A2/en
Publication of WO2007048387A3 publication Critical patent/WO2007048387A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/161—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/30—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface
    • H01L29/32—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by physical imperfections; having polished or roughened surface the imperfections being within the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors

Abstract

The invention relates to a semiconductor component (1) and a method for producing the same. The semiconductor component (3) comprises a semiconductor member (4) in which a p-n junction is disposed that is provided with a p-conducting region (11) and an n-conducting region (9). The p-conducting region (11) or the n-conducting region (9) of the p-n junction encompasses areas (23) which spatially define the p-n junction within the semiconductor member (4).
PCT/DE2006/001848 2005-10-24 2006-10-19 Semiconductor component comprising a p-n junction, and method for the production thereof WO2007048387A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
DE102005051180 2005-10-24
DE102005051180.5 2005-10-24
DE102006004627A DE102006004627B3 (en) 2005-10-24 2006-01-31 Power semiconductor device with charge compensation structure and method for producing the same
DE102006004627.7 2006-01-31

Publications (2)

Publication Number Publication Date
WO2007048387A2 WO2007048387A2 (en) 2007-05-03
WO2007048387A3 true WO2007048387A3 (en) 2007-09-27

Family

ID=37775138

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/DE2006/001848 WO2007048387A2 (en) 2005-10-24 2006-10-19 Semiconductor component comprising a p-n junction, and method for the production thereof

Country Status (2)

Country Link
DE (1) DE102006004627B3 (en)
WO (1) WO2007048387A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007044414A1 (en) * 2007-09-17 2009-03-19 Infineon Technologies Austria Ag Semiconductor component e.g. MOS field effect transistor, has intermediate zones arranged on ditch walls, where intermediate zones are high-impedance with respect to loading compensation zones and drift zones
US20090236680A1 (en) * 2008-03-20 2009-09-24 Infineon Technologies Austria Ag Semiconductor device with a semiconductor body and method for its production
US7943449B2 (en) 2008-09-30 2011-05-17 Infineon Technologies Austria Ag Semiconductor component structure with vertical dielectric layers
US8183666B2 (en) * 2009-10-29 2012-05-22 Infineon Technologies Ag Semiconductor device including semiconductor zones and manufacturing method
CN114784132B (en) * 2022-04-18 2023-06-27 杭州电子科技大学 Silicon carbide micro-groove neutron detector structure

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030122222A1 (en) * 2001-12-27 2003-07-03 Hideki Okumura Semiconductor device having vertical metal insulator semiconductor transistor and method of manufacturing the same
US20050029222A1 (en) * 2001-09-27 2005-02-10 Xingbi Chen Method of manufacturing semiconductor device having composite buffer layer
US20050167742A1 (en) * 2001-01-30 2005-08-04 Fairchild Semiconductor Corp. Power semiconductor devices and methods of manufacture

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10340131B4 (en) * 2003-08-28 2005-12-01 Infineon Technologies Ag Semiconductor power device with charge compensation structure and monolithic integrated circuit, and method for its production

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050167742A1 (en) * 2001-01-30 2005-08-04 Fairchild Semiconductor Corp. Power semiconductor devices and methods of manufacture
US20050029222A1 (en) * 2001-09-27 2005-02-10 Xingbi Chen Method of manufacturing semiconductor device having composite buffer layer
US20030122222A1 (en) * 2001-12-27 2003-07-03 Hideki Okumura Semiconductor device having vertical metal insulator semiconductor transistor and method of manufacturing the same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
OSTEN H J ET AL: "Carbon-containing group IV heterostructures on Si: properties and device applications", PREPARATION AND CHARACTERIZATION, ELSEVIER SEQUOIA, NL, vol. 321, no. 1-2, 26 May 1998 (1998-05-26), pages 11 - 14, XP004147886, ISSN: 0040-6090 *
SHAO L ET AL: "Boron diffusion in silicon: the anomalies and control by point defect engineering", MATERIALS SCIENCE AND ENGINEERING R: REPORTS, ELSEVIER SEQUOIA S.A., LAUSANNE, CH, vol. 42, no. 3-4, 1 November 2003 (2003-11-01), pages 65 - 114, XP004470026, ISSN: 0927-796X *

Also Published As

Publication number Publication date
DE102006004627B3 (en) 2007-04-12
WO2007048387A2 (en) 2007-05-03

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