WO2006137112A1 - Power supply device and control method thereof - Google Patents

Power supply device and control method thereof Download PDF

Info

Publication number
WO2006137112A1
WO2006137112A1 PCT/JP2005/011250 JP2005011250W WO2006137112A1 WO 2006137112 A1 WO2006137112 A1 WO 2006137112A1 JP 2005011250 W JP2005011250 W JP 2005011250W WO 2006137112 A1 WO2006137112 A1 WO 2006137112A1
Authority
WO
WIPO (PCT)
Prior art keywords
power supply
output current
input
overcurrent
output
Prior art date
Application number
PCT/JP2005/011250
Other languages
French (fr)
Japanese (ja)
Inventor
Atsunori Kitsuki
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2005/011250 priority Critical patent/WO2006137112A1/en
Publication of WO2006137112A1 publication Critical patent/WO2006137112A1/en

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00Circuit arrangements for dc mains or dc distribution networks
    • H02J1/10Parallel operation of dc sources
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/285Single converters with a plurality of output stages connected in parallel
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a power supply device and a control method thereof, and more particularly to a power supply device that supplies a power to a load by operating a plurality of power supply devices in parallel and a control method thereof.
  • DDC DC-DC converters
  • the output current per unit is 40 to 70 A
  • power is supplied to a high-end UNIX (registered trademark) server, a mainframe CPUZLSI, etc. by performing parallel redundant operation of 2 to 8 units.
  • N + 1 DDC units that can normally perform redundant operation are operated in parallel, even if one of them malfunctions, the remaining N units are designed to be able to supply power of the desired capacity.
  • so-called butt diodes are inserted into each DDC output so that the effects of the failure do not reach other DDCs. Even if a short-circuit failure occurs in one DDC due to the insertion of this butt diode, the output overcurrent state occurs in other normal DDCs due to the effect, and all DDCs in parallel operation are stopped. It is possible to prevent the occurrence of a situation that leads to
  • Patent Document 1 Japanese Unexamined Patent Publication No. 2003-169471 Disclosure of the invention
  • the present invention has been made in view of the above problems, and when a specific one of the DDCs in parallel redundant operation falls into a secondary side short circuit fault or the like, the DDC is automatically disconnected. Then, the purpose is to provide a power supply device that can continue to supply power to the load by the remaining normal DDC and a control method thereof.
  • the malfunctioning device when the operation is restarted after stopping a plurality of units, the malfunctioning device is stopped and automatically disconnected from the parallel operation system.
  • an overcurrent state is temporarily generated due to the influence of the failed device until the operation is stopped as described above and the device is automatically disconnected from the parallel operation system.
  • the normal device in parallel operation does not stop operating until the faulty device is stopped as described above and disconnected from the parallel operation system. Then, after the failure device is stopped and disconnected from the parallel operation system, the effect of the failure device is removed by the disconnection, so that the normal device returns to the normal operation state and the power supply to the load can be continued.
  • FIG. 1 is a block diagram of a power supply device according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram showing an internal configuration of the DDC in FIG.
  • FIG. 3 is a diagram for explaining a situation when a failure occurs in the configuration of FIG. 2.
  • FIG. 4 is an operation flowchart (part 1) when a failure occurs according to the configuration of FIG.
  • FIG. 5 is an operation flowchart (part 2) when a failure occurs according to the configuration of FIG.
  • FIG. 6 is an operation flowchart (part 3) when a failure occurs according to the configuration of FIG.
  • FIG. 7A is a diagram showing VZl characteristics when an output overcurrent occurs during steady DDC operation.
  • FIG. 7B is a diagram showing VZl characteristics when an output overcurrent occurs at the start of DDC operation.
  • FIG. 8A is a diagram showing the relationship between the current when an output overcurrent is generated and the overcurrent detection time during steady DDC operation.
  • FIG. 8B is a diagram showing the relationship between the current when the output overcurrent is generated and the overcurrent detection time at the start of DDC operation.
  • failure DDC is configured so that the input overcurrent protection circuit (see Fig. 2) operates before normal DDC.
  • the input overcurrent protection circuit see Fig. 2
  • the fault DDC is stopped by the function of the protection circuit and disconnected from the parallel operation system.
  • failure in normal D DC The output overcurrent state due to current draw by DDC is resolved, As a result, normal DDC can continue to operate normally without being stopped.
  • a semiconductor circuit 1 includes a logic unit 300 that executes a functional operation provided by the circuit 1, and supplies a predetermined DC power to the logic unit 300.
  • the voltage monitor 400 supplies the result to the control unit 100 as voltage information.
  • the control unit 100 supplies an ONZOFF signal to the DDCs 201 and 202, thereby starting or stopping the operation of the DDCs 201 and 202.
  • Each DDC 201, 202 transmits a failure signal to the control unit 100 when it detects a failure state in its own device.
  • each DDC 201, 202 is supplied with a DC input voltage from a DC power source (not shown) and converts it into an AC voltage, a transformer 40, and a transformer 40.
  • the synchronous rectifier circuit 20 that generates a desired DC voltage by supplying the AC voltage from the inverter unit 10 and performing synchronous rectification processing by PWM control, and the synchronous rectifier circuit 20 according to the ONZOFF signal from the control unit 100 It consists of a control IC 30 that starts PWM control and stops Z.
  • the power source of the control IC 30 is supplied from the inverter unit 10, and the supply is simultaneously cut off by the disconnection of the power supply from the inverter unit 10 by the operation of the input overcurrent protection circuit 23 described later.
  • the synchronous rectification circuit 20 has a FET (field effect transistor) 21 as a switching element, and when this is turned on / off by the function of the control IC 30, a synchronous rectification operation by PWM control is performed.
  • FET field effect transistor
  • the inverter unit 10 is provided with an input overcurrent protection circuit 23, which detects an input overcurrent state in the corresponding DDC, and at the time of detection, synchronizes by turning off the power supply in the inverter unit 10. Stop the operation of the rectifier circuit 20 and stop the operation of the DDC. Make it.
  • the output overcurrent protection circuit 22 is provided in the synchronous rectifier circuit 20, and an output overcurrent state in the corresponding DDC is detected, and by sending a predetermined signal to the control IC 30 at the time of detection, Control IC30 performs forced output current suppression operation by PWM control
  • step S1 of Fig. 4 the operations of the DDCs 201 and 202 are started. Specifically, when the ON signal in the ONZOFF signal is transmitted to the control IC 30 of each DDC, the control IC 30 starts the PWM control operation for the FET 21 of the synchronous rectifier circuit 20, and thus a predetermined DC voltage is generated. This is supplied to the logic unit 300 (steps S2, S3)
  • step S4 it is assumed that a failure occurs in the control IC 30 of the DDC 201 due to some factor in step S4, so that the FET 21 of the synchronous rectifier circuit 20 is always on (state in FIG. 3).
  • the other DDC 202 is in an output overcurrent state due to the current drawn by the fault DDC201.
  • the input overcurrent protection circuit 23 is activated before the output overcurrent protection circuit 22 is activated in the DDC 202, the DDC operation is stopped by that function.
  • FIG. 7A shows the relationship between the output current and the output voltage when an output overcurrent occurs in the steady state of the DDC. As shown in the figure, the output voltage when reaching the current value OCP where overcurrent protection works is a steady value (steady voltage).
  • FIG. 7B shows the relationship between the output current and the output voltage when an output overcurrent occurs in the DDC operation start state (at startup).
  • the output voltage has not yet reached the steady value shown in Fig. 7A, and is still in a very low voltage state.
  • the power consumption at the time when overcurrent protection functions is considerably lower at the start of DDC operation than in steady operation.
  • the power supplied from the inverter unit 10 at that time is also in a low power state, and the input current is also small.
  • step S6 a case where the input overcurrent protection circuit 23 is activated before the output overcurrent protection circuit 22 is activated by the operation described above with reference to FIG. 8A (step S6) will be described with reference to FIG. Furthermore, unlike this, the case where the output overcurrent protection circuit 22 is activated first (step S7) will be described with reference to FIG.
  • the power supply of the control IC30 is also cut off when the power supply from the inverter unit 10 is cut off as described above. Due to the configuration of the IC30, for example, by applying an open collector type output structure, etc. The failure signal is maintained even if the signal is cut off. This failure signal is canceled by this detection when the output of the synchronous rectifier circuit 20 returns to the steady value in each DDC 201, 202.
  • the control unit 100 that has received the failure signal of each of the DDCs 201 and 202 performs corresponding alarm detection (step S31). In this case, since the alarm detection is based on the failure signal from the two DDCs 201 and 202, the preset “re-injection process when detecting alarms in multiple DDCs” is performed in step S32.
  • step S35 the operation of the DDCs 201 and 202 is restarted by starting the supply of power from each inverter unit 10 (step S35).
  • failure DDC201 becomes FET21 is always ON state again due to a failure of the control IC 30, similarly to the above secondary side short-circuit condition current draw occurs for generating (scan Tetsupu S45, S46) 0 result input
  • the overcurrent protection circuit 23 is activated (step S47), and the power supply from the inverter unit 10 is again turned off (step S48) as described above.
  • the operation of DDC201 stops again (step S49).
  • step S48 the power supply from the inverter unit 10 is cut off (step S48), so that the power supply to the control IC 30 is cut off (step S51).
  • step S51 the power supply to the control IC 30 is cut off
  • step S52 the failure DDC 201 is released from the on state of the FET 21 that is always on (step S52).
  • the output overcurrent protection circuit 22 operates to reduce the output current by PWM control (steps S65, S66). That is, in this normal DDC 202, an overcurrent is generated until the input overcurrent protection circuit 23 of the fault DDC201 is activated (step S47). As a result, the output overcurrent protection circuit 22 is activated to maintain the output drooping state. In this case, since the output overcurrent protection circuit 22 is activated during the rise of the output voltage, the input current is reduced and the input overcurrent protection circuit 23 is not activated (step S67). Therefore, the output is not stopped (step S68). .
  • the failure signal is canceled as described above (step S70).
  • the failure signal is maintained because the failure state is maintained.
  • the control unit 100 recognizes that the DDC 201 is a fault DDC (step S37).
  • the control unit 100 can identify the DDC 201 whose output has been stopped (step S49) after being turned on again as a fault DDC.
  • N + 1 parallel redundant operation if all the units are stopped (steps S42 and S62), the system is restarted again (step S35).
  • N 1 in this example.
  • the DDCs 201 and 202 activate the internal auxiliary power supply from the input voltage, thereby operating the control IC 30 to control the synchronous rectifier circuit 20, that is, the secondary side circuit. Therefore, when the input voltage is cut by the operation of the input overcurrent protection circuit 23 (step S48), the synchronous rectification circuit 20 does not function, and as a result, the transformer 40 is not saturated, and no drawing current is generated on the output side. It will be.
  • the failure DDC201 instructs the control IC 30 to reduce the output current by the function of the output overcurrent protection circuit 22, the output current actually increases due to the control IC failure as described above.
  • the operation of narrowing down is not performed (step S82). For this reason, the output overcurrent state is maintained, and as a result, the input overcurrent protection circuit 23 also operates (step S83).
  • step S88 the on state of FET 21 that was always on in the failure D DC201 is released as described above.
  • the output overcurrent protection circuit 22 is activated so that the output current is reduced by PWM control (steps S91, S92). That is, in this normal DDC202, an overcurrent state occurs until the input overcurrent protection circuit 23 of the fault DDC201 is activated (step S83). The output droop state is maintained by the output overcurrent protection circuit 22 working. In this case, the output overcurrent protection circuit 22 is activated while the output voltage rises, so the input current is reduced and the input overcurrent protection circuit 23 is not activated (step S93). Therefore, the output is not stopped (step S94). .
  • control unit 100 receives a failure signal from the failure DDC 201 (step S86) and detects an alarm (step S71).
  • the control unit 100 receives a failure signal from the failure DDC 201 (step S86) and detects an alarm (step S71).
  • the above “re-injection processing by alarm detection in multiple DDCs” is not performed (step S72).
  • each of the plurality of normal DDCs 202 has the same configuration as the one normal DDC 202 described above, and performs the same operation as the operation of the one normal 202 described above.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

When at least one of power supply devices operating in parallel has failed to cause an overcurrent state, which in turn causes an overcurrent state in other power supply devices, operation of the power supply devices in parallel operation is stopped. When the operation of the power supply devices is resumed, operation of only the device which has failed is stopped by an overcurrent protection function prior to the normal devices. The normal devices do not reach operation stop due to the overcurrent state caused by the affect of the device which has failed, until the operation stop after the operation resumption.

Description

明 細 書  Specification
電源装置及びその制御方法  Power supply device and control method thereof
技術分野  Technical field
[0001] 本発明は、電源装置及びその制御方法に係り、特に複数の電源装置を並列運転し て負荷に電源を供給する電源装置及びその制御方法に関する。  The present invention relates to a power supply device and a control method thereof, and more particularly to a power supply device that supplies a power to a load by operating a plurality of power supply devices in parallel and a control method thereof.
背景技術  Background art
[0002] 近年、 DC— DCコンバータ(以下単に「DDC」と略称する)を適用した電源装置は 分散給電の必要性力 各プリント基板上に小型のオンボード型 DDCを複数台搭載 する構成が一般的となっている。これらオンボード型 DDC—台あたりの出力電流は 4 0乃至 70Aとされ、これらを 2乃至 8台並列冗長運転することによりハイエンド UNIX ( 登録商標)サーバ、メインフレームの CPUZLSI等に対する電源を供給する。  [0002] In recent years, power supply devices that use DC-DC converters (hereinafter simply referred to as “DDC”) have the necessary power of distributed power supply. In general, a configuration in which multiple small on-board DDCs are mounted on each printed circuit board It is the target. These on-board DDCs—the output current per unit is 40 to 70 A, and power is supplied to a high-end UNIX (registered trademark) server, a mainframe CPUZLSI, etc. by performing parallel redundant operation of 2 to 8 units.
[0003] 通常冗長運転可能な DDCを N+ 1台並列運転した場合、そのうちの一台が故障し ても残りの N台にて所望の容量の電源を供給可能な設計とされている。又、その際、 故障の影響が他の DDCに及ばないように、所謂突き合わせダイオードを各 DDC出 力部分に挿入することが行われる。この突き合わせダイオードの挿入により、一台の DDCに短絡故障が生じた場合であつても、その影響で他の正常な DDCに出力過 電流状態が生ずることにより並列運転中の全ての DDCの動作停止に至るという事態 の発生を防止し得る。  [0003] When N + 1 DDC units that can normally perform redundant operation are operated in parallel, even if one of them malfunctions, the remaining N units are designed to be able to supply power of the desired capacity. At that time, so-called butt diodes are inserted into each DDC output so that the effects of the failure do not reach other DDCs. Even if a short-circuit failure occurs in one DDC due to the insertion of this butt diode, the output overcurrent state occurs in other normal DDCs due to the effect, and all DDCs in parallel operation are stopped. It is possible to prevent the occurrence of a situation that leads to
[0004] し力しながら出力電流が大きいオンボード型 DDCの場合、これに必要な突き合わ せダイオード個数が増加し、その結果装置規模の増大、電力損失の増加等の弊害 が発生する場合がある。これを避けるため、特に DDCの故障率が低い場合突き合わ せダイオードの設置を敢えて省略する場合がある。この場合、 DDCの並列冗長運転 時に一台の DDCにおいてトランスの二次側回路短絡故障が発生した場合、当該故 障 DDCは過電流保護機能により出力停止状態となる。その際、並列冗長運転中の 他の正常な DDCにおいても上記短絡故障の影響で引き込み電流を生じ、同様に過 電流保護機能により出力停止状態に至る場合がある。  [0004] In the case of an on-board type DDC with a large output current, however, the number of matching diodes required for this increases, and as a result, adverse effects such as an increase in device scale and an increase in power loss may occur. is there. In order to avoid this, the installation of a matching diode may be intentionally omitted, especially when the failure rate of the DDC is low. In this case, if a transformer secondary side short circuit fault occurs in one DDC during parallel redundant operation of the DDC, the faulty DDC is put into an output stop state by the overcurrent protection function. At that time, other normal DDCs in parallel redundant operation may also generate a pull-in current due to the effects of the short-circuit failure, and the output may be stopped due to the overcurrent protection function.
特許文献 1 :特開 2003— 169471号公報 発明の開示 Patent Document 1: Japanese Unexamined Patent Publication No. 2003-169471 Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0005] このような場合、所謂システムのパーティションダウン状態或いはトータルシステムダ ゥン状態が生じ、これらの並列 DDCの動作を監視する装置においてはこれら全台の DDCに同時に故障が生じたように認識されることがある。その場合実際にはそのうち の特定の一台の DDCのみが故障であるにもかかわらず全台の DDCを交換すること になる。その際交換台数が多い場合には長時間の交換作業が要され、結果的には システム停止が長時間に渡る。  [0005] In such a case, a so-called system partition down state or total system down state occurs, and the devices that monitor the operation of these parallel DDCs recognize that all these DDCs have failed at the same time. May be. In that case, all DDCs will be replaced even though only one particular DDC is out of order. At that time, if the number of units to be replaced is large, long-term replacement work is required, and as a result, the system is stopped for a long time.
[0006] 本発明は上記問題点に鑑みてなされたものであり、並列冗長運転の DDCのうちの 特定の一台が二次側回路短絡故障等に陥った場合、この DDCを自動的に切り離し 、その後残りの正常な DDCによって負荷に対する電源の供給を続行可能な電源装 置及びその制御方法を提供することを目的とする。  [0006] The present invention has been made in view of the above problems, and when a specific one of the DDCs in parallel redundant operation falls into a secondary side short circuit fault or the like, the DDC is automatically disconnected. Then, the purpose is to provide a power supply device that can continue to supply power to the load by the remaining normal DDC and a control method thereof.
課題を解決するための手段  Means for solving the problem
[0007] 上記目的達成のため本発明では、並列冗長運転中の複数の電源装置の動作停止 状態が発生した場合の再動作時、正常装置におけるよりも先に故障装置において過 電流保護機能による動作停止となる一方、他の正常装置においてはその間の故障 装置の影響によっても動作停止にまで至らないような制御を実施する。 発明の効果  [0007] In order to achieve the above object, in the present invention, when a plurality of power supply devices in parallel redundant operation are in a stopped operation, the operation by the overcurrent protection function is performed in the failed device before the normal device. On the other hand, control is performed so that other normal devices do not stop operation due to the failure device during that time. The invention's effect
[0008] 本発明によれば複数台停止後の再動作時、故障装置が動作停止され自動的に並 列運転の系から切り離される。他の正常装置においては上記の如く動作停止され並 列運転系から自動的に切り離されるまでは当該故障装置の影響で一時的に過電流 状態が発生する。し力しながら上記本発明による制御機能により、故障装置が上記 の如く動作停止されて並列運転系から切り離されるまでの間には並列運転の正常装 置は動作停止には至らない。そして故障装置が動作停止され並列運転系から切り離 された後、当該切り離しによって故障装置の影響は除去され、もって正常装置は正 常な運転状態に戻り負荷への電源供給が続行され得る。  [0008] According to the present invention, when the operation is restarted after stopping a plurality of units, the malfunctioning device is stopped and automatically disconnected from the parallel operation system. In other normal devices, an overcurrent state is temporarily generated due to the influence of the failed device until the operation is stopped as described above and the device is automatically disconnected from the parallel operation system. However, due to the control function according to the present invention, the normal device in parallel operation does not stop operating until the faulty device is stopped as described above and disconnected from the parallel operation system. Then, after the failure device is stopped and disconnected from the parallel operation system, the effect of the failure device is removed by the disconnection, so that the normal device returns to the normal operation state and the power supply to the load can be continued.
図面の簡単な説明 [0009] [図 1]本発明の一実施例による電源装置のブロック図である。 Brief Description of Drawings FIG. 1 is a block diagram of a power supply device according to an embodiment of the present invention.
[図 2]図 1中の DDCの内部構成を示す回路図である。  FIG. 2 is a circuit diagram showing an internal configuration of the DDC in FIG.
[図 3]図 2の構成において故障発生時の状況を説明するための図である。  FIG. 3 is a diagram for explaining a situation when a failure occurs in the configuration of FIG. 2.
[図 4]図 1の構成による故障発生時の動作フローチャート(その 1)である。  FIG. 4 is an operation flowchart (part 1) when a failure occurs according to the configuration of FIG.
[図 5]図 1の構成による故障発生時の動作フローチャート(その 2)である。  FIG. 5 is an operation flowchart (part 2) when a failure occurs according to the configuration of FIG.
[図 6]図 1の構成による故障発生時の動作フローチャート(その 3)である。  FIG. 6 is an operation flowchart (part 3) when a failure occurs according to the configuration of FIG.
[図 7A]DDC定常運転中に出力過電流発生時の VZl特性を示す図である。  FIG. 7A is a diagram showing VZl characteristics when an output overcurrent occurs during steady DDC operation.
[図 7B]DDC運転開始時に出力過電流発生時の VZl特性を示す図である。  FIG. 7B is a diagram showing VZl characteristics when an output overcurrent occurs at the start of DDC operation.
[図 8A]DDC定常運転中に出力過電流発生時の電流と過電流検出時間との関係を 示す図である。  FIG. 8A is a diagram showing the relationship between the current when an output overcurrent is generated and the overcurrent detection time during steady DDC operation.
[図 8B]DDC運転開始時に出力過電流発生時の電流と過電流検出時間との関係を 示す図である。  FIG. 8B is a diagram showing the relationship between the current when the output overcurrent is generated and the overcurrent detection time at the start of DDC operation.
符号の説明  Explanation of symbols
[0010] 10 インバータ部 [0010] 10 Inverter section
20 同期整流回路  20 Synchronous rectifier circuit
21 FET  21 FET
30 制御 IC  30 Control IC
22 出力過電流保護回路  22 Output overcurrent protection circuit
23 入力過電流保護回路  23 Input overcurrent protection circuit
100 制御部  100 Control unit
201, 202 DDC (DC— DCコンノータ)  201, 202 DDC (DC— DC Connaughter)
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0011] 本発明では、並列冗長運転を行っている複数の DDCにおいて前記の如くの故障 による全台の動作停止が生じた後の再投入 (動作再開)時に出力電圧が立ち上がる 間、図 8Bに示す如く故障 DDCにおいて正常 DDCにおけるよりも先に入力過電流保 護回路(図 2参照)が動作するような構成とする。その結果故障 DDCのみが当該保 護回路の機能により動作停止されて並列運転系から切り離される。その結果正常 D DCにおける故障 DDCによる電流引き込みによる出力過電流状態は解消され、その 結果正常 DDCは動作停止されることなく引き続き正常運転に移行することが可能と なる。 [0011] In the present invention, while the output voltage rises at the time of re-input (resumption of operation) after the operation of all the units is stopped due to the failure as described above in a plurality of DDCs performing parallel redundant operation, As shown, failure DDC is configured so that the input overcurrent protection circuit (see Fig. 2) operates before normal DDC. As a result, only the fault DDC is stopped by the function of the protection circuit and disconnected from the parallel operation system. As a result, failure in normal D DC The output overcurrent state due to current draw by DDC is resolved, As a result, normal DDC can continue to operate normally without being stopped.
実施例 1  Example 1
[0012] 以下図と共に本発明の実施例の構成につき、詳細に説明する。  The configuration of the embodiment of the present invention will be described below in detail with reference to the drawings.
[0013] 図 1に示す如ぐ本発明の一実施例による半導体回路 1は、当該回路 1が提供する 機能動作を実行するロジック部 300と、当該ロジック部 300に対して所定の直流電源 を供給する電源装置として機能する、並列冗長運転される複数台の DDC201, 202 と、これらロジック装置 300及び DDC201, 202の動作を制御する制御部 100と、 D DC201, 202の出力電圧を監視し、その結果を電圧情報として制御部 100に供給 する電圧モニター 400とよりなる。  As shown in FIG. 1, a semiconductor circuit 1 according to an embodiment of the present invention includes a logic unit 300 that executes a functional operation provided by the circuit 1, and supplies a predetermined DC power to the logic unit 300. Monitors the output voltage of the DDC201, 202, the control unit 100 that controls the operation of the multiple DDC201, 202 that function as a power supply unit that operates in parallel redundant operation, the logic device 300 and the DDC201, 202 The voltage monitor 400 supplies the result to the control unit 100 as voltage information.
[0014] 制御部 100は DDC201, 202に対して ONZOFF信号を供給し、もって DDC201 , 202の動作開始或いは動作停止を行う。又、各 DDC201, 202は、自機における 故障状態を検出した場合に制御部 100に対し故障信号を発信する。  The control unit 100 supplies an ONZOFF signal to the DDCs 201 and 202, thereby starting or stopping the operation of the DDCs 201 and 202. Each DDC 201, 202 transmits a failure signal to the control unit 100 when it detects a failure state in its own device.
[0015] 又、各 DDC201, 202は図 2に示す如く、図示せぬ直流電源から直流の入力電圧 を供給されこれを交流電圧に変換するインバータ部 10と、トランス 40と、トランス 40を 介してインバータ部 10から交流電圧を供給され PWM制御により同期整流処理を実 施することにより所望の直流電圧を発生する同期整流回路 20と、制御部 100からの 上記 ONZOFF信号に応じて同期整流回路 20の PWM制御動作を開始 Z停止す る制御 IC30とよりなる。  Further, as shown in FIG. 2, each DDC 201, 202 is supplied with a DC input voltage from a DC power source (not shown) and converts it into an AC voltage, a transformer 40, and a transformer 40. The synchronous rectifier circuit 20 that generates a desired DC voltage by supplying the AC voltage from the inverter unit 10 and performing synchronous rectification processing by PWM control, and the synchronous rectifier circuit 20 according to the ONZOFF signal from the control unit 100 It consists of a control IC 30 that starts PWM control and stops Z.
[0016] ここで制御 IC30の電源はインバータ部 10から供給されており、もって後述する入 力過電流保護回路 23の動作によるインバータ部 10からの電源供給の切断によって 同時に供給が切断される。  Here, the power source of the control IC 30 is supplied from the inverter unit 10, and the supply is simultaneously cut off by the disconnection of the power supply from the inverter unit 10 by the operation of the input overcurrent protection circuit 23 described later.
[0017] 同期整流回路 20はスイッチング素子としての FET (電界効果トランジスタ) 21を有 し、これが制御 IC30の機能によりオンオフされることにより PWM制御による同期整流 動作が実施する。 [0017] The synchronous rectification circuit 20 has a FET (field effect transistor) 21 as a switching element, and when this is turned on / off by the function of the control IC 30, a synchronous rectification operation by PWM control is performed.
[0018] 又、インバータ部 10には入力過電流保護回路 23が設けられ、該当する DDCにお ける入力過電流状態を検出し、検出の際にはインバータ部 10において電源を切断 することにより同期整流回路 20の動作を停止させ、もって当該 DDCの動作を停止さ せる。 [0018] Also, the inverter unit 10 is provided with an input overcurrent protection circuit 23, which detects an input overcurrent state in the corresponding DDC, and at the time of detection, synchronizes by turning off the power supply in the inverter unit 10. Stop the operation of the rectifier circuit 20 and stop the operation of the DDC. Make it.
[0019] 同期整流回路 20には出力過電流保護回路 22が設けられ、該当する DDCにおけ る出力過電流状態を検出し、検出の際には制御 IC30に対し所定の信号を送ること により、制御 IC30による PWM制御による強制的な出力電流抑制動作が実施される  [0019] The output overcurrent protection circuit 22 is provided in the synchronous rectifier circuit 20, and an output overcurrent state in the corresponding DDC is detected, and by sending a predetermined signal to the control IC 30 at the time of detection, Control IC30 performs forced output current suppression operation by PWM control
[0020] 以下、図 2乃至 8Bと共に、上述の本発明の実施例の電源装置における故障発生 時の動作につき、詳細に説明する。 [0020] The operation when a failure occurs in the power supply device according to the embodiment of the present invention will be described below in detail with reference to FIGS. 2 to 8B.
[0021] 図 4のステップ S1において DDC201, 202の動作を開始する。具体的には各 DD Cの制御 IC30に ONZOFF信号の内の ON信号が送信されることにより制御 IC30 による同期整流回路 20の FET21に対する PWM制御動作が開始され、もって所定 の直流電圧が発生され、これがロジック部 300に対して供給される (ステップ S2, S3)  [0021] In step S1 of Fig. 4, the operations of the DDCs 201 and 202 are started. Specifically, when the ON signal in the ONZOFF signal is transmitted to the control IC 30 of each DDC, the control IC 30 starts the PWM control operation for the FET 21 of the synchronous rectifier circuit 20, and thus a predetermined DC voltage is generated. This is supplied to the logic unit 300 (steps S2, S3)
[0022] ここでステップ S4にて何らかの要因によって DDC201の制御 IC30に故障が生じ、 もって同期整流回路 20の FET21が常時オン状態となった場合を仮定する(図 3の状 態)。 Here, it is assumed that a failure occurs in the control IC 30 of the DDC 201 due to some factor in step S4, so that the FET 21 of the synchronous rectifier circuit 20 is always on (state in FIG. 3).
[0023] 上記の如く当該故障 DDC201の同期整流回路 20の FET21の常時オン状態によ り当該回路が負荷回路として機能することとなり、これに対し他の DDC202から電源 供給がなされる。即ち、図 3に示す如く故障 DDC201の同期整流回路 20に引き込 み電流が生じ (ステップ S5)、この電流を供給するために他の正常 DDC202から過 剰な出力電流が供給される。  [0023] As described above, when the FET 21 of the synchronous rectifier circuit 20 of the fault DDC 201 is always on, the circuit functions as a load circuit, and power is supplied from the other DDC 202. That is, as shown in FIG. 3, a pull-in current is generated in the synchronous rectifier circuit 20 of the failed DDC 201 (step S5), and an excessive output current is supplied from another normal DDC 202 to supply this current.
[0024] ここで故障 DDC201における故障時の動作について図と共に詳細に説明する。  Here, the operation at the time of failure in the failure DDC 201 will be described in detail with reference to the drawings.
[0025] DDC201にお!/、て上記の如く同期整流回路 20が故障しその FET20が常時オン 状態となった結果二次側回路短絡が発生する。その結果トランス 40が飽和して入力 側に過電流が流れ、入力過電流保護回路 23が働く。  [0025] As a result of the failure of the synchronous rectifier circuit 20 in the DDC 201 and the FET 20 being always on as described above, a secondary circuit short circuit occurs. As a result, the transformer 40 is saturated, an overcurrent flows to the input side, and the input overcurrent protection circuit 23 is activated.
[0026] このとき他の DDC202は故障 DDC201による引込み電流により出力過電流状態 が生ずる。このような場合、当該 DDC202において出力過電流保護回路 22が働く 前に入力過電流保護回路 23が働いた場合、その機能により DDC動作停止となる。  [0026] At this time, the other DDC 202 is in an output overcurrent state due to the current drawn by the fault DDC201. In such a case, if the input overcurrent protection circuit 23 is activated before the output overcurrent protection circuit 22 is activated in the DDC 202, the DDC operation is stopped by that function.
[0027] この場合、上記の如く故障 DDC201の二次側回路短絡が発生した際に他の正常 DDC202の入力過電流保護回路 23が働くまでの時間を Tlとし、同じ DDC202の 出力過電流保護回路 22が働くまでの時間を T2とすると、以下の関係が成り立つ。 [0027] In this case, when the secondary circuit short circuit of the fault DDC201 occurs as described above, other normal When the time until the input overcurrent protection circuit 23 of the DDC202 is activated is Tl and the time until the output overcurrent protection circuit 22 of the same DDC202 is activated is T2, the following relationship holds.
[0028] Tl < T2  [0028] Tl <T2
この状態を図 8Aに示す。  This state is shown in FIG. 8A.
[0029] このような状態発生の理由につき、図 7A, 7Bと共に説明する。  The reason for the occurrence of such a state will be described with reference to FIGS. 7A and 7B.
[0030] 図 7Aは DDCの定常状態において出力過電流発生時の出力電流と出力電圧との 関係を示す。同図に示す如ぐこの場合過電流保護が働く電流値 OCPに至る際の 出力電圧は定常値 (定常電圧)である。  FIG. 7A shows the relationship between the output current and the output voltage when an output overcurrent occurs in the steady state of the DDC. As shown in the figure, the output voltage when reaching the current value OCP where overcurrent protection works is a steady value (steady voltage).
[0031] 図 7Bは DDCの動作開始状態(立ち上げ時)において出力過電流発生時の出力電 流と出力電圧との関係を示す。同図に示す如ぐこの場合過電流保護が働く電流値 OCPに至る際には出力電圧は未だ図 7Aに示す定常値に至っておらず、未だかなり 低電圧の状態である。その結果、過電流保護が機能する時点における消費電力は、 DDCの動作開始時においては定常運転時に比してかなり低電圧の状態であること が分かる。その結果、その時点においてインバータ部 10が供給する電力も低電力の 状態にあり、もって入力電流も小さい状態である。  [0031] FIG. 7B shows the relationship between the output current and the output voltage when an output overcurrent occurs in the DDC operation start state (at startup). As shown in the figure, when the current value OCP at which overcurrent protection works is reached, the output voltage has not yet reached the steady value shown in Fig. 7A, and is still in a very low voltage state. As a result, it can be seen that the power consumption at the time when overcurrent protection functions is considerably lower at the start of DDC operation than in steady operation. As a result, the power supplied from the inverter unit 10 at that time is also in a low power state, and the input current is also small.
[0032] このように定常運転時に比し、運転開始時では、出力過電流保護回路 22が動作す る時点における入力電流は小さい状態である。このため、定常運転時の短絡故障の 際には機器の安全のために早めに入力過電流保護回路 23を動作させる設定として 早めに DDCを動作停止させるように制御する場合であっても、運転開始時の短絡故 障の際には入力過電流回路 23の動作前に出力過電流発保護回路 22が動作するよ うに設定することが可能である。即ち、図 8B中実線にて示す如ぐ入力電流が増加し て過電流保護機能動作 OCP (入力)値に至る前の時点で出力電流が過電流保護機 能動作 OCP (出力)値に至るような設定が可能である。即ちこの場合、上記と異なり、 Tl > T2  [0032] In this way, compared to the steady operation, at the start of operation, the input current at the time when the output overcurrent protection circuit 22 operates is small. For this reason, even if a short circuit failure occurs during steady operation, the input overcurrent protection circuit 23 is activated as soon as possible for the safety of the equipment. In the event of a short circuit failure at the start, it is possible to set the output overcurrent protection circuit 22 to operate before the input overcurrent circuit 23 operates. In other words, the output current reaches the overcurrent protection function operation OCP (output) value before the overcurrent protection function operation OCP (input) value is reached as shown by the solid line in Fig. 8B. Can be set. That is, in this case, unlike above, Tl> T2
となる。  It becomes.
[0033] 他方故障 DDC202の場合、当該故障により FET21が常時オン状態となるため PW M制御が機能しない。その結果、出力電流が過電流保護機能動作 OCP (出力)値に 至った場合でも出力電流を絞ることが出来ない。その結果出力電流は増加し続け、 その電源を供給するためインバータ部 10による入力電流も増加する。そして、図 8B の破線にて示す如ぐ入力電流が過電流保護機能動作 OCP (入力)値に至ることと なり、インバータ部 10において電源が切断され、当該故障 DDC201の動作が停止さ れることとなる。 [0033] On the other hand, in the case of the DDC202, the FET21 is always turned on due to the failure, and the PWM control does not function. As a result, the output current cannot be reduced even when the output current reaches the OCP (output) value for the overcurrent protection function. As a result, the output current continues to increase, In order to supply the power, the input current by the inverter unit 10 also increases. Then, the input current as shown by the broken line in FIG. 8B reaches the OCP (input) value of the overcurrent protection function operation, the power is cut off in the inverter unit 10, and the operation of the fault DDC201 is stopped. Become.
[0034] 以下、図 8Aと共に上述した動作によって出力過電流保護回路 22が働く前に入力 過電流保護回路 23が働く場合 (ステップ S6)について図 4と共に説明する。更にこれ と異なり、最初に出力過電流保護回路 22が働く場合 (ステップ S 7)にっき図 5と共に 説明する。  Hereinafter, a case where the input overcurrent protection circuit 23 is activated before the output overcurrent protection circuit 22 is activated by the operation described above with reference to FIG. 8A (step S6) will be described with reference to FIG. Furthermore, unlike this, the case where the output overcurrent protection circuit 22 is activated first (step S7) will be described with reference to FIG.
[0035] 図 4の場合、ステップ S41, S61において、定常運転時の出力過電流状態が発生 し、 DDC201, 202では共に入力過電流保護回路 23が動作する。その結果ステツ プ S42, S62においてインバータ部 10からの電源の供給が断たれることにより各 DD C201, 202が動作停止する。その結果各制御 IC30から制御部 100に対して故障 信号が送信される (ステップ S43, S63)。  [0035] In the case of FIG. 4, in steps S41 and S61, an output overcurrent state during steady operation occurs, and the input overcurrent protection circuit 23 operates in both DDC201 and 202. As a result, when the power supply from the inverter unit 10 is cut off in steps S42 and S62, the operations of the DDCs 201 and 202 are stopped. As a result, a failure signal is transmitted from each control IC 30 to the control unit 100 (steps S43 and S63).
[0036] なお、上記の如くインバータ部 10からの電源供給が切断されることにより制御 IC30 の電源も断たれる力 制御 IC30の構成上、例えばオープンコレクタ型出力構造の適 用等により、供給電源が断たれても故障信号は維持される。この故障信号は各 DDC 201, 202にて同期整流回路 20の出力が定常値に復帰した際にこの検出により解 除される。  [0036] Note that the power supply of the control IC30 is also cut off when the power supply from the inverter unit 10 is cut off as described above. Due to the configuration of the IC30, for example, by applying an open collector type output structure, etc. The failure signal is maintained even if the signal is cut off. This failure signal is canceled by this detection when the output of the synchronous rectifier circuit 20 returns to the steady value in each DDC 201, 202.
[0037] DDC201, 202の各々力もの故障信号を受けた制御部 100では該当するアラーム 検出を行う(ステップ S31)。この場合 2台の DDC201, 202からの故障信号によるァ ラーム検出であるため、ステップ S32にて、予め設定されている「複数の DDCにおけ るアラーム検出の際の再投入処理」を実施する。  [0037] The control unit 100 that has received the failure signal of each of the DDCs 201 and 202 performs corresponding alarm detection (step S31). In this case, since the alarm detection is based on the failure signal from the two DDCs 201 and 202, the preset “re-injection process when detecting alarms in multiple DDCs” is performed in step S32.
[0038] 即ち、各インバータ部 10からの電源の供給を開始させることにより DDC201, 202 の動作を再開させる (ステップ S35)。  That is, the operation of the DDCs 201 and 202 is restarted by starting the supply of power from each inverter unit 10 (step S35).
[0039] この場合故障 DDC201では、上記制御 IC30の故障により FET21が再び常時 ON 状態となり、上記同様に二次側短絡状態が発生するため引き込み電流が生ずる (ス テツプ S45、 S46) 0その結果入力過電流保護回路 23が働き (ステップ S47)、上記 同様に再びインバータ部 10からの電源が切断される (ステップ S48)。その結果当該 DDC201の動作が再び停止する(ステップ S49)。 [0039] In this case failure DDC201, becomes FET21 is always ON state again due to a failure of the control IC 30, similarly to the above secondary side short-circuit condition current draw occurs for generating (scan Tetsupu S45, S46) 0 result input The overcurrent protection circuit 23 is activated (step S47), and the power supply from the inverter unit 10 is again turned off (step S48) as described above. As a result The operation of DDC201 stops again (step S49).
[0040] また上記の如くインバータ部 10からの電源供給が切断された (ステップ S48)ことに よって制御 IC30に対する電源供給が断たれる (ステップ S51)。その結果故障 DDC 201にお!/、て常時オンであった FET21のオン状態が解除される(ステップ S52)。  [0040] As described above, the power supply from the inverter unit 10 is cut off (step S48), so that the power supply to the control IC 30 is cut off (step S51). As a result, the failure DDC 201 is released from the on state of the FET 21 that is always on (step S52).
[0041] このようにして入力過電流保護回路 23によりインバータ部 10にて入力電圧が切断 された故障 DDC201ではトランス 40が飽和することが無く、その結果引き込み電流 の発生もなされなくなる。  [0041] In this way, the fault DDC201 in which the input voltage is disconnected at the inverter unit 10 by the input overcurrent protection circuit 23 does not saturate the transformer 40, and as a result, no current is drawn.
[0042] 他方正常 DDC202では出力過電流保護回路 22が働くことで PWM制御によって 出力電流が絞られる(ステップ S65, S66)。即ちこの正常 DDC202では故障 DDC2 01の入力過電流保護回路 23が働く(ステップ S47)までの間に過電流が生ずる。そ の結果出力過電流保護回路 22が働くことにより出力垂下状態が保持される。この場 合出力電圧が立ち上がる過程で出力過電流保護回路 22が働くため入力電流は減 少し、入力過電流保護回路 23は働かず (ステップ S67)、したがって出力停止には至 らない(ステップ S68)。  On the other hand, in the normal DDC 202, the output overcurrent protection circuit 22 operates to reduce the output current by PWM control (steps S65, S66). That is, in this normal DDC 202, an overcurrent is generated until the input overcurrent protection circuit 23 of the fault DDC201 is activated (step S47). As a result, the output overcurrent protection circuit 22 is activated to maintain the output drooping state. In this case, since the output overcurrent protection circuit 22 is activated during the rise of the output voltage, the input current is reduced and the input overcurrent protection circuit 23 is not activated (step S67). Therefore, the output is not stopped (step S68). .
[0043] 上記の如く故障 DDC201の入力過電流保護回路 23が働 、て当該 DDC201の動 作が停止され短絡状態も解消されることにより正常 DDC202は上記過電流状態から 解放される。もって当該 DDC202は正常動作に移行し、ロジック部 300に対する電 源供給を再開する (ステップ S69)。  [0043] As described above, when the input overcurrent protection circuit 23 of the failure DDC201 is activated, the operation of the DDC201 is stopped and the short-circuit state is eliminated, so that the normal DDC202 is released from the overcurrent state. Accordingly, the DDC 202 shifts to normal operation and resumes power supply to the logic unit 300 (step S69).
[0044] このようにして定常状態に移行した DDC202では出力電圧が定常値となるため上 記の如く故障信号が解除される (ステップ S 70)。他方故障 DDC201においては故 障状態が維持されていることにより故障信号は維持されたままとなつている。これが制 御部 100において検出されることにより制御部 100では DDC201が故障 DDCであ ることを認識する (ステップ S37)。  [0044] Since the output voltage of the DDC 202 that has shifted to the steady state in this way becomes a steady value, the failure signal is canceled as described above (step S70). On the other hand, in the failure DDC201, the failure signal is maintained because the failure state is maintained. When this is detected by the control unit 100, the control unit 100 recognizes that the DDC 201 is a fault DDC (step S37).
[0045] このようにして本発明の実施例では、制御部 100では再投入後に出力停止 (ステツ プ S49)した DDC201を故障 DDCとして特定することが可能である。このように、 N + 1台並列冗長運転の場合、全台停止 (ステップ S42, S62)の場合はそのまま再度シ ステムの立ち上げを行う(ステップ S35)。その結果自動的に故障 DDC201を特定で きると共に、 N台(この例の場合、 N= l)による正常運転への移行が可能である。した 力 Sつてダウン時間を効果的に短縮することが可能である。 In this way, in the embodiment of the present invention, the control unit 100 can identify the DDC 201 whose output has been stopped (step S49) after being turned on again as a fault DDC. In this way, in the case of N + 1 parallel redundant operation, if all the units are stopped (steps S42 and S62), the system is restarted again (step S35). As a result, it is possible to automatically identify the fault DDC201 and to shift to normal operation with N units (N = 1 in this example). did It is possible to effectively reduce downtime by using force S.
[0046] 即ち従来は二次側回路短絡故障により複数の DDCを故障と判定して全 DDCをブ ロックごと交換しており、交換が完了するまでシステムの再投入は実施していなかつ た。このためシステムのダウン時間が長くなり、大きな問題となる場合があった。これ に対して本発明の実施例では、上記の如く再投入処理を実施することにより故障 DD Cの特定およびそのまま定常運転に移行することが可能なため、効果的にダウン時 間の短縮を図ることが可能となる。  [0046] That is, in the past, multiple DDCs were determined to have failed due to a short circuit failure on the secondary side, and all DDCs were replaced together, and the system was not restarted until the replacement was completed. For this reason, the down time of the system becomes long, which sometimes becomes a big problem. On the other hand, in the embodiment of the present invention, it is possible to identify the failure DDC and shift to the steady operation as it is by executing the re-input processing as described above, and thus effectively reduce the down time. It becomes possible.
[0047] 尚、 DDC201, 202は入力電圧から内部補助電源を起動しそれにより制御 IC30を 動作させて同期整流回路 20、即ち二次側回路を制御している。したがって入力過電 流保護回路 23の動作により入力電圧が切断される (ステップ S48)と同期整流回路 2 0が機能しなくなり、その結果トランス 40の飽和もなくなり、出力側に対する引込み電 流は発生しないことになる。  Note that the DDCs 201 and 202 activate the internal auxiliary power supply from the input voltage, thereby operating the control IC 30 to control the synchronous rectifier circuit 20, that is, the secondary side circuit. Therefore, when the input voltage is cut by the operation of the input overcurrent protection circuit 23 (step S48), the synchronous rectification circuit 20 does not function, and as a result, the transformer 40 is not saturated, and no drawing current is generated on the output side. It will be.
[0048] 次に図 6と共に、故障時、入力過電流保護回路 23の動作前に出力過電流保護回 路 22が動作した (ステップ S81, S91)場合につき、説明する。  Next, a case where the output overcurrent protection circuit 22 operates before the operation of the input overcurrent protection circuit 23 in the event of a failure (steps S81 and S91) will be described with reference to FIG.
[0049] この場合、故障 DDC201では出力過電流保護回路 22の機能によって制御 IC30 に対して出力電流を絞るように指示が出されるものの、上記の如く制御 ICの故障のた め、実際に出力電流を絞る動作は実施されない (ステップ S82)。このため出力過電 流状態は維持され、その結果入力過電流保護回路 23も動作する (ステップ S83)。  [0049] In this case, although the failure DDC201 instructs the control IC 30 to reduce the output current by the function of the output overcurrent protection circuit 22, the output current actually increases due to the control IC failure as described above. The operation of narrowing down is not performed (step S82). For this reason, the output overcurrent state is maintained, and as a result, the input overcurrent protection circuit 23 also operates (step S83).
[0050] その結果故障 DDC201では上記同様インバータ部 10空の電源供給が切断され、 制御 IC30の電源も断たれる(ステップ S84、 S85、 S87)。その結果上記同様故障 D DC201において常時オンであった FET21のオン状態が解除される(ステップ S88)  [0050] As a result, in the failure DDC201, the empty power supply to the inverter unit 10 is cut off as described above, and the power supply to the control IC 30 is also cut off (steps S84, S85, S87). As a result, the on state of FET 21 that was always on in the failure D DC201 is released as described above (step S88).
[0051] このようにして入力過電流保護回路 23によりインバータ部 10からの電源供給が切 断された故障 DDC201ではトランス 40が飽和することが無く、その結果引き込み電 流も生じない。 [0051] The failure in which the power supply from the inverter unit 10 is cut off by the input overcurrent protection circuit 23 in this way does not cause the transformer 40 to saturate in the DDC201, and as a result, no drawing current occurs.
[0052] 他方正常 DDC202では出力過電流保護回路 22が働くことで PWM制御によって 出力電流が絞られる(ステップ S91, S92)。即ちこの正常 DDC202では、故障 DDC 201の入力過電流保護回路 23が働く(ステップ S83)までの間過電流状態が生じ、 出力過電流保護回路 22が働くことにより出力垂下状態が保持される。この場合出力 電圧が立ち上がる過程で出力過電流保護回路 22が働くため、入力電流は減少し入 力過電流保護回路 23は働かず (ステップ S93)、したがって出力停止には至らない( ステップ S 94)。 [0052] On the other hand, in the normal DDC 202, the output overcurrent protection circuit 22 is activated so that the output current is reduced by PWM control (steps S91, S92). That is, in this normal DDC202, an overcurrent state occurs until the input overcurrent protection circuit 23 of the fault DDC201 is activated (step S83). The output droop state is maintained by the output overcurrent protection circuit 22 working. In this case, the output overcurrent protection circuit 22 is activated while the output voltage rises, so the input current is reduced and the input overcurrent protection circuit 23 is not activated (step S93). Therefore, the output is not stopped (step S94). .
[0053] 上記の如く故障 DDC201の入力過電流保護回路 23が働き当該故障 DDC201が 並列運転系から切り離されると正常 DDC202は上記過電流状態力 解放され、もつ て正常動作に移行し、ロジック部 300に対する電源供給を再開する (ステップ S95)。  [0053] As described above, when the input overcurrent protection circuit 23 of the failure DDC201 is activated and the failure DDC201 is disconnected from the parallel operation system, the normal DDC202 is released from the overcurrent state force, and the operation proceeds to the normal operation. The power supply to is resumed (step S95).
[0054] またこの場合制御部 100では故障 DDC201からの故障信号送信 (ステップ S86)を 受けてアラーム検出を行う(ステップ S71)。この場合図 5におけるステップ S32の場 合と異なり一台(DDC201)のみの停止の検出であるため、上記「複数 DDCにおけ るアラーム検出による再投入処理」は実施されな ヽ (ステップ S72)。  In this case, the control unit 100 receives a failure signal from the failure DDC 201 (step S86) and detects an alarm (step S71). In this case, unlike the case of step S32 in FIG. 5, since the detection of the stop of only one unit (DDC201) is detected, the above “re-injection processing by alarm detection in multiple DDCs” is not performed (step S72).
[0055] 尚、本実施例では説明の便宜上並列冗長運転する DDCを DDC201, 202の 2台  In this embodiment, for convenience of explanation, two DDCs DDC201 and 202 for parallel redundant operation are used.
(N= 1)として説明を行ったが、これが 3台以上の場合でも同様に本発明を適用可能 である。その場合には正常 DDC202が複数台存在することとなる。そしてこれら複数 台の正常 DDC202は夫々上述の一台の正常 DDC202と同様の構成を有すると共 に、上述の一台の正常 202の動作と同様の動作を行う。  Although the description has been given assuming that (N = 1), the present invention can be similarly applied even when there are three or more units. In that case, there will be multiple normal DDCs 202. Each of the plurality of normal DDCs 202 has the same configuration as the one normal DDC 202 described above, and performs the same operation as the operation of the one normal 202 described above.

Claims

請求の範囲 The scope of the claims
[1] 複数の電源装置を並列運転させることにより電源を供給する電源装置の制御方法 であって、  [1] A method for controlling a power supply device that supplies power by operating a plurality of power supply devices in parallel,
複数の並列運転中の電源装置のうちの少なくとも一台の故障により過電流状態を 生じ、その影響で他の電源装置においても過電流状態が生じた際に複数の並列運 転中の電源装置を動作停止させる段階と、  When an overcurrent state occurs due to the failure of at least one of the power supply units in parallel operation, and the overcurrent state also occurs in other power supply units due to the failure, a plurality of power supply units in parallel operation are A stage of stopping operation,
当該複数の電源装置の動作再開時、正常装置におけるよりも先に故障装置につい て過電流保護機能により動作停止させる一方、他の正常装置については、当該故障 装置が動作停止に至るまでの間の該当する故障の影響によっては動作停止に至ら せな 、ようにする段階とよりなる電源装置の制御方法。  When restarting the operation of the multiple power supply units, the faulty device is stopped by the overcurrent protection function before the normal device, while the other faulty devices are stopped until the faulty device stops operating. A method for controlling a power supply apparatus, comprising a step of preventing the operation from being stopped depending on the influence of a corresponding failure.
[2] 故障装置を含む複数の電源装置の並列運転動作再開時、故障装置においては当 該故障によって出力電流の制御が機能せず、もって出力過電流状態を生じ、その結 果入力過電流状態を生じることにより当該故障装置が動作停止され、  [2] When parallel operation of multiple power supply units including a faulty device is resumed, the faulty device does not function to control the output current due to the fault, resulting in an output overcurrent state, resulting in an input overcurrent state. Causes the malfunctioning device to stop operating,
他方正常装置においてはその際、上記故障装置による電流引き込みによって出力 電流が増加する力 出力電流の制御機能によりこれが絞られるため出力電流の増加 が抑制され、もって入力電流の超過に至らず入力過電流の検出による動作停止に至 ることがなぐその後前記故障装置の動作停止により出力電流超過の原因が解消し た後正常な動作状態に至る構成とされてなる請求項 1に記載の電源装置の制御方 法。  On the other hand, in the normal device, the force that increases the output current due to the current drawing by the faulty device is controlled by the output current control function, so that the increase in the output current is suppressed, so that the input overcurrent does not exceed the input current. 2. The control of the power supply device according to claim 1, wherein the operation is stopped due to detection of the power supply, and then the operation of the failed device is stopped so that the cause of the excess of the output current is resolved and then the normal operation state is reached. Method.
[3] 前記過電流を生ずる故障は、出力電流を PWM制御により制御する同期整流回路 を構成するスイッチング素子が常時オン状態となる故障であり、その動作停止により 当該同期整流回路の制御電源の供給が停止されることでスイッチング素子の常時ォ ン状態が解消される構成とされてなる請求項 1又は 2に記載の電源装置の制御方法  [3] The fault that causes the overcurrent is a fault in which the switching element that constitutes the synchronous rectifier circuit that controls the output current by PWM control is always turned on. The method for controlling a power supply device according to claim 1 or 2, wherein the constant-on state of the switching element is canceled by stopping the switching element.
[4] 前記並列運転する複数の電源装置は各々入力電流値が所定の値を超えた場合に 同期整流回路の動作を停止させる機能を有する入力過電流保護部と、 [4] The plurality of power supply devices that are operated in parallel each has an input overcurrent protection unit having a function of stopping the operation of the synchronous rectifier circuit when the input current value exceeds a predetermined value;
出力電流値が所定の値を超えた場合に PWM制御により出力電流を低下させる機 能を有する出力過電流保護部とよりなる請求項 1乃至 3の内の何れか一項に記載の 電源装置の制御方法。 The output overcurrent protection unit according to any one of claims 1 to 3, further comprising an output overcurrent protection unit having a function of reducing the output current by PWM control when the output current value exceeds a predetermined value. Control method of power supply.
[5] 前記故障後の運転再開時各電源装置の出力電圧が立ち上がるまでの間、出力電 圧が低いことにより定常運転時に比して入力電流が低ぐその結果正常装置では前 記入力過電流保護部の動作前に出力電流保護部が機能し、当該出力電流保護部 の機能により故障装置による電流引き込みによる出力電流の増加が抑制され、その 結果入力電流の増カロも抑制され入力過電流保護部による動作停止に至らず、 他方故障装置においてはその際、当該故障により出力電流保護部の機能が有効 に働かず、その結果出力電流を絞ることができず入力電流の抑制もできな 、ため入 力過電流保護部による動作停止に至る構成とされてなる請求項 1乃至 4の内の何れ か一項に記載の電源装置の制御方法。  [5] When the operation resumes after the failure until the output voltage of each power supply rises, the input current is lower than that during steady operation due to the low output voltage. The output current protection unit functions before the operation of the protection unit, and the function of the output current protection unit suppresses the increase in output current due to current drawing by the faulty device, and as a result, the increase in input current is also suppressed and input overcurrent protection is suppressed. On the other hand, in the case of a faulty device, the function of the output current protection unit does not work effectively due to the failure, and as a result, the output current cannot be reduced and the input current cannot be suppressed. The method for controlling a power supply device according to any one of claims 1 to 4, wherein the operation is stopped by the input overcurrent protection unit.
[6] 前記並列運転する複数の電源装置は DC— DCコンバータよりなる請求項 1乃至 5 の内の何れか一項に記載の電源装置の制御方法。  6. The method of controlling a power supply device according to any one of claims 1 to 5, wherein the plurality of power supply devices that are operated in parallel comprise DC-DC converters.
[7] 複数の電源装置を並列運転させることにより電源を供給する電源装置であって、 複数の並列運転中の電源装置のうちの少なくとも一台の故障により過電流状態を 生じ、その影響で他の電源装置においても過電流状態が生じた際に複数の並列運 転中の電源装置を動作停止させる手段よりなり、  [7] A power supply device that supplies power by operating a plurality of power supply devices in parallel, and at least one of the plurality of power supply devices in parallel operation has caused an overcurrent state, and the influence thereof causes another In this power supply unit, when an overcurrent condition occurs, the power supply unit is configured to stop operation of a plurality of power supply units in parallel operation.
当該複数の電源装置の動作再開時、正常装置におけるよりも先に故障装置につい て過電流保護機能により動作停止させる一方、他の正常装置については、当該故障 装置が動作停止に至るまでの間の該当する故障の影響によっては動作停止に至ら せな ヽようにする制御する構成とされてなる電源装置。  When restarting the operation of the multiple power supply units, the faulty device is stopped by the overcurrent protection function before the normal device, while the other faulty devices are stopped until the faulty device stops operating. A power supply unit configured to perform control so that operation is not stopped depending on the influence of the corresponding failure.
[8] 故障装置を含む複数の電源装置の並列運転動作再開時、故障装置においては当 該故障によって出力電流の制御が機能せず、もって出力過電流状態を生じ、その結 果入力過電流状態を生じることにより当該故障装置が動作停止され、  [8] When resuming parallel operation of multiple power supply units including a faulty device, the faulty device does not function to control the output current due to the fault, resulting in an output overcurrent state, resulting in an input overcurrent state. Causes the malfunctioning device to stop operating,
他方正常装置においてはその際、上記故障装置による電流引き込みによって出力 電流が増加する力 出力電流の制御機能によりこれが絞られるため出力電流の増加 が抑制され、もって入力電流の超過に至らず入力過電流の検出による動作停止に至 ることがなぐその後前記故障装置の動作停止により出力電流超過の原因が解消し た後正常な動作状態に至る構成とされてなる請求項 7に記載の電源装置。 On the other hand, in the normal device, the force that increases the output current due to the current drawing by the faulty device is controlled by the output current control function, so that the increase in the output current is suppressed, so that the input overcurrent does not exceed the input current. 8. The power supply device according to claim 7, wherein the power supply device is configured to reach a normal operation state after the cause of the excess of the output current is resolved by the operation stop of the faulty device after the operation stop due to detection of the failure.
[9] 前記過電流を生ずる故障は、出力電流を PWM制御により制御する同期整流回路 を構成するスイッチング素子が常時オン状態となる故障であり、その動作停止により 当該同期整流回路の制御電源の供給が停止されることでスイッチング素子の常時ォ ン状態が解消される構成とされてなる請求項 7又は 8に記載の電源装置。 [9] The fault that causes the overcurrent is a fault in which the switching element that constitutes the synchronous rectifier circuit that controls the output current by PWM control is always turned on, and the control power supply of the synchronous rectifier circuit is supplied by stopping the operation. The power supply device according to claim 7 or 8, wherein the power supply device is configured such that the normally on state of the switching element is canceled by stopping the switching.
[10] 前記並列運転する複数の電源装置は各々入力電流値が所定の値を超えた場合に 同期整流回路の動作を停止させる機能を有する入力過電流保護部と、  [10] The plurality of power supply devices that are operated in parallel each have an input overcurrent protection unit having a function of stopping the operation of the synchronous rectifier circuit when the input current value exceeds a predetermined value;
出力電流値が所定の値を超えた場合に PWM制御により出力電流を低下させる機 能を有する出力過電流保護部とよりなる請求項 7乃至 9の内の何れか一項に記載の 電源装置。  The power supply device according to any one of claims 7 to 9, further comprising an output overcurrent protection unit having a function of reducing the output current by PWM control when the output current value exceeds a predetermined value.
[11] 前記故障後の運転再開時各電源装置の出力電圧が立ち上がるまでの間、出力電 圧が低いことにより定常運転時に比して入力電流が低ぐその結果正常装置では前 記入力過電流保護部の動作前に出力電流保護部が機能し、当該出力電流保護部 の機能により故障装置による電流引き込みによる出力電流の増加が抑制され、その 結果入力電流の増カロも抑制され入力過電流保護部による動作停止に至らず、 他方故障装置においてはその際、当該故障により出力電流保護部の機能が有効 に働かず、その結果出力電流を絞ることができず入力電流の抑制もできな 、ため入 力過電流保護部による動作停止に至る構成とされてなる請求項 7乃至 10の内の何 れか一項に記載の電源装置。  [11] When the operation restarts after the failure until the output voltage of each power supply rises, the input voltage is lower than that during steady operation due to the low output voltage. The output current protection unit functions before the operation of the protection unit, and the function of the output current protection unit suppresses the increase in output current due to current drawing by the faulty device, and as a result, the increase in input current is also suppressed and input overcurrent protection is suppressed. On the other hand, in the case of a faulty device, the function of the output current protection unit does not work effectively due to the failure, and as a result, the output current cannot be reduced and the input current cannot be suppressed. The power supply device according to any one of claims 7 to 10, wherein the power supply device is configured to stop operation by an input overcurrent protection unit.
[12] 前記並列運転する複数の電源装置は DC— DCコンバータよりなる請求項 7乃至 11 の内の何れか一項に記載の電源装置。  12. The power supply device according to any one of claims 7 to 11, wherein the plurality of power supply devices that are operated in parallel comprise DC-DC converters.
PCT/JP2005/011250 2005-06-20 2005-06-20 Power supply device and control method thereof WO2006137112A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/JP2005/011250 WO2006137112A1 (en) 2005-06-20 2005-06-20 Power supply device and control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2005/011250 WO2006137112A1 (en) 2005-06-20 2005-06-20 Power supply device and control method thereof

Publications (1)

Publication Number Publication Date
WO2006137112A1 true WO2006137112A1 (en) 2006-12-28

Family

ID=37570165

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2005/011250 WO2006137112A1 (en) 2005-06-20 2005-06-20 Power supply device and control method thereof

Country Status (1)

Country Link
WO (1) WO2006137112A1 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015073423A (en) * 2013-09-06 2015-04-16 三星エスディアイ株式会社Samsung SDI Co.,Ltd. Power conversion system for motor car
EP2924527A4 (en) * 2013-05-24 2016-05-11 Huawei Tech Co Ltd Control method and apparatus
US10046646B2 (en) 2013-09-06 2018-08-14 Samsung Sdi Co., Ltd. Power conversion system for electric vehicles
JP2018133247A (en) * 2017-02-16 2018-08-23 トヨタ自動車株式会社 Fuel cell system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000295763A (en) * 1999-03-31 2000-10-20 Toshiba Corp Multiplex power supply
JP2003169471A (en) * 2001-12-03 2003-06-13 Murata Mfg Co Ltd Switching power supply unit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000295763A (en) * 1999-03-31 2000-10-20 Toshiba Corp Multiplex power supply
JP2003169471A (en) * 2001-12-03 2003-06-13 Murata Mfg Co Ltd Switching power supply unit

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2924527A4 (en) * 2013-05-24 2016-05-11 Huawei Tech Co Ltd Control method and apparatus
US10013012B2 (en) 2013-05-24 2018-07-03 Huawei Technologies Co., Ltd. Control method and apparatus
JP2015073423A (en) * 2013-09-06 2015-04-16 三星エスディアイ株式会社Samsung SDI Co.,Ltd. Power conversion system for motor car
US10046646B2 (en) 2013-09-06 2018-08-14 Samsung Sdi Co., Ltd. Power conversion system for electric vehicles
JP2018133247A (en) * 2017-02-16 2018-08-23 トヨタ自動車株式会社 Fuel cell system

Similar Documents

Publication Publication Date Title
US8782449B2 (en) Power supply system with a plurality of power supply units capable of powering a plurality of load units depending on the type and operation state of each load unit
US6879139B2 (en) Sequencing power supplies
JP2000116029A (en) Backup power supply device
US8484491B2 (en) Power supply apparatus and power supply control method
US20140292105A1 (en) Static switch circuit for high reliability uninterruptible power supply systems
US8310100B2 (en) System and method for a redundant power solution
WO2006137112A1 (en) Power supply device and control method thereof
JP5976074B2 (en) Computer system and operation method thereof
JP2018007316A (en) Voltage control device and information processing device
JP5088049B2 (en) Power system
JP2009189126A (en) Power supply system and element failure detection method
JP2829863B2 (en) Power supply
JP2008283788A (en) Control power supply circuit of uninterruptive power supply device
JP4775717B2 (en) Power supply system, internal circuit driving method, and program thereof
TWI576689B (en) Apparatus and method for power supply
KR100404089B1 (en) Power supply apparatus and method for home gateway
JP2016012955A (en) Energy saving power supply circuit
JP7255249B2 (en) Power supply circuit and electronic device
JP2008067491A (en) Common spare uninterruptible power supply system
JP2009183044A (en) Power management arrangement and uninterruptible power supply apparatus
KR200366913Y1 (en) A uninterruptible power supply of the mode of the dual
JP7252072B2 (en) power supply
JP6175815B2 (en) Multiple power supply apparatus, control method for multiple power supply apparatus, and program
JP3855894B2 (en) Power protection circuit
JP2001352681A (en) Controlled power supply compensating device for engine- driven generator for system linkage

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

WWW Wipo information: withdrawn in national office

Country of ref document: DE

122 Ep: pct application non-entry in european phase

Ref document number: 05751372

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP