WO2006126003A1

WO2006126003A1 - Control system

Info

Publication number: WO2006126003A1
Application number: PCT/GB2006/001936
Authority: WO
Inventors: Wlodzimierz Koczara; Emil Ernest; Marcin Moskwa
Original assignee: Cummins Generator Technologies Limited
Priority date: 2005-05-25
Filing date: 2006-05-25
Publication date: 2006-11-30
Also published as: GB0510666D0

Abstract

A control system for controlling the AC output of a variable speed generating set is disclosed. The control system implements a frequency droop technique in which the frequency of the AC output varies with power in accordance with a frequency droop coefficient. The control system is arranged such that, when the generating set is first connected to a load bus, the frequency droop coefficient is set to a higher value than its steady state value. This can allow the initial active power change to be reduced, which may avoid or reduce voltage dips which might otherwise occur on the load bus.

Description

CONTROL SYSTEM

The present invention relates to a control system for controlling the AC output of a variable speed generating set, and in particular to a control system for use when such a generating set is connected to another generating set for parallel operation.

Variable speed generator sets typically comprise an engine, a generator, an AC/ AC converter, and a speed controller which is arranged to control the speed of the engine in dependence on the electrical power which is drawn by a load. The speed controller controls the engine so that it always operates at optimal speed, thereby reducing average fuel consumption and operational costs. The AC/ AC converter converts the variable frequency output of the generator into an AC output having a substantially constant frequency and voltage suitable for powering a load. The AC/ AC converter typically comprises an AC/DC converter, a DC/DC converter which provides a stable DC voltage, and a DC/ AC converter (or inverter) for producing the required AC output. WO 01/56133 discloses examples of variable speed power generating systems.

Connecting two or more individual AC power supply systems in parallel to a common load bus allows increased reliability and output power rating of the whole power generating system. In parallel operation it is necessary to ensure that the output frequencies of the various generator sets are synchronised, in order to avoid excessive currents circulating within the generator sets.

In a conventional synchronous generator the speed of the generator decreases as its active power increases. This behaviour allows conventional synchronous generators to be connected in parallel and to maintain their synchronisation. In variable speed generator sets this behaviour can be simulated by introducing an artificial frequency droop, as follows:

ω= ω_ref - m - P where ω is the output frequency of the generating set, ω_re/ is the nominal frequency of all generating sets, P is the active power of the generating set, and m is the frequency droop coefficient.

When two or more generator sets are operated in parallel, the proportion of the total active power contributed by each generator depends on the value of the frequency droop coefficient m. If all systems have the same value of m then active power is shared between them equally. In the steady state, when the frequencies of the generators are the same, the following relationship exists:

IfI₁ - P₁ =■ m₂ - P₂ = Yn₁ ^• P₁

Where P ^* is the power rating of the I^th parallel connected generator.

When connecting generator sets in parallel to a common load bus, the amplitude and frequency of the output voltage of a generator set that is to be connected to the load bus is synchronised with the amplitude and frequency of the load bus voltage before connection. Generally the synchronisation process is based on comparing the amplitudes and frequencies of the output voltages of the systems that are to be connected in parallel and correcting those output voltages where necessary in order to eliminate any such differences.

In known parallel generator systems, when a new generator set is connected to a load bus which is already powered by one or more other generator sets, the active power delivered by the new generator will increase rapidly, while the active power delivered by the generator sets which are already connect will decrease rapidly, until each generator delivers its share of the active power in accordance with its frequency droop coefficient. However, increasing the active power delivered by the new generator in this way may lead to a voltage dip, because of the long engine speed-up time. Furthermore, rapid changes in the active power flow may be undesirable for other reasons. For example, the control systems of the generator sets may assume that there has been a step change in the load and make appropriate adjustments, when in fact no such step change has taken place. According to a first aspect of the invention there is provided a control system for controlling the AC output of a variable speed generating set, the control system implementing a frequency droop technique in which the frequency of the AC output varies with power in accordance with a frequency droop coefficient, wherein the control system is arranged such that, when the generating set is first connected to a load bus, the frequency droop coefficient is set to a higher value than its steady state value.

By increasing the frequency droop coefficient when the generating set is first connected to the load bus, the initial active power change can be reduced, which may avoid or reduce voltage dips which might otherwise occur on the load bus.

Preferably, by "load bus", it is meant any connection between one or more generators and one or more loads.

Preferably the initial value of the frequency droop coefficient is set to as to produce substantially no voltage dip in the AC output when the generating set is connected to the load bus. For example, the initial value may be approximately 2, 3 or 5 times its steady state value.

Preferably the control system is arranged such that, once the generating set has been connected, the frequency droop coefficient is returned to its steady state value, so that each generating set will deliver its share of the active power. This may allow the required load sharing to be established and steady state conditions to be achieved.

Preferably the frequency droop coefficient is reduced gradually over time, which may ensure a smooth and controlled change in the active power supplied by each generator. The period of time over which the frequency droop coefficient is reduced is preferably at least as long as the engine speed-up time. This may help to ensure that the engine has sufficient time to power up to the newly-demanded load, which may help to ensure that voltage dips do not occur on the load bus. Thus the period of time over which the frequency droop coefficient is returned to its steady state value may be at least as long as the time that would be taken for an engine in the generating set to speed up so as to power a maximum expected load. The control system may comprise a phase locked loop for synchronising the frequency of the AC output of the variable speed generating set with that of the load bus before connection of the generating set to the load bus. The control system may then be arranged to set the frequency of the phased locked loop in accordance with the frequency of the load bus, and to use the phased locked loop to control the frequency of the AC output of the generating set. Once the AC output of the generating set has been synchronised with the load bus, the generating set may be connected to the load bus.

The control system may be arranged to bring the phased locked loop into synchronisation with the load bus by feeding the load bus voltage as an input voltage to the phase lock loop. The phase locked loop may then control the frequency of a DC/AC inverter in the generating set which provides the AC output. The phase lock loop may provide an output by operation of a controlled oscillator in response to a control signal which is a function of any difference between the frequencies of the load bus voltage and of the phase lock loop output.

The control signal may be derived within said phase lock loop from an average value of any phase difference between the load bus voltage and the output of the phase lock loop, the average value being calculated by operation of the control system.

In practice the output of the DC/ AC inverter of one power supply system might only be connected to the load bus after it has been determined that the sensed load bus voltage amplitude and frequency are within certain predetermined limits. In the event that the sensed load bus voltage amplitude and frequency are determined to be outside said predetermined limits, an error state may be established and the output of the DC/ AC inverter of said one power supply system may not connected to the load bus. Once the output of the DC/ AC inverter is connected to the load bus, the phase lock loop may be turned off and the active and reactive power may be shared between the DC/ AC inverter of one power supply system and the DC/ AC inverter of any other power supply system that is connected to the load bus in parallel with said one power supply system by frequency and amplitude droop methods respectively. The present invention also provides a variable speed generating set comprising a control system in any of the forms described above. The generating set may further comprise a prime mover (such as an engine, a hydro-electric turbine, a wind turbine, a gas turbine or any other source of rotational energy), a generator, and an AC/ AC converter. The AC/ AC converter may comprise an AC/DC converter and a DC/ AC converter (inverter). A DC/DC converter may be provided between the AC/DC and DC/ AC converter in order to boost the DC voltage. A speed controller may be provided to control the speed of the prime mover in dependence on the load.

According to another aspect of the present invention there is provided a method of controlling the AC output of a variable speed generating set, the method comprising implementing a frequency droop technique in which the frequency of the AC output varies with power in accordance with a frequency droop coefficient, wherein, when the generating set is first connected to a load bus, the frequency droop coefficient is set to a higher value than its steady state value.

Any of the apparatus features may also be provided as method features.

Preferred features of the present invention will now be described, purely by way of example, with reference to the accompanying drawings, in which: -

Figure 1 is a diagrammatic illustration of one form of variable speed generating set;

Figure 2 is a diagram illustrating connection of three variable speed generating steps in parallel to a common load bus;

Figure 3 illustrates a control system to be incorporated in a variable speed generating set as shown in Figure 1 for carrying out an embodiment of the present invention;

Figure 4 illustrates frequency droop paths during connection of a new system to a working parallel system;

Figure 5 shows in more detail parts of the control system; and

Figure 6 shows a graph of frequency droop coefficient against time. Overview of a variable speed electrical power generating set

Figure 1 shows components of a variable speed electrical power generating set in diagrammatic form. The generating set includes a prime mover 10, such as a diesel engine, mechanically coupled with a rotor of an electric power generator 11 whereby to rotate the rotor relative to a stator of the generator 11 and thereby to generate a three phase variable frequency and voltage AC output from the generator 11. The preferred form of electric power generator 11 is a permanent magnet generator. The prime mover 10 has an electronic speed sensor 12, a speed controller 13 and an electronically controlled fuel injection system. The speed sensor 12 produces an output signal Ssp which is indicative of the sensed prime mover speed. The speed controller 13 has four input ports. One of those input ports receives a minimum speed reference signal Srmis. Another of those input ports receives the actual speed signal Ssp which is emitted by the speed sensor 12. A third of the input ports of the speed controller 13 receives a maximum speed reference signal Srmax and the fourth input port receives a speed correction signal Srs which is generated by operation of the generating set as is described below. The speed controller 13 controls operation of the fuel injection system of the prime mover 10 in response to the four input signals Ssp, Srs, Srmis and Srmax in order to control the prime mover 10 and to maintain the speed of the prime mover 10 between the minimum and maximum speeds and at a level which is related to the speed correction signal Srs.

The three phase variable frequency and voltage output R, S, T of the generator 11 is connected to a series train AC/ AC conversion circuit. The series train AC/ AC conversion circuit comprises a first converter 15, which is a twin rectifier circuit and a twin voltage booster circuit 16, a brake controller 30 and a second converter 17 which is a three phase DC/ AC inverter. The twin rectifier circuit comprises a common cathode three pulse rectifier 18 and a common anode three pulse rectifier 19. The output R, S, T of the generator 11 is connected in parallel to the anodes of the common cathode three pulse rectifier 18 and to the cathodes of the common anode three pulse rectifier 19 and is rectified by each of the two rectifiers 18 and 19. Each of the rectifiers 18 and 19 has an output terminal. The output terminal that is connected to the cathodes of the rectifier 18 is positive and the output terminal that is connected to the anodes of the rectifier 19 is negative. The generator 11 has a neutral terminal N. Each booster circuit part of the twin voltage booster circuit 16 is connected between a respective one of the output terminals of the rectifiers 18 and 19 and the neutral terminal N, conveniently via a filter which is not shown. Each booster circuit part includes an inductor 21, 22 which is connected in series between the output of the respective rectifier 18, 19 and one side of a respective current sensor 23, 24. The other side of the current sensor 23 is connected to the collector of a transistor 25 and to the anode of a diode 26. The other side of the current sensor 24 is connected to the emitter of a transistor 27. The emitter of the transistor 25 and the collector of the transistor 27 are both connected to the neutral terminal N. The other side of the current sensor 24 is also connected to the cathode of a diode 28. The cathode of the diode 26 is connected to one side of a capacitor 29. The anode of the diode 28 is connected to one side of another capacitor 31. The other side of each of the capacitors 29 and 31 is connected to the neutral terminal.

The voltage across the capacitor 29 is boosted by the combined effect of the inductor 21 and the switching action of the parallel connected transistor 25 and the series connected diode 26. The voltage across the capacitor 31 is boosted by the combined effect of the inductor 22 and the switching action of the parallel connected transistor 27 and the series connected diode 28. The output of the twin booster circuit 16 is the voltage across the capacitors 29 and 31 and the sum of those voltages is maintained constant and forms the DC link voltage.

The brake controller 30 is connected across the DC link voltage. The brake controller 30 includes a resistor Rh in series with a transistor Th, the resistor Rh being connected to the collector of the transistor Th. A reverse biased diode Dh is connected in parallel with the resistor Rh. The base of the transistor Th is connected to a brake voltage controller which is not shown.

A voltage sensor 32 is connected across the capacitor 29 and thereby is operable to monitor the voltage Va across that capacitor 29. Further the voltage sensor 32 is also connected across the capacitor 31 and thereby is operable to monitor the voltage Vb across that capacitor 31. Hence the voltage sensor 32 is operable to monitor the DC link voltage. The voltage sensor 32 emits two output signals SVa and SVb which are respectively an indication of the voltage across the capacitor 29 and the capacitor 31. The output of each current sensor 23, 24 is connected to an input of a respective current controller 33, 34 which provides a pulse width modulated drive to the base of the respective booster transistor 25,27 which sources a controlled current to maintain the voltage Va, Vb across the respective capacitor 29, 31 constant as regulated by a respective voltage controller 35, 36.

Each of the voltage controllers 35 and 36 has four input ports and receives at one of those input ports the respective one of the output signals SVa and SVb emitted by the voltage sensor 32. Each voltage controller 35, 36 receives a respective reference signal SVar, SVbr at another of its input ports. The output signal Ssp from the speed sensor 12 is fed to a third of the input ports of each voltage controller 35, 36 and a reference signal St is fed to the fourth input port. The reference St is the maximum permitted current. It translates to a limiting speed for a given steady state power demand since current is varied by varying the speed of the prime mover 10. The reference St is chosen as being the current that flows when the prime mover 10 is operated at a certain working speed which is between the selected maximum and minimum engine speeds Srmax and Srmis and when a load is connected across the intermediate DC voltage. Each voltage controller 35,36 has one output which emits the respective current demand signal SImxa, SImxb which is fed to an input of the respective current controller 33,34.

The second converter 17 has a positive input which is connected to the cathode of the diode 26 and to one side of the capacitor 29 and a negative input which is connected through a third current sensor 37 to the anode of the diode 28 and to one side of the capacitor 31. The second converter 17 has a power output terminal U, V, W for each phase which is for connection to an external load. The output of each phase U,V,W is connected through a respective filter circuit comprising a respective series connected inductor 38, 39, 41 and capacitor 42, 43, 44 to the neutral terminal.

The AC power output for each phase U, V, W of the three phase output of the second converter 17 is produced by operation as bistable switching means of a respective one of three pairs of transistors 46 and 47; 48 and 49; 51 and 52 which are connected in parallel with one another and with the pair of capacitors 29 and 31. The series connection between the transistors of each pair 46 and 47, 48 and 49, 51 and 52 is connected to the respective power output terminal U, V, W through the respective inductor 38, 39, 41. These power output terminals U, V, W are the power output terminals of the AC/ AC conversion circuit shown in Figure 1.

A speed correction circuit 45 receives a reference signal SrLC, and a speed control signal which is generated in response to the output active power demand as is described below. The output of the speed correction circuit 45 is the signal Srs that is fed to the speed controller 13.

Parallel operation

Figure 2 shows three variable speed generating sets 66, 67, 68 which conveniently are each as has been described above with reference to Figure 1 and which are to be connected in parallel to a common load bus 53 by closing a respective contactor 69, 71, 72. Several loads 54 are shown connected to the common load bus 53. In general, the present principles apply where two or more generating sets supply one or more loads.

When each power output U, V, W of the AC/ AC conversion circuit is connected to the load bus 53 as shown in Figure 2, a trip switch 56, 57, 58 is connected between the respective power output U,V,W and the neutral line N of the system through the load bus 53 and the loads 54, each trip switch 56 58 having one pole connected to the respective power output U, V, W and another pole connected to the load bus 53. Figure 1 shows that a current sensor 59, 61, 62 for each phase is connected between the respective power output U, V, W and the respective trip switch 56, 57, 58 on either one side (as shown) or the other of the respective inductor 38, 39, 41 to measure the current flow through that inductor 38, 39, 41. A voltage sensor 63 senses the output voltage between each line that is connected to each power output terminal U, V, W and the neutral N. Each trip switch 56, 57, 58 is arranged to trip and disconnect the respective phase U, V, W of the respective variable speed generating set 66, 67, 68 from the load bus 53 when current flow in that line is at a certain level for a certain time. The reference levels for the required values of output frequency and voltage produced by normal operation of the generating set are provided by an amplitude and frequency correction circuit 64 which has seven inputs and three outputs. It receives the output signals SVa and SVb from the voltage sensor 32 that indicate the voltages across the capacitors 29 and 31 which together comprise the DC link voltage, at respective ones of the inputs. At the remaining five inputs it receives respective reference signals SRIF, SRRF, SmI, Srvl and Srwl. Three outputs Sru2, Srv2 and Srw2 from the voltage, amplitude and frequency correction circuit 64 are fed to respective ones of three inputs of an inverter controller 65. The inverter controller 65 has another input which is connected to the neutral line N. It also receives three input signals Svu, Sw and Svw from the voltage sensor 63, three input signals SIu, SIv, SIw from the respective current sensor 59, 61, 62 that measures the current flow through the respective inductor 38, 39, 41 and an input signal Vo which is indicative of the sensed voltage of the load bus 53. The inverter controller 65 controls the switching operation of the transistors 46, 47, 48, 49, 51 and 52 of the three pairs of transistors of the inverter 17 by emitting a respective pulse width modulation signal from a respective output Tau, Tbu, Tav, Tbv, Taw,Tbw which is connected to the base of the respective transistor 46, 47, 48, 49, 51, 52. As a result, the AC output U, V, W of each phase has a controlled frequency and voltage and it is that controlled frequency and voltage AC output E which normally is supplied to the respective load 54 through the respective trip switch 56 58.

The various functional modules that control operation of the variable speed generating set described above with reference to Figure 1 may be individual programmed microprocessors or conveniently may all be performed by a digital signal processor (DSP) which is operatively associated with a memory in which the programs for each of the functional modules is stored. Other programs for performing other functions which are performed when preparing each variable speed generating set 66, 67, 68 for connection to the load bus 53 and for controlling the operation of those three variable speed generating sets 66, 67 and 68 once they have been connected to the load bus 53 would also be stored within the respective memory for processing by the digital signal processor. Such other functions will be described now with reference to Figures 2 to 4. The control mechanism 55 for each contactor 69, 71, 72 shown in Figure 2 includes a respective voltage sensor which senses the amplitude and frequency of the voltage Vo the load bus 53. A program which is stored in the memory and which is operable by the digital signal processor determines whether or not the sensed frequency and amplitude of the load bus voltage Vo are within certain limits set for the respective variable speed generating set 66, 67, 68. If either the frequency or the amplitude of the load bus voltage Vo is not within the set limit, an error state exists and the contactor 69, 71, 72 remains open. On the other hand if both the frequency and amplitude of the load bus voltage Vo are found to be within the certain limits set for the respective variable speed generating set 66, 67, 68, the output E of the DC/ AC converter 17 of the respective variable speed generating set 66,67,68 is synchronised with the load bus voltage by operation of a phase lock loop 73.

Synchronisation Figure 3 shows parts of the control mechanism for controlling the DC/ AC converter 17 of the respective variable speed generating set 66, 67, 68. For convenience, Figure 3 shows the control for one phase of the output of the DC/ AC converter 17 only. There will be a similar control program for each phase of the output E of each DC/ AC converter 17.

Referring to Figure 3, a signal which is representative of the sensed load bus voltage Vo is fed to an input of the phase lock loop 73. The control signal of the controlled oscillator of the phase lock loop 73 is derived by the digital signal processor from an average value of any phase difference between the amplitude and frequency of the sensed load bus voltage Vo and the amplitude and frequency of the output θ of the phase lock loop 73. The phase lock loop 73 operates to bring the amplitude and frequency of its output θ into synchronism with the amplitude and frequency of the sensed load bus voltage Vo. The output θ of the phase lock loop 73 is fed to an input of a voltage reference generator 79 which emits an output Vref which is fed as a reference signal to a voltage controller 81 of the inverter controller 65. The voltage controller 81 emits an output which is fed as a reference signal to a current controller 82 of the inverter controller 65. The current controller 82 emits an output which is transformed within the inverter controller 65 into the respective outputs Tau and Tbu; Tav and Tbv, and Tau and Tbw which control operation of the respective pairs of transistor 46 and 47, 48 and 49, 51 and 52 of the DC/AC converter 17.

The control mechanism 55 of the respective contactor 69, 71, 72 responds to the amplitude and frequency of the output θ of the phase lock loop 73 having been brought into synchronism with the amplitude and frequency of the sensed load bus voltage Vo by closing the respective contactor 69, 71, 72. The phase lock loop 73 is turned off once the respective contactor 69, 71, 72 has been closed.

It is to be understood that each phase U, V, W of the output E of the DC/ AC converter 17 is synchronised with a corresponding phase of the sensed load bus voltage Vo severally and that a phase lock loop 73 will be provided for each phase U, V, W.

Steady state operation During steady state operation the required load sharing between the variable speed generating sets 66, 67 and 68 that are connected in parallel to the load bus 53 is achieved using the amplitude and frequency droop methods.

Figure 3 shows that the instantaneous voltage and current signals v(t) and i(t) which are derived from the respective voltage and current signals Svu, Sw, Svw, SIu, SIv, SIw are fed to an active power calculator 74 in which the active power P is calculated and which emits an active power signal P. The active power signal P is fed to an input of an engine speed control module 70, as well as to a frequency droop controller 75 and to a step load change detector 76. The output of the engine speed control module 70 is fed to the third input of the speed correction circuit 45 so that the speed correction signal Srs is responsive to the calculated active power P.

In the steady state when the respective contactor 69, 71, 72 has been closed and the phase lock loop 73 switched off, the frequency droop controller 75 operates to control the frequency ω of the respective phase U, V, W of the output of the DC/ AC converter 17 of the variable speed generating system 66, 67, 68 in relation to the output active output power P. This relationship is illustrated in Figure 4. The control is such that as the output active power P increases, the frequency of the output E decreases, following the line A, A', B, C. The proportions of active power sharing between all the variable speed generating sets 66, 67, 68 connected in parallel to the load bus 53 depend on the slope of the curve A, A¹, B, C of each of the variable speed generating sets 66, 67 and 68. The required slope /n,- for the required share of the active power demand to be met by the respective variable speed generating set 66, 67, 68 is stored in the frequency droop controller 75. If all the variable speed generating sets 66, 67, 68 have the same slope m,-, active power is shared between them equally. To achieve active power sharing proportional to the output power ratings P₁ of the variable speed generating sets 66, 67, 68, their slopes m,- must satisfy the following equation

OT₁ - P₁ " = m₂ ^■ P₂ ^* = m,. ^• P₁ ^*

The frequency droop controller 75 receives a reference signal f* at another input. That reference f* is the nominal frequency of all the variable speed generating sets 66, 67 and 68 connected in parallel to the load bus 53. The reference droop controller 75 is programmed to control the frequency coi of the output voltage E of the respective DC/ AC converter 17 in accordance with the equation

CO₁ = ω - m,. • P₁

where ω and Pi are the input signals f* and P received by the frequency droop controller 75 and the constant m,- is programmed therein and is the slope of the frequency curve A, A', B, C shown in Figure 4.

There is a similar control for reactive power. A reactive power calculator 77 receives the instantaneous output voltage signal v(t) at one input and another signal i(t-pi/2) at another input. The latter is derived from the respective current signal SIu, SIv, SIw. The reactive power calculator 77 computes the reactive power from those inputs and emits an output signal Q which is indicative of the reactive power. That output signal Q is fed to an input of an amplitude droop controller 78 which receives another reference signal V* at another input. That reference signal V* is the nominal voltage amplitude for all the variable speed generating sets 66, 67 and 68. The amplitude droop controller 78 is programmed to operate in a similar manner to the operation of the frequency droop controller 75 described above, to control the amplitude of the output E of the DC/ AC converter 17 of the respective variable speed generating set 66, 67, 68. The slope of the amplitude/reactive power curve that is programmed in the amplitude droop controller 78 is n. The outputs f and V of the frequency droop controller 75 and the amplitude droop controller 78 respectively are fed to respective inputs of the voltage reference generator 79. The output Vref of the voltage reference generator 79 is derived from the inputs f and V and is used as has been described above to control of the DC/ AC converter 17.

As stated above, the output active power of each of the variable speed generating sets 66, 67 and 68 is limited by the speed of the respective generator 11. Generally the generator speed increases proportionally to the output active power demand in response to the speed correction signal Srs that is responsive to the output active power P. However, the output active power demand may increase suddenly and that sudden increase in the active power demand is liable to be a demand for a greater amount of output active power than can be met immediately by the power output of the generator 11. Consequently, the output active power P; that is delivered by the DC/ AC converter 17 of each variable speed generating set 66, 67, 68 must be limited until sufficient time has passed for the generator speed to be increased to a level necessary to meet the output active power demand. The step load change detector 76 is provided to overcome the problems that follow from this limiting of the output active power Pj to a level less than the output power demand and that have been discussed above once steady state conditions are established for operation of the frequency droop method for control of active power sharing between the variable speed generating sets 66, 67 and 68 that are connected in parallel to the load bus 53. The step load change detector 76 is programmed to respond to the active power signal P, to detect sudden active power flow changes ΔP; and to emit two output signals . One of those output signals ΔP is indicative of the detected sudden active power flow change and is fed to a respective input of the engine speed control module 70. The other output signal V_dj_p is proportional to the detected active power flow change ΔPj and is fed to a respective input of the voltage reference generator 79 and thereby to effect a reduction in the amplitude of the generated voltage output E emitted by the DC/ AC converter 17 in a programmed manner by a coefficient E_di_P which is proportional to the detected active power flow change ΔPj. More specifically, by operation of the program,

where E* is the nominal voltage amplitude of all the variable speed generating sets 66, 67 and 68, and

E_dip = (mi/m_min)kdip Δ Pi

where m; is the frequency droop coefficient of the ith system and m_mi_n is the lowest frequency droop coefficient among all the variable speed generating sets 66, 67 and 68.

Small active power changes below a trigger level Pjtrig, are not detected. During any steady state where ΔPi < Pung, the step load change controller 76 gradually reduces the output signal E_di_p so that the voltage amplitude E is gradually increased by operation of the inverter controller 65 up to the nominal value V* by reducing E_dip in accordance with the program.

Edip (t + 1) = Edip (t) - (E_dip_iπitial/ ktrec. Δ P[.)

The choice of the voltage dip constant k_di_P and of the restoration time constant k^_c is based on the system set up and the characteristics of the engine 11.

The detection level P^_g is set such that:

Pitrig < [ Piin-max (t) - Pi (t)]

Piin-max = max. input active power at a given speed.

If variable speed generating sets of different output power ratings are connected in parallel to a common load bus 53, their detection levels Pitπ_gmust fulfil the following function: mi P i _trig = m₂ P_2trig = mi Phπg

Feeding the detected active power flow change signal Δ P; to the engine speed control module 70 results in the speed correction signal Srs being responsive to the sudden active power change so that the engine speed which normally is increased proportionally to the output active power demand P is increased further to meet that sudden increase in output power demand.

Transient operation There will be a time delay between connection of the freshly synchronised variable speed generating set 66, 67, 68 to the load bus 53 and the establishment of steady state conditions for operation of the amplitude and frequency droop methods for controlling power sharing between that variable speed generating set 66, 67, 68 and the previously connected variable speed generating sets 66, 67, 68. The control illustrated in Figure 3 also caters for the fact that the output active power of a variable speed generating set 66, 67, 68 is limited by the speed of the generator 11 of that set 66, 67, 68 so that the set 66, 67, 68 may be unable to meet a sudden increase in power demand immediately.

Furthermore, it is undesirable for the step load change detector 76 to detect active power changes that occur on connection of a variable speed generating set 66, 67, 68 to the load bus 53 in parallel with one or more variable speed generating sets 66, 67, 68 that were previously connected to the load bus 53 until steady state conditions for droop method power sharing control have been established.

According to an embodiment of the invention, the frequency droop coefficient m of the variable speed generating set 66, 67, 68 that has just been connected to the load bus 53 is set to a higher value than during normal parallel operation, and then decreased gradually.

Figure 5 shows in more detail parts of the frequency droop controller 75. A multiplier 90 receives at one input the signal P, and at the other input the value m. The output of the multiplier 90 is fed to adder 94, which subtracts the output of the multiplier from the signal f in order to obtain the signal f. As explained above, the signal f is used as a reference frequency in order to control the frequency at the output of the DC/ AC inverter.

The value of m is determined by calculation unit 92. As explained above, in the steady state the value of m is constant, and determines the proportion of active power contributed by the generating set. The calculating unit 92 receives a signal from the control mechanism 55 in Figure 2 which indicates that the generator set is to be connected to a load bus. On receipt of this signal the calculating unit 92 sets the value of m to a higher value than its steady state value. Once the generator set has been connected, the value of m is reduced gradually until it reaches its steady state value.

Figure 6 shows how the value of m changes with time. At time t=0 the generator set is connected to the load bus. At this point m is set to an initial value which is higher than its steady state value. During the period t=0 to t=l the value of m is gradually reduced, until at t=l it reaches its steady state value. At this point steady state operation of the parallel connected generator sets takes place.

By setting the initial value of m to higher than its steady state value, the initial active power flow is reduced compared to the case where m is unchanged. For example, consider the case where a first standalone generator is delivering some active power (Pioa_d) to a load, and a second generator is then connected to it. The second generator initially delivers no active power (P₂=O). Assuming that the generators have the same frequency droop coefficient (m _I=In₂) after a very short while their output active powers will be equalized (Pi=P₂=Pi_Oad/2). The output active power of the second generator will be quickly increased by ΔP₂=Pi_oad/2. This may lead to a temporary voltage dip because of the long engine speed-up time and lack of input power. On the other hand the first generator will decrease its output power by half.

In order to avoid voltage dip in the second generator, the initial active power change (ΔP?) is reduced. This is achieved by increasing the frequency droop coefficient m₂. For example, assume that initially the frequency droop coefficient m₂ is twice the value of mi (m₂=2mi). hi this case in the steady state the second generator will deliver twice as much active power to the load (Pi = 2P₂). As a result the initial output power change in the second generator after connecting it to the first generator is reduced to ΔP₂=Pi_Oad/3 (because 2P₂ + Pi = Pi_oad)- By further increasing the initial frequency droop Hi₂, it is possible to reduce further the initial active power change in the second generator. If the initial power change is low enough there will be no voltage dip.

When setting the initial value of m, the worst case scenario should be considered - that is when Pi_oatl equals the maximum rated power of the generator. An initial value of m which is five times its steady state value has been found to be suitable, although other values could be used.

Once the generators have been connected the frequency droop coefficient m can be restored slowly (decreased) to its nominal value. The restoration time is based on the worst-case scenario - that is it should be longer than engine speed-up time after applying maximum active load change. The frequency droop m restoration may be linear in time, or may follow some other path, such as curved or multiple-stepped.

The effect of adjusting the frequency droop coefficient in the way described above is shown in Figure 4. Referring to Figure 4, the value of m is initially set so that the slope of the frequency against load is as shown by the dashed line. The value of m is then slowly reduced back to its steady state value. As a consequence, the frequency droop path follows the curve A, A", B, rather than A, A', B as would be the case if the value of m were constant.

Increasing the frequency droop coefficient m in this way avoids detection of the active power changes by the step load change detector 76 since the difference between the frequencies (ω_o) of all the parallel connected variable speed generating sets 66, 67 and 68 when the active power is shared equally between them and the frequency (coj) of the variable speed generating set 66, 67, 68 that has just been connected to the load bus 53 in parallel with the others is reduced as compared to what it would have been if the frequency droop coefficient mi had been that employed for the conventional frequency droop method of active power sharing control. Such a reduced frequency difference means that the power angle Φ and accordingly the output active power P; changes slowly. While preferred embodiments of the invention have been described above, it will be appreciated that modifications are possible within the scope of the invention. For example, instead of an engine and generator, the generating set could comprise one or more fuel cells, a hydro-electric generator, a wind turbine, a gas turbine or any other controllable source of electricity. Other modifications will be apparent to the skilled person.

Claims

1. A control system for controlling the AC output of a variable speed generating set, the control system implementing a frequency droop technique in which the frequency of the AC output varies with power in accordance with a frequency droop coefficient, wherein the control system is arranged such that, when the generating set is first connected to a load bus, the frequency droop coefficient is set to a higher value than its steady state value.

2. A control system according to claim 1, wherein the initial value of the frequency droop coefficient is set to as to produce substantially no voltage dip in the AC output when the generating set is connected to the load bus.

3. A control system according to claim 1 or 2, wherein the control system is arranged such that, once the generating set has been connected to the load bus, the frequency droop coefficient is returned to its steady state value.

4. A control system according to claim 3, wherein the frequency droop coefficient is returned to its steady state value gradually over time.

5. A control system according to claim 4, wherein the period of time over which the frequency droop coefficient is returned to its steady state value is at least as long as the time that would be taken for an engine in the generating set to speed up so as to power a maximum expected load.

6. A control system according to any of the preceding claims, further comprising a phase locked loop for synchronising the frequency of the AC output of the variable speed generating set with that of the load bus before connection of the generating set to the load bus.

7. A control system according to claim 6, wherein the control system is arranged to set the frequency of the phased locked loop in accordance with the frequency of the load bus, and to use the phased locked loop to control the frequency of the AC output of the generating set.

8. A control system according to claim 6 or 7, wherein the control system is arranged such that, once the AC output of the generating set has been synchronised with the load bus, the generating set is connected to the load bus.

9. A control system according to any of claims 6 to 8, wherein a control signal for control of the phase locked loop is derived within said phase lock loop from an average value of any phase difference between the load bus voltage and the output of the phase lock loop.

10. A variable speed generating set comprising a control system according to any of the preceding claims.

11. A method of controlling the AC output of a variable speed generating set, the method comprising implementing a frequency droop technique in which the frequency of the AC output varies with power in accordance with a frequency droop coefficient, wherein, when the generating set is first connected to a load bus, the frequency droop coefficient is set to a higher value than its steady state value.

12. A method according to claim 11, wherein the initial value of the frequency droop coefficient is set to as to produce substantially no voltage dip in the AC output when the generating set is connected to the load bus.

13. A method according to claim 11 or 12, wherein, once the generating set has been connected to the load bus, the frequency droop coefficient is returned to its steady state value.

14. A method according to claim 13, wherein the frequency droop coefficient is returned to its steady state value gradually over time.

15. A method according to claim 14, wherein the period of time over which the frequency droop coefficient is returned to its steady state value is at least as long as the time that would be taken for an engine in the generating set to speed up so as to power a maximum expected load.