WO2006100779A1 - Magnetic memory device and method for manufacturing same - Google Patents

Magnetic memory device and method for manufacturing same Download PDF

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Publication number
WO2006100779A1
WO2006100779A1 PCT/JP2005/005390 JP2005005390W WO2006100779A1 WO 2006100779 A1 WO2006100779 A1 WO 2006100779A1 JP 2005005390 W JP2005005390 W JP 2005005390W WO 2006100779 A1 WO2006100779 A1 WO 2006100779A1
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WIPO (PCT)
Prior art keywords
film
layer
magnetic
memory device
magnetic memory
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PCT/JP2005/005390
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French (fr)
Japanese (ja)
Inventor
Chikako Yoshida
Osamu Shimizu
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Fujitsu Limited
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Priority to PCT/JP2005/005390 priority Critical patent/WO2006100779A1/en
Publication of WO2006100779A1 publication Critical patent/WO2006100779A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/20Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors
    • H10B61/22Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having three or more electrodes, e.g. transistors of the field-effect transistor [FET] type

Definitions

  • the present invention relates to a magnetic memory device and a manufacturing method thereof, and more particularly, to a magnetic memory device having a magnetoresistive element and a manufacturing method thereof.
  • MRAM Magnetic Random Access Memory
  • MRAM stores information using a combination of magnetization directions in two magnetic layers, and changes in resistance (i.e., current or current) when the magnetic directions between these magnetic layers are parallel and antiparallel. The stored information is read by detecting the voltage change).
  • MTJ Magnetic
  • Tunnel Junction A device called Tunnel Junction is known.
  • An MTJ element has two ferromagnetic layers stacked via a tunnel insulating film, and the tunnel current that flows through the tunnel insulating film is based on the relationship between the magnetic directions of the two ferromagnetic layers. It uses a changing phenomenon. That is, the MTJ element has a low element resistance (low resistance state) when the magnetic directions of the two ferromagnetic layers are parallel, and has a high element resistance (high resistance state) when the two ferromagnetic layers are antiparallel. By associating these two states with data “0” and data “1”, they can be used as a memory element.
  • FIG. 10 is a process cross-sectional view illustrating the proposed method of manufacturing a magnetic memory device.
  • a conductive layer 154, an antiferromagnetic layer 158, a fixed layer 166, a tunnel insulating film 168, a free layer 174, and a conductive layer 178 are sequentially formed on a substrate 110. .
  • a laminated film 179 including the conductive layer 154, the antiferromagnetic layer 158, the fixed layer 166, the tunnel insulating film 168, the free layer 174, and the conductive layer 178 is formed.
  • the conductive layer 154 serves as the lower electrode of the MTJ element 152
  • the conductive layer 176 serves as the upper electrode of the MTJ element 152.
  • a photoresist film 186 is formed on the conductive layer 178. Thereafter, the photoresist film 186 is patterned using photolithography technology.
  • the laminated film 179 is etched by argon ion milling using the photoresist film 186 as a mask until the surface of the conductive layer 154 is exposed. In this way, an MTJ element (magnetoresistance element) 152 is formed.
  • Patent Document 1 Japanese Patent Laid-Open No. 11-92971
  • Patent Document 2 JP 2002-76470 A
  • Patent Document 3 Japanese Patent Laid-Open No. 2003-31776
  • Patent Document 4 Japanese Patent No. 2677321
  • Patent Document 5 JP 2000-322710 A
  • Patent Document 6 Japanese Patent Laid-Open No. 2002-38285
  • Non-Patent Document 1 Noriyuki Fukumoto, Hideaki Numata, Katsumi Suemitsu, Seigo Nagahara, Norikazu Oshima, Hiromitsu Hata, Shuichi Tahara, Minoru Amano, Yoshiaki Asao, Hiroaki Kajita, ⁇ High heat resistance NiXFel-X / Al-oxide / Magnetization reversal characteristics of ferromagnetic tunnel junctions using Ta-free layers ", 28th Annual Meeting of the Japan Society of Applied Magnetics, 2004, p. 218
  • Non-Patent Document 2 GH Yu, HC Zhao, MH Li, and FW Zhu, "Interface reaction of Ta / Ni81Fel9or Ni81Fel9 / Ta and its suppression", Applied Physics Letters, Volume 80, Number 3, 21 January (2002), p . 455-457
  • the material of the laminated film 1 79 reattaches to the side surface of the etched laminated film 179, and the free layer 166 and the fixed layer 1 74 May be short-circuited.
  • the selectivity of the laminated film 179 with respect to the photoresist film 186 is not necessarily high enough, so that the photoresist film 186 must be formed very thick. I got it.
  • the photoresist film 186 has to be formed very thick has been an impediment to miniaturization of the magnetoresistive element.
  • the laminated film 179 is etched by ion milling, the sputtering speed varies depending on the incident angle of ions (depending on the incident angle of the sputtering rate), so the laminated film is etched perpendicular to the wafer surface. Is difficult. This has also been an impediment to miniaturization of magnetoresistive elements.
  • An object of the present invention is to provide a magnetic memory device capable of forming fine magnetoresistive elements with a high yield, and a method for manufacturing the same.
  • a magnetic memory device further comprising a film is provided.
  • a step of forming a first magnetic layer on a substrate, a step of forming a tunnel insulating film on the first magnetic layer, and the tunnel insulating film A step of forming a second magnetic layer thereon, a step of forming a ruthenium film on the second magnetic layer, a step of forming a conductive layer on the ruthenium film, and a photoresist mass on the conductive layer.
  • a method of manufacturing a magnetic memory device including a step of etching at least the ruthenium film and the second magnetic layer.
  • the ruthenium film since the ruthenium film is formed between the second magnetic layer and the electrode, the ruthenium film functions as an etching stopper when the electrode is formed by etching the conductive layer. Therefore, according to the present invention, it is possible to prevent receiving the second free layer damage when etching the conductive layer. Also, since the conductive layer is etched using the ruthenium film as an etching stopper, the patterning of the conductive layer can be performed uniformly in the wafer surface. Therefore, according to the present invention, the magnetoresistive element can be manufactured at a high yield. Can be formed.
  • the second magnetic layer and the like are patterned using the electrode as a mask, it is not necessary to form a very thick photoresist film. Since it is not necessary to form a very thick photoresist film, the photoresist film can be finely patterned. Therefore, according to the present invention, the magnetoresistive element can be formed finely.
  • the ruthenium film functions as an etching stopper, it is not necessary to detect the end point of etching using a plasma spectroscopic analyzer or the like. For this reason, according to the present invention, the conductive layer can be patterned easily and reliably.
  • the ruthenium film formed between the second magnetic layer and the electrode is subjected to heat treatment when aligning the spin direction in the first magnetic layer or the second magnetic layer. It also functions as a diffusion prevention film (barrier film) that prevents the atoms constituting the second magnetic layer and the atoms constituting the electrode from interdiffusion. Therefore, according to the present invention, the ruthenium film can prevent the atoms constituting the electrode and the atoms constituting the first magnetic layer from interdiffusion.
  • a magnetic memory device having a minute magnetoresistive element can be manufactured with a high yield.
  • FIG. 1 is a cross-sectional view showing a magnetic memory device according to an embodiment of the present invention.
  • FIG. 2 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 2).
  • FIG. 3 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 3).
  • FIG. 4 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 4).
  • FIG. 5 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 1).
  • FIG. 6 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 6).
  • FIG. 7 is a graph (No. 1) showing a concentration profile in the depth direction obtained by Auger electron spectroscopy.
  • FIG. 8 is a graph (part 2) showing the concentration profile in the depth direction obtained by the Auger electron spectroscopy.
  • FIG. 9 is a graph showing a magnetic field curve measured by a sample vibration type magnetometer.
  • FIG. 10 is a process sectional view showing the proposed method for manufacturing a magnetic memory device.
  • FIG. 11 is a process cross-sectional view showing a case where a laminated film is etched by the RIE method. Explanation of symbols
  • the etched material of the laminated film 179 reattaches to the side surface of the laminated film 179, and the free layer 166 and the fixed layer 174 May be short-circuited.
  • the selectivity of the laminated film 179 with respect to the photoresist film 186 is not necessarily high enough, so that it is necessary to form the photoresist film 186 sufficiently thick. I got it. The fact that the photoresist film 186 had to be formed sufficiently thick was an obstacle to miniaturization of the magnetoresistive element.
  • the sputtering speed varies depending on the incident angle of ions (depending on the incident angle of the sputtering rate). Is difficult. This has also been an impediment to miniaturization of magnetoresistive elements.
  • etching of the laminated film using the RIE (Reactive Ion Etching) method is also considered.
  • FIG. 11 is a process cross-sectional view showing the case where the laminated film is etched by the RIE method.
  • a conductive layer 154, an antiferromagnetic layer 158, a fixed layer 166, a tunnel insulating film 168, a free layer 174, and a conductive layer 178 are sequentially formed on a substrate 110. .
  • a laminated film 179 including the conductive layer 154, the antiferromagnetic layer 158, the fixed layer 166, the tunnel insulating film 168, the free layer 174, and the conductive layer 178 is formed.
  • the conductive layer 154 serves as the lower electrode of the magnetoresistive element
  • the conductive layer 176 serves as the upper electrode of the magnetoresistive element.
  • a photoresist film 186 is formed on the conductive layer 178. Thereafter, the photoresist film 186 is patterned using photolithography technology.
  • the conductive layer 178 is etched by the RIE method using the photoresist film 186 as a mask.
  • the etching gas for example, a halogen-based gas is used. o In this way, an upper electrode made of the conductive layer 178 is formed.
  • the antiferromagnetic layer 158 is anisotropically etched.
  • a mixed gas of CO gas and NH gas is used as the etching gas.
  • the end point of etching is, for example, a plasma spectrometer
  • the material of the etched laminated film 179 reattaches to the sidewall of the laminated film 179, but does not adhere to the sidewall of the laminated film 179.
  • the kimono is removed as follows. That is, using a mixed gas of CO gas and NH gas
  • the laminated film 179 When the laminated film 179 is anisotropically etched, the laminated film 179 is etched in a direction substantially perpendicular to the substrate surface, and the lower electrode 154 functioning as an etching stopper is exposed. After the laminated film 179 is etched and the lower electrode 154 is exposed, the laminated film 179 that is a raw material of the deposit is not etched, so that the material of the laminated film 179 may be reattached to the side wall of the laminated film 179. Disappear. Deposits adhering to the side walls of the laminated film 179 are gradually removed by etching.
  • the laminated film 179 is etched using the RIE method, it is possible to prevent the free layer 174 and the fixed layer 166 from being short-circuited. Further, since the free layer 174 and the like are etched using the upper electrode 178 as a node mask, it is not necessary to form the photoresist film 186 very thick. Further, when the laminated film 179 is etched using the RIE method, the laminated film 179 can be etched almost perpendicularly to the wafer surface. Therefore, if the etching is performed using the RIE method, the magnetoresistive element 152 can be miniaturized.
  • the halide force generated during the etching is applied to the side wall of the upper electrode 178 and the surface of the free layer 174. It may adhere. If halogenated substances adhere to the side walls of the upper electrode 178 or the surface of the free layer 174, the adhered halogenated substances may react with the wiring material, resulting in corrosion of the wiring (after-corrosion). For this reason, it is difficult to form a magnetoresistive element with a sufficiently high yield.
  • the etching rate is not necessarily uniform within the wafer surface, it is not always easy to pattern the conductive layer 178 uniformly within the wafer surface.
  • the ruthenium film is formed between the free layer and the conductive layer (upper electrode), when the upper electrode is formed by etching the conductive layer, the ruthenium film is used as an etching stopper. It becomes possible to etch the layer. Therefore, the ruthenium film can prevent the free layer from being damaged by being exposed to the halogen-based gas used when etching the conductive layer. In addition, since the ruthenium film functions as an etching stopper when the conductive layer is etched to form the upper electrode, the conductive layer can be patterned uniformly. Therefore, according to the present embodiment, a magnetic memory device having a fine magnetic resistance element can be manufactured with a high yield.
  • the ruthenium film formed between the free layer and the conductive layer (upper electrode) is heat-treated while applying a magnetic field to align the spin direction in the fixed layer.
  • it also functions as a diffusion prevention film (barrier film) that prevents the atoms constituting the free layer and the atoms constituting the upper electrode from interdiffusion. Therefore, according to the present invention, it is possible to provide a magnetic memory device having a magnetoresistive element with better characteristics.
  • FIGS. 1-10 A magnetic memory device and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to FIGS.
  • FIG. 1 is a sectional view of the magnetic memory device according to the present embodiment.
  • Figure 1 (a) is according to this embodiment. It is sectional drawing which shows the structure of a magnetic memory device.
  • FIG. 1B is a cross-sectional view showing a part of the magnetic memory device according to the present embodiment.
  • a gate electrode (read word line) 14 is formed on a semiconductor substrate 10 via a gate insulating film 12.
  • the semiconductor substrate 10 for example, a silicon substrate is used.
  • source Z drain regions 16a and 16b are formed in the semiconductor substrate 10 on both sides of the gate electrode 14.
  • the transistor 18 having the gate electrode 14 and the source / drain regions 16a and 16b is formed.
  • An interlayer insulating film 20 is formed on the semiconductor substrate 10 on which the transistor 18 is formed.
  • contact holes 22 reaching the source Z drain regions 16a and 16b are formed.
  • a conductor plug 24 is embedded in the contact hole 22.
  • An interlayer insulating film 26 is formed on the interlayer insulating film 20 in which the conductor plugs 24 are embedded.
  • grooves 28a and 28b are formed in the interlayer insulating film 26 in the interlayer insulating film 26.
  • the groove 28a is for embedding the conductive layer 28a.
  • the groove 28b is for embedding the wiring 30b.
  • the upper surface of the conductor plug 24 is exposed in the grooves 28a and 28b.
  • a conductive layer 30a is embedded in the groove 28a.
  • the conductive layer 30a is connected to the conductor plug 24.
  • a wiring (ground line) 30b is embedded in the groove 28b.
  • Wiring 3 Ob functions as a ground line.
  • the ground line 30b is electrically connected to the source / drain region 16b of the transistor 18 through the conductor plug 24 !.
  • An interlayer insulating film 32 is formed on the interlayer insulating film 26 in which the conductive layer 30a and the wiring 30b are embedded.
  • a contact hole 34 reaching the conductive layer 30a is formed in the interlayer insulating film 32.
  • a conductor plug 36 is embedded in the contact hole 34. The conductor plug 36 is connected to the conductive layer 30a.
  • An interlayer insulating film 38 is formed on the interlayer insulating film 32 in which the conductor plugs 36 are embedded. Grooves 40 a and 40 b are formed in the interlayer insulating film 38. In the groove 40a, the upper surface of the conductor plug 36 is exposed!
  • a conductive layer 41a is embedded in the groove 40a.
  • the conductive layer 41a is connected to the conductor plug 36.
  • a wiring (write word line) 41b is embedded in the groove 40b.
  • the conductive layer 41 a and the write word line 41 b are each composed of a laminated film composed of a Ta (tantalum) film (not shown), a NiFe film 42, and a Cu (copper) film 44.
  • the Ta film functions as a barrier metal film.
  • the NiFe film 42 functions as a cladding layer for obtaining a strong magnetic field when writing.
  • An interlayer insulating film 46 having a film thickness of lOOnm is formed on the interlayer insulating film 38 in which the conductive layer 41a and the write word line 41b are embedded.
  • a contact hole 48 reaching the conductive layer 41a is formed in the interlayer insulating film 46.
  • a conductor plug 50 is embedded in the contact hole 48. The conductor plug 50 is electrically connected to the conductive layer 41a.
  • a lower electrode 54 of the magnetoresistive element 52 is formed on the interlayer insulating film 46 in which the conductor plug 50 is embedded.
  • a material of the lower electrode 54 for example, a Ta film is used.
  • the lower electrode 54 is electrically connected to the source / drain region 16a of the transistor 18 through the conductor plug 50, the conductive layer 41a, the conductor plug 36, the conductive layer 30a, and the conductor plug 24.
  • a NiFe film 56 is formed on the lower electrode 54.
  • the NiFe film 56 is for forming an antiferromagnetic layer 58 with good crystallinity on the upper side.
  • an antiferromagnetic layer 58 made of a PtMn film is formed on the NiFe film 56.
  • a ferromagnetic layer 60 made of a CoFe film is formed on the antiferromagnetic layer 58.
  • a nonmagnetic layer 62 made of a Ru film is formed on the ferromagnetic layer 60.
  • a ferromagnetic layer 64 made of a CoFe film is formed on the nonmagnetic layer 62.
  • the ferromagnetic layer 60, the nonmagnetic layer 62, and the ferromagnetic layer 64 constitute a fixed layer (first magnetic layer) 66 of the magnetoresistive element 52.
  • a tunnel insulating film 68 made of an alumina (AIO) film is formed on the fixed layer 66.
  • a ferromagnetic layer 70 made of an Fe film is formed on the tunnel insulating film 68.
  • a ferromagnetic layer 72 made of a NiFe film is formed on the ferromagnetic layer 70.
  • the ferromagnetic layer 70 and the ferromagnetic layer 72 constitute a free layer (second magnetic layer) 74 of the magnetoresistive element 52.
  • a Ru (ruthenium) film 76 is formed on the free layer 74. As will be described later, the Ru film 76 functions as an etching stopper film. The Ru film 76 will be described later. In other words, it also functions as a diffusion preventing film (barrier film).
  • An upper electrode (cap layer) 78 is formed on the Ru film 76.
  • a material of the upper electrode 78 for example, a Ta film is used.
  • the upper electrode 78 also functions as a hard mask when the free layer 76 and the like are etched.
  • a magnetoresistive element (MTJ element) 52 including the lower electrode 54, the antiferromagnetic layer 58, the fixed layer 66, the tunnel insulating film 68, the free layer 74, the Ru film 76, and the upper electrode 78 is formed.
  • An interlayer insulating film 80 is formed on the interlayer insulating film 46 on which the magnetoresistive element 52 is formed.
  • a contact hole 82 reaching the upper electrode 78 is formed in the interlayer insulating film 80.
  • a bit line 84 is formed in the contact hole 82 and on the interlayer insulating film 80.
  • the bit line 84 is connected to the upper electrode 78 of the magnetoresistive element 52.
  • the magnetic memory device according to the present embodiment is constituted.
  • the magnetic memory device according to the present embodiment is mainly characterized in that a Ru film 76 is formed between the free layer 74 and the upper electrode 78.
  • the Ru film 76 is formed between the free layer 74 and the upper electrode 78, the conductive layer 78 is etched to form the upper electrode, as will be described later.
  • the Ru film 76 functions as an etching stopper. Therefore, according to the present embodiment, it is possible to prevent the free layer 74 from being damaged when the conductive layer 78 is etched.
  • the conductive layer 78 is etched using the Ru film 76 as an etching stopper, the patterning of the conductive layer 78 can be performed uniformly in the wafer surface. Therefore, according to the present embodiment, the magnetoresistive element can be formed with a high yield.
  • the free layer 74 and the like are patterned using the upper electrode 78 as a mask, it is not necessary to form the photoresist film 86 very thickly. Since it is not necessary to form the photoresist film 86 very thickly, the photoresist film 86 can be finely patterned. Therefore, according to the present embodiment, the magnetoresistive element can be formed finely.
  • the Ru film 76 serves as an etching stopper. Therefore, it is not necessary to detect the end point of etching using a plasma spectroscopic analyzer or the like. Therefore, according to the present embodiment, the conductive layer 78 can be patterned easily and reliably.
  • the Ru film 76 formed between the free layer 74 and the upper electrode 78 is self-treated in the heat treatment when aligning the spin direction in the fixed layer 66 as described later. It also functions as a diffusion prevention film (noria film) that prevents mutual diffusion between the constituent atoms of the base layer 76 and the constituent atoms of the upper electrode 78. For this reason, according to the present embodiment, the Ru film 76 can prevent the atoms constituting the upper electrode 78 and the atoms constituting the free layer 76 from interdiffusion.
  • a magnetic memory device having a minute magnetoresistive element can be manufactured at a high yield.
  • FIGS. 2 to 6 are process cross-sectional views illustrating the method of manufacturing the magnetic memory device according to the present embodiment.
  • a transistor 18 having a gate electrode 14 and source Z drain regions 16a and 16b is formed on a semiconductor substrate 10.
  • the semiconductor substrate 10 For example, a silicon substrate is used.
  • an interlayer insulating film 20 made of a silicon oxide film having a thickness of lOOOnm is formed on the entire surface by, eg, CVD.
  • the surface of the interlayer insulating film 20 is planarized by, eg, CMP.
  • a contact hole 22 reaching the source Z drain regions 16a and 16b is formed in the interlayer insulating film 20 by using a photolithography technique.
  • a 30 nm-thickness Ti film (not shown) is formed on the entire surface by, eg, sputtering.
  • a TiN film (not shown) having a thickness of lOnm is formed on the entire surface by, eg, CVD.
  • a barrier metal film (not shown) made of a Ti film and a TiN film is formed.
  • a 300 nm-thickness tungsten film is formed on the entire surface by, eg, CVD.
  • the tungsten film and the barrier metal film are polished by, for example, a CMP method until the surface of the interlayer insulating film 20 is exposed.
  • the conductor plug 24 made of a tungsten film or the like is embedded in the contact hole 22.
  • an interlayer insulating film 26 made of a silicon oxide film having a thickness of 300 nm is formed on the entire surface by, eg, CVD.
  • the surface of the interlayer insulating film 26 is flattened by, eg, CMP.
  • trenches 28 a and 28 b are formed in the interlayer insulating film 26 by using a photolithography technique.
  • the groove 28b is for embedding the ground line 30b.
  • a seed layer (not shown) is formed on the entire surface by, eg, sputtering.
  • a 600 nm-thickness Cu film is formed on the entire surface by, eg, electroplating.
  • the Cu film and the seed layer are polished by, for example, a CMP method until the surface of the interlayer insulating film 26 is exposed.
  • the conductive layer 30a made of a Cu film or the like is buried in the groove 28a, and the ground line 30b made of the Cu film or the like is buried in the groove 28b.
  • an interlayer insulating film 32 made of a silicon oxide film having a thickness of 200 nm is formed on the entire surface by, eg, CVD.
  • the surface of the interlayer insulating film 32 is planarized by, eg, CMP.
  • a contact hole 34 reaching the conductive layer 30a is formed in the interlayer insulating film 32 by using a photolithography technique.
  • a 30 nm-thickness Ti film (not shown) is formed on the entire surface by, eg, sputtering.
  • a 20 nm-thick TiN film (not shown) is formed on the entire surface by, eg, CVD.
  • a barrier metal film (not shown) made of a Ti film and a TiN film is formed.
  • a 300 nm-thickness tungsten film is formed on the entire surface by, eg, CVD.
  • the tungsten film and the barrier metal film are polished by, eg, CMP method until the surface of the interlayer insulating film 32 is exposed.
  • the conductor plug 36 made of a tungsten film or the like is embedded in the contact hole 34.
  • an interlayer insulating film 38 made of a silicon oxide film having a thickness of 400 nm is formed on the entire surface by, eg, CVD.
  • the surface of the interlayer insulating film 38 is planarized by, eg, CMP.
  • grooves 40a and 40b are formed in the interlayer insulating film 38 by photolithography.
  • Oa is for embedding the conductive layer 41a.
  • the groove 40b is for embedding the write word line 41b.
  • a 20 nm-thickness Ta film (not shown) is formed on the entire surface by, eg, sputtering.
  • the Ta film functions as a noria metal film.
  • NiFe film 42 is formed on the entire surface by, eg, sputtering.
  • the NiFe film 42 functions as a clad layer for obtaining a strong magnetic field when writing.
  • a Cu film 44 having a film thickness of 800 nm is formed by an electroplating method.
  • the Cu film 44, the NiFe film 42, and the Ta film are polished by, for example, CMP until the surface of the interlayer insulating film 38 is exposed.
  • the conductive layer 4 la made of the Cu film 44 or the like is buried in the groove 40a, and the write word line 41b made of the Cu film 44 or the like is buried in the groove 40b.
  • an interlayer insulating film 46 is formed on the entire surface by, eg, CVD.
  • a contact hole 48 that reaches the conductive layer 41 a is formed in the interlayer insulating film 46 by using a photolithography technique.
  • a 30 nm-thick Ti film (not shown) is formed on the entire surface by, eg, sputtering.
  • a TiN film (not shown) having a thickness of 20 nm is formed by, eg, CVD.
  • a barrier metal film (not shown) made of a Ti film and a TiN film is formed.
  • a 300 nm-thickness tungsten film is formed by, eg, CVD.
  • the tungsten film and the barrier metal film are polished by CMP, for example, until the surface of the interlayer insulating film 46 is exposed. In this way, the conductor plug 50 made of tungsten or the like is embedded in the contact hole 48.
  • a conductive layer 54 made of a Ta film is formed on the entire surface by, eg, sputtering.
  • the conductive layer 54 becomes a lower electrode of the magnetoresistive element 52.
  • FIG. 3A the components existing below the interlayer insulating film 46 are omitted.
  • a NiFe film 56 having a thickness of 2 nm is formed by, eg, sputtering.
  • the NiFe film 56 is for forming an antiferromagnetic layer 58 with good crystallinity on the upper side.
  • an antiferromagnetic layer 58 made of a PtMn film having a thickness of 20 nm is formed by, eg, sputtering.
  • the ferromagnetic layer 60 made of a CoFe film having a thickness of 3 nm is formed by, eg, sputtering.
  • the nonmagnetic layer 62 made of a Ru film having a thickness of 0.9 nm is formed by, eg, sputtering.
  • the ferromagnetic layer 64 made of a CoFe film having a thickness of 3 nm is formed by, eg, sputtering.
  • the ferromagnetic layer 60, the nonmagnetic layer 62, and the ferromagnetic layer 64 constitute a fixed layer 66.
  • tunnel insulation made of lnm-thick alumina (AIO) is formed by, for example, sputtering.
  • a film 68 is formed.
  • a ferromagnetic layer 70 made of a CoFe film having a thickness of 2 nm is formed by, eg, sputtering.
  • a ferromagnetic layer 72 made of a NiFe film having a thickness of 4 nm is formed by, eg, sputtering.
  • the ferromagnetic layer 70 and the ferromagnetic layer 72 constitute a free layer 74.
  • a Ru (ruthenium) film 76 having a thickness of 1 nm is formed by, eg, sputtering.
  • the Ru film 76 functions as an etching stopper when the conductive layer 78 is patterned to form the upper electrode.
  • the Ru film 76 is heat-treated while applying a magnetic field to align the spin direction in the fixed layer 66, the atoms in the upper electrode 78 and the atoms in the free layer 74 are interdiffused. It also functions as a diffusion preventive film (nore film) that prevents this.
  • the conductive layer 78 made of a Ta film with a thickness of 30 nm is formed by, eg, sputtering.
  • the conductive layer 78 becomes an upper electrode. Further, as will be described later, the conductive layer 78 functions as a hard mask (cap layer) when the free layer 74 and the like are patterned.
  • a photoresist film 86 is formed on the entire surface by, eg, spin coating.
  • the photoresist film 86 is patterned using a photolithography technique (see FIG. 3B).
  • a photolithography technique see FIG. 3B.
  • it is exposed using an electron beam.
  • the conductive layer 78 is formed by the RIE (Reactive Ion Etching) method using the photoresist film 86 as a mask and the Ru film 76 as an etching stopper.
  • Etch As the etching apparatus, for example, an inductively coupled plasma (ICP) etching apparatus is used.
  • the inductively coupled plasma etching apparatus is a plasma etching apparatus using a high-density plasma generated by accelerating electrons by generating an induction electric field in plasma by a high frequency induction magnetic field generated by an antenna.
  • the etching conditions are as follows, for example.
  • Halogen gas is used as the etching gas. More specifically, a mixed gas of halogen gas and Ar gas is used.
  • C1 gas is used as the halogen-based gas. C1 gas flow
  • the amount is, for example, 20 sccm.
  • the flow rate of Ar gas is, for example, 17 sccm.
  • the pressure in the chamber when performing etching is, for example, 0.7 Pa.
  • the power applied to the upper electrode of the etching apparatus is 800 W, for example.
  • the power applied to the lower electrode of the etching apparatus is 60 W, for example.
  • the etching time is 20 seconds, for example.
  • the conductive layer 78 is patterned by etching for about 15 seconds. One bar etch is performed. The over-etching is performed in order to pattern the conductive layer 78 uniformly in the wafer surface.
  • the Ru film 76 functions as an etching stopper when the conductive layer 78 is etched, the conductive layer 78 can be uniformly patterned in the wafer surface. Further, since the selection ratio of the conductive layer 78 to the Ru film 78 is sufficiently high, even the Ru film 76 is not etched when the conductive layer 78 is etched. Therefore, the Ru film 76 can prevent the free layer 74 from being damaged when the conductive layer 78 is etched.
  • the material of the conductive layer 78 is not limited to the Ta film.
  • a Ti film or a TiN film may be used as the material for the conductive layer 78.
  • the conductive layer 78 can be etched with a high selectivity with respect to the Ru film 76.
  • halogen-based gas is not limited to the C1 gas.
  • halogen-based gas is not limited to the C1 gas.
  • halogen-based gas is not limited to the C1 gas.
  • CF gas or the like may be used. Even when CF gas is used,
  • the conductive layer 78 can be etched at a high selectivity.
  • the material of the conductive layer 78, the etching gas, and the like may be appropriately set so that the conductive layer 78 can be etched with a high selection ratio with respect to the Ru film 76.
  • the upper electrode made of the conductive layer 78 is formed.
  • the upper electrode 78 also functions as a hard mask when the free layer 74 and the like are etched.
  • the upper electrode 78 is used as a node mask
  • the conductive layer 54 is used as an eztin dust flange
  • a Ru film 76 is used as an eztin dust flange
  • a free layer 74 is used as an eztin dust flange
  • a tunnel insulating film 68 is used as a fixed layer 66
  • the ferromagnetic layer 58 and the NiFe film 56 are etched.
  • the etching conditions are as follows.
  • As the etching gas for example, a mixed gas of CO gas and NH gas is used. CO gas flow rate
  • the conductive layer 54 is patterned using a photolithography technique. Thereby, a lower electrode made of the conductive layer 54 is formed.
  • an interlayer insulating film 80 made of a silicon oxide film is formed by a low temperature plasma CVD method.
  • the film formation temperature is, for example, 300 ° C or lower.
  • the surface of the interlayer insulating film 80 is planarized by CMP.
  • a contact hole 82 reaching the upper electrode 78 is formed by using a photolithography technique.
  • the direction of spin in the fixed layer 66 is aligned by performing heat treatment while applying a magnetic field.
  • the heat treatment temperature is, for example, 260 ° C.
  • the strength of the magnetic field is 2T, for example. Since the Ru film 76 is formed between the free layer 74 and the upper electrode 78, even if such a heat treatment is performed, the atoms in the free layer 74 and the atoms in the upper electrode 78 are interdiffused.
  • a conductive layer 84 made of, eg, aluminum is formed on the entire surface by, eg, sputtering.
  • the conductive layer 84 is patterned using a photolithography technique. Thus, a bit line made of the conductive layer 84 is formed. The bit line 84 is electrically connected to the upper electrode of the magnetoresistive element.
  • the magnetic memory device according to the present embodiment is manufactured.
  • the main feature is that the Ru film 76 is formed between the free layer 74 and the conductive layer 78.
  • the Ru film 76 is formed between the free layer 74 and the upper electrode 78. Therefore, when the upper electrode is formed by etching the conductive layer 78, the Ru film 76 is etched. Functions as a stock. Therefore, according to the present embodiment, it is possible to prevent the free layer 74 from being damaged when the conductive layer 78 is etched. In addition, since the conductive layer 78 is etched using the Ru film 76 as an etch stopper, the patterning of the conductive layer 78 can be performed uniformly in the wafer surface. Therefore, according to the present embodiment, the magnetic resistance element can be formed with a high yield.
  • the free layer 74 and the like are patterned using the upper electrode 78 as a mask, it is not necessary to form the photoresist film 86 very thickly. Since it is not necessary to form the photoresist film 86 very thickly, the photoresist film 86 can be finely patterned. Therefore, according to the present embodiment, the magnetoresistive element can be formed finely. Further, according to the present embodiment, as will be described later, since the Ru film 76 functions as an etching stopper, it is not necessary to detect the etching end point using a plasma spectroscopic analyzer or the like. Therefore, according to the present embodiment, the conductive layer 78 can be patterned easily and reliably.
  • the Ru film 76 formed between the free layer 74 and the upper electrode 78 is formed by the constituent atoms of the free layer 76 in the heat treatment when aligning the spin direction in the fixed layer 66. It also functions as a diffusion prevention film (barrier film) that prevents mutual diffusion between the upper electrode 78 and the constituent atoms of the upper electrode 78. Therefore, according to the present embodiment, the Ru film 76 can prevent the atoms constituting the upper electrode 78 and the atoms constituting the free layer 76 from interdiffusion.
  • a magnetic memory device having a fine magnetoresistive element can be manufactured at a high yield.
  • the AES method is a method for identifying and quantifying elements on the surface of a sample by irradiating a solid surface with an electron beam and measuring the electron energy distribution emitted by the Auge transition.
  • the analysis was performed while sputtering the surface of the laminated film.
  • the horizontal axis indicates the sputtering time, and the vertical axis indicates the atomic concentration.
  • FIG. 7 shows the case of the present embodiment, that is, the case where the Ta film is formed on the NiFe film via the Ru film.
  • the thickness of the NiFe film was 10 nm.
  • the film thickness of the Ru film was lnm.
  • the thickness of the Ta film was 30 nm.
  • the dotted line in Fig. 7 shows the case of analysis by AES method without heat treatment.
  • the solid line in Fig. 7 shows the case of analysis by AES method after heat treatment at 330 ° C for 30 minutes.
  • FIG. 8 shows the case of the comparative example, that is, the case where the Ta film without forming the Ru film is directly formed on the NiFe film.
  • the thickness of the NiFe film was 10 nm.
  • the thickness of the Ta film was 30 nm.
  • the dotted line in Fig. 8 shows the case of analysis by AES method without heat treatment.
  • the solid line in Fig. 8 shows the case of analysis by AES after heat treatment at 330 ° C for 30 minutes.
  • the laminated film is obtained by performing heat treatment.
  • the Ta concentration in the vicinity of the surface becomes lower.
  • the Ni concentration in the vicinity of the surface of the laminated film is increased by performing the heat treatment. From these, it can be seen that in the case of the comparative example, the atoms constituting the NiFe film and the atoms constituting the Ta film are mutually diffused by heat treatment.
  • the atoms constituting the free layer 76 and the atoms constituting the upper electrode 78 are mutually diffused in the heat treatment for aligning the spin direction in the fixed layer 66. It can be seen that the Ru film 76 can prevent this.
  • FIG. 9 is a graph showing a magnetization curve (Magnetization Curve) measured by a sample vibration magnetometer (VSM).
  • VSM sample vibration magnetometer
  • the horizontal axis indicates the external magnetic field
  • the vertical axis indicates the magnetic field.
  • the thin solid line shows the case of the comparative example, that is, the case where the Ta film is formed directly on the NiFe film without forming the Ru film.
  • the thick solid line shows the case of the present embodiment, that is, the case where the Ta film is formed on the NiFe film via the Ru film.
  • the saturation magnetization is increased by about 15% compared to the comparative example.
  • a magnetoresistive element having good characteristics can be formed.
  • such good characteristics can be obtained because the atoms constituting the free layer 76 and the atoms constituting the free layer 76 are subjected to heat treatment when aligning the spin direction in the fixed layer 66. This is because the Ru film 76 can prevent the atoms constituting the upper electrode 78 from interdiffusion.
  • the case where the antiferromagnetic layer 58, the fixed layer 66, the tunnel insulating film 68, and the free layer 74 are sequentially stacked on the lower electrode 54 has been described as an example.
  • the laminated structure of 52 is not limited to this.
  • the free layer 74, the tunnel insulating film 68, the fixed layer 66, and the antiferromagnetic layer 58 may be sequentially stacked on the lower electrode 54.
  • a Ru film 76 may be formed between the antiferromagnetic layer 58 and the upper electrode 78.
  • the case where the upper electrode 78 remains on the Ru film 76 has been described as an example. However, after patterning the free layer 74 and the like, the upper electrode 78 is polished and removed. May be. In this case, the bit line 84 also serves as the upper electrode of the magnetoresistive element 52. In this case, it is preferable that the Ru film 76 be formed thick so that when the upper electrode 78 is removed by polishing, even the Ru film 76 is removed and the free layer 74 is not damaged.
  • the Ru film 76 and the mixed gas of CO gas and NH gas are used.
  • the etching gas used for etching the Ru film 76 and the free layer 74 and the like is not limited thereto.
  • the etching gas use methanol gas as the etching gas. Even when methanol gas is used, it is possible to etch the Ru film 76, the free layer 74, and the like with a high selectivity.
  • the material of the free layer 74 is not limited to the CoFe film or the NiFe film.
  • Any magnetic material that can be etched at a high selectivity with respect to the upper electrode 78 can be used as the material of the free layer 74 as appropriate.
  • a magnetic material containing at least one of Co (cobalt), Fe (iron), and Ni (nickel) can be used as the material of the free layer 74.
  • the material of the fixed layer 66 is not limited to the CoFe film or the like. Any magnetic material that can be etched at a high selectivity with respect to the upper electrode 78 is used as the material of the fixed layer 66. It can be used as appropriate. For example, a magnetic material containing at least one of Co, Fe, and Ni can be used as the material of the fixed layer 66.
  • the material of the antiferromagnetic layer 58 is not limited to the PtMn film. Any antiferromagnetic material that can be etched at a high selectivity with respect to the upper electrode 78 can be appropriately used as the material of the antiferromagnetic layer 58.
  • an IrMn (Ir: iridium, Mn: manganese) film may be used as the material of the antiferromagnetic layer 58.
  • the material of the tunnel insulating film 68 is not limited to the alumina film. Any insulating material that can be etched with a high selectivity with respect to the upper electrode 78 can be used as the material of the tunnel insulating film 68 as appropriate.
  • MgO Mg: Magnesium
  • HfO Hf: Hafnium
  • HfAlO A1: Aluminum
  • TiO etc.
  • edge film 68 It can also be used as a material for the edge film 68.
  • the magnetic memory device and the manufacturing method thereof according to the present invention are useful for manufacturing a magnetic memory device having fine magnetoresistive elements with a high yield.

Abstract

A magnetic memory device is provided with a first magnetic layer (66) formed on a substrate (10); a tunnel insulating film (68) formed on the first magnetic layer (66); a second magnetic layer (74) formed on the tunnel insulating film (68); and a magnetic resistor element (52) having an electrode (78) formed on the second magnetic layer (74). Further, the magnetic memory device is provided with a ruthenium film (76) formed between the second magnetic layer (74) and the electrode (78). Since the ruthenium film is formed between the second magnetic layer and the electrode, the ruthenium film functions as an etching stopper at the time of forming the electrode by etching a conductive layer. The ruthenium film formed between the second magnetic layer and the electrode also functions as a diffusion preventing film for preventing mutual diffusion of atoms composing the second magnetic layer and atoms composing the electrode, in heat treatment for matching spinning directions in the first magnetic layer or the second magnetic layer. Therefore, the magnetic memory device having a fine magnetic resistor element can be manufactured at a high yield.

Description

明 細 書  Specification
磁気メモリ装置及びその製造方法  Magnetic memory device and manufacturing method thereof
技術分野  Technical field
[0001] 本発明は、磁気メモリ装置及びその製造方法に係り、特に、磁気抵抗素子を有する 磁気メモリ装置及びその製造方法に関する。  The present invention relates to a magnetic memory device and a manufacturing method thereof, and more particularly, to a magnetic memory device having a magnetoresistive element and a manufacturing method thereof.
背景技術  Background art
[0002] 近年、書き換え可能な不揮発性メモリとして、磁気抵抗素子をマトリクス状に配列し た磁気ランダムアクセスメモリ(以下、 MRAM : Magnetic Random Access Memoryとい う)が注目されている。 MRAMは、 2つの磁性層における磁化方向の組み合わせを 利用して情報を記憶し、これらの磁性層間の磁ィ匕方向が平行である場合と反平行で ある場合とにおける抵抗変化 (即ち、電流又は電圧の変化)を検知することによって 記憶情報の読み出しを行うものである。  In recent years, a magnetic random access memory (hereinafter referred to as MRAM: Magnetic Random Access Memory) in which magnetoresistive elements are arranged in a matrix is drawing attention as a rewritable nonvolatile memory. MRAM stores information using a combination of magnetization directions in two magnetic layers, and changes in resistance (i.e., current or current) when the magnetic directions between these magnetic layers are parallel and antiparallel. The stored information is read by detecting the voltage change).
[0003] MRAMを構成する磁気抵抗素子として、磁気トンネル接合(以下、 MTJ: Magnetic  As a magnetoresistive element constituting MRAM, a magnetic tunnel junction (hereinafter referred to as MTJ: Magnetic)
Tunnel Junctionという)素子が知られている。 MTJ素子は、 2つの強磁性層がトンネ ル絶縁膜を介して積層されたものであり、 2つの強磁性層の磁ィ匕方向の関係に基づ いてトンネル絶縁膜を介して流れるトンネル電流が変化する現象を利用したものであ る。即ち、 MTJ素子は、 2つの強磁性層の磁ィ匕方向が平行のときに低い素子抵抗( 低抵抗状態)を有し、反平行のときには高い素子抵抗 (高抵抗状態)を有する。この 2 つの状態をデータ" 0"及びデータ" 1"に関連付けることにより、記憶素子として用いる ことができる。  A device called Tunnel Junction is known. An MTJ element has two ferromagnetic layers stacked via a tunnel insulating film, and the tunnel current that flows through the tunnel insulating film is based on the relationship between the magnetic directions of the two ferromagnetic layers. It uses a changing phenomenon. That is, the MTJ element has a low element resistance (low resistance state) when the magnetic directions of the two ferromagnetic layers are parallel, and has a high element resistance (high resistance state) when the two ferromagnetic layers are antiparallel. By associating these two states with data “0” and data “1”, they can be used as a memory element.
[0004] 提案されている磁気メモリ装置の製造方法を図 10を用いて説明する。図 10は、提 案されている磁気メモリ装置の製造方法を示す工程断面図である。  A proposed method for manufacturing a magnetic memory device will be described with reference to FIG. FIG. 10 is a process cross-sectional view illustrating the proposed method of manufacturing a magnetic memory device.
[0005] まず、図 10 (a)に示すように、基板 110上に、導電層 154、反強磁性層 158、固定 層 166、トンネル絶縁膜 168、自由層 174及び導電層 178を順次形成する。こうして 、導電層 154、反強磁性層 158、固定層 166、トンネル絶縁膜 168、自由層 174及 び導電層 178より成る積層膜 179が形成される。導電層 154は MTJ素子 152の下部 電極となるものであり、導電層 176は MTJ素子 152の上部電極となるものである。 [0006] 次に、導電層 178上にフォトレジスト膜 186を形成する。この後、フォトリソグラフィ技 術を用い、フォトレジスト膜 186をパターユングする。 First, as shown in FIG. 10A, a conductive layer 154, an antiferromagnetic layer 158, a fixed layer 166, a tunnel insulating film 168, a free layer 174, and a conductive layer 178 are sequentially formed on a substrate 110. . Thus, a laminated film 179 including the conductive layer 154, the antiferromagnetic layer 158, the fixed layer 166, the tunnel insulating film 168, the free layer 174, and the conductive layer 178 is formed. The conductive layer 154 serves as the lower electrode of the MTJ element 152, and the conductive layer 176 serves as the upper electrode of the MTJ element 152. Next, a photoresist film 186 is formed on the conductive layer 178. Thereafter, the photoresist film 186 is patterned using photolithography technology.
[0007] 次に、図 10 (b)に示すように、アルゴンイオンミリングにより、フォトレジスト膜 186を マスクとして、導電層 154の表面が露出するまで積層膜 179をエッチングする。こうし て、 MTJ素子 (磁気抵抗素子) 152が形成される。 Next, as shown in FIG. 10B, the laminated film 179 is etched by argon ion milling using the photoresist film 186 as a mask until the surface of the conductive layer 154 is exposed. In this way, an MTJ element (magnetoresistance element) 152 is formed.
[0008] なお、本願発明の背景技術としては、以下のようなものがある。 [0008] Note that the background art of the present invention includes the following.
特許文献 1:特開平 11—92971号公報  Patent Document 1: Japanese Patent Laid-Open No. 11-92971
特許文献 2:特開 2002-76470号公報  Patent Document 2: JP 2002-76470 A
特許文献 3:特開 2003— 31776号公報  Patent Document 3: Japanese Patent Laid-Open No. 2003-31776
特許文献 4:特許第 2677321号  Patent Document 4: Japanese Patent No. 2677321
特許文献 5:特開 2000-322710号公報  Patent Document 5: JP 2000-322710 A
特許文献 6:特開 2002-38285号公報  Patent Document 6: Japanese Patent Laid-Open No. 2002-38285
非特許文献 1 :福本能之、沼田秀昭、末光克巳、永原聖万、大嶋則和、波田博光、 田原修一、天野実、浅尾吉昭、與田博明、「高耐熱 NiXFel-X/Al-oxide/Taフリー 層を用いた強磁性トンネル接合の磁化反転特性」、第 28回日本応用磁気学会学術 講演概要集、 2004年、 p. 218  Non-Patent Document 1: Noriyuki Fukumoto, Hideaki Numata, Katsumi Suemitsu, Seigo Nagahara, Norikazu Oshima, Hiromitsu Hata, Shuichi Tahara, Minoru Amano, Yoshiaki Asao, Hiroaki Kajita, `` High heat resistance NiXFel-X / Al-oxide / Magnetization reversal characteristics of ferromagnetic tunnel junctions using Ta-free layers ", 28th Annual Meeting of the Japan Society of Applied Magnetics, 2004, p. 218
非特許文献 2 : G. H. Yu, H. C. Zhao, M.H. Li, and F. W. Zhu, "Interface reaction of Ta/Ni81Fel9or Ni81Fel9/Ta and its suppression", Applied Physics Letters, Volume 80, Number 3, 21 January (2002), p. 455-457  Non-Patent Document 2: GH Yu, HC Zhao, MH Li, and FW Zhu, "Interface reaction of Ta / Ni81Fel9or Ni81Fel9 / Ta and its suppression", Applied Physics Letters, Volume 80, Number 3, 21 January (2002), p . 455-457
発明の開示  Disclosure of the invention
発明が解決しょうとする課題  Problems to be solved by the invention
[0009] し力しながら、イオンミリングにより積層膜 179をエッチングした場合には、積層膜 1 79の材料がエッチングされた積層膜 179の側面に再付着し、自由層 166と固定層 1 74とが短絡してしまう場合があった。側壁に再付着した材料を除去すベぐ斜めにィ オンを入射させる等の工夫もなされている力 この場合には、加工の均一性や素子 の高密度化を実現することが困難となる。また、イオンミリングにより積層膜 179をエツ チングする場合には、フォトレジスト膜 186に対する積層膜 179の選択比が必ずしも 十分に高くないため、フォトレジスト膜 186を非常に厚く形成せざるを得な力つた。フ オトレジスト膜 186を非常に厚く形成せざるを得ないことは、磁気抵抗素子の微細化 における阻害要因となっていた。また、イオンミリングにより積層膜 179をエッチングす る場合には、イオンの入射角によってスパッタ速度が異なる (スパッタ率の入射角依 存性)ため、ウェハ面に対して積層膜を垂直にエッチングすることが困難である。この ことも、磁気抵抗素子の微細化における阻害要因となっていた。 When the laminated film 179 is etched by ion milling with a force, the material of the laminated film 1 79 reattaches to the side surface of the etched laminated film 179, and the free layer 166 and the fixed layer 1 74 May be short-circuited. A force that has been devised to make the ions incident obliquely to remove the material reattached to the side wall. In this case, it becomes difficult to achieve uniform processing and high density of elements. In addition, when the laminated film 179 is etched by ion milling, the selectivity of the laminated film 179 with respect to the photoresist film 186 is not necessarily high enough, so that the photoresist film 186 must be formed very thick. I got it. F The fact that the photoresist film 186 has to be formed very thick has been an impediment to miniaturization of the magnetoresistive element. In addition, when the laminated film 179 is etched by ion milling, the sputtering speed varies depending on the incident angle of ions (depending on the incident angle of the sputtering rate), so the laminated film is etched perpendicular to the wafer surface. Is difficult. This has also been an impediment to miniaturization of magnetoresistive elements.
[0010] 本発明の目的は、微細な磁気抵抗素子を高い歩留りで形成し得る磁気メモリ装置 及びその製造方法を提供することにある。 An object of the present invention is to provide a magnetic memory device capable of forming fine magnetoresistive elements with a high yield, and a method for manufacturing the same.
課題を解決するための手段  Means for solving the problem
[0011] 本発明の一観点によれば、基板上に形成された第 1の磁性層と;前記第 1の磁性層 上に形成されたトンネル絶縁膜と;前記トンネル絶縁膜上に形成された第 2の磁性層 と;前記第 2の磁性層上に形成された電極を有する磁気抵抗素子を有する磁気メモリ 装置であって、前記第 2の磁性層と前記電極との間に形成されたルテニウム膜を更 に有する磁気メモリ装置が提供される。  [0011] According to one aspect of the present invention, a first magnetic layer formed on a substrate; a tunnel insulating film formed on the first magnetic layer; and formed on the tunnel insulating film A magnetic memory device having a second magnetic layer; and a magnetoresistive element having an electrode formed on the second magnetic layer, the ruthenium formed between the second magnetic layer and the electrode A magnetic memory device further comprising a film is provided.
[0012] また、本発明の他の観点によれば、基板上に第 1の磁性層を形成する工程と、前記 第 1の磁性層上にトンネル絶縁膜を形成する工程と、前記トンネル絶縁膜上に第 2の 磁性層を形成する工程と、前記第 2の磁性層上にルテニウム膜を形成する工程と、 前記ルテニウム膜上に導電層を形成する工程と、前記導電層上にフォトレジストマス クを形成する工程と、前記フォトレジストマスクを用い、前記ルテニウム膜をエッチング ストツバとして、前記導電層をエッチングすることにより、前記導電層より成る電極を形 成する工程と、前記電極をマスクとして、少なくとも前記ルテニウム膜及び前記第 2の 磁性層をエッチングする工程とを有する磁気メモリ装置の製造方法が提供される。 発明の効果  [0012] According to another aspect of the present invention, a step of forming a first magnetic layer on a substrate, a step of forming a tunnel insulating film on the first magnetic layer, and the tunnel insulating film A step of forming a second magnetic layer thereon, a step of forming a ruthenium film on the second magnetic layer, a step of forming a conductive layer on the ruthenium film, and a photoresist mass on the conductive layer. Using the photoresist mask, using the ruthenium film as an etching stopper, etching the conductive layer to form an electrode made of the conductive layer, and using the electrode as a mask, There is provided a method of manufacturing a magnetic memory device including a step of etching at least the ruthenium film and the second magnetic layer. The invention's effect
[0013] 本発明によれば、第 2の磁性層と電極との間にルテニウム膜を形成するため、導電 層をエッチングして電極を形成する際に、ルテニウム膜がエッチングストッパとして機 能する。このため、本発明によれば、導電層をエッチングする際に第 2の自由層ダメ ージを受けるのを防止することができる。し力も、ルテニウム膜をエッチングストツバと して導電層をエッチングするため、導電層に対するパターユングをウェハ面内におい て均一に行うことができる。従って、本発明によれば、磁気抵抗素子を高い歩留りで 形成することができる。 According to the present invention, since the ruthenium film is formed between the second magnetic layer and the electrode, the ruthenium film functions as an etching stopper when the electrode is formed by etching the conductive layer. Therefore, according to the present invention, it is possible to prevent receiving the second free layer damage when etching the conductive layer. Also, since the conductive layer is etched using the ruthenium film as an etching stopper, the patterning of the conductive layer can be performed uniformly in the wafer surface. Therefore, according to the present invention, the magnetoresistive element can be manufactured at a high yield. Can be formed.
[0014] また、本発明によれば、電極をマスクとして第 2の磁性層等をパターユングするため 、フォトレジスト膜を非常に厚く形成しておく必要がない。フォトレジスト膜を非常に厚 く形成する必要がないため、フォトレジスト膜を微細にパターユングすることができる。 従って、本発明によれば、磁気抵抗素子を微細に形成することができる。  Further, according to the present invention, since the second magnetic layer and the like are patterned using the electrode as a mask, it is not necessary to form a very thick photoresist film. Since it is not necessary to form a very thick photoresist film, the photoresist film can be finely patterned. Therefore, according to the present invention, the magnetoresistive element can be formed finely.
[0015] また、本発明によれば、ルテニウム膜がエッチングストツバとして機能するため、ブラ ズマ分光分析装置等を用いてエッチングの終点を検出することを要しない。このため 、本発明によれば、簡便かつ確実に導電層をパターユングすることができる。  [0015] According to the present invention, since the ruthenium film functions as an etching stopper, it is not necessary to detect the end point of etching using a plasma spectroscopic analyzer or the like. For this reason, according to the present invention, the conductive layer can be patterned easily and reliably.
[0016] また、本発明によれば、第 2の磁性層と電極との間に形成されたルテニウム膜は、 第 1の磁性層又は第 2の磁性層におけるスピン方向を揃える際の熱処理において、 第 2の磁性層を構成する原子と電極を構成する原子とが相互拡散するのを防止する 拡散防止膜 (バリア膜)としても機能する。このため、本発明によれば、電極を構成す る原子と第 1の磁性層を構成する原子とが相互拡散するのをルテニウム膜により防止 することができる。  Further, according to the present invention, the ruthenium film formed between the second magnetic layer and the electrode is subjected to heat treatment when aligning the spin direction in the first magnetic layer or the second magnetic layer. It also functions as a diffusion prevention film (barrier film) that prevents the atoms constituting the second magnetic layer and the atoms constituting the electrode from interdiffusion. Therefore, according to the present invention, the ruthenium film can prevent the atoms constituting the electrode and the atoms constituting the first magnetic layer from interdiffusion.
[0017] このように、本発明によれば、微細な磁気抵抗素子を有する磁気メモリ装置を高い 歩留りで製造することができる。  As described above, according to the present invention, a magnetic memory device having a minute magnetoresistive element can be manufactured with a high yield.
図面の簡単な説明  Brief Description of Drawings
[0018] [図 1]図 1は、本発明の一実施形態による磁気メモリ装置を示す断面図である。 FIG. 1 is a cross-sectional view showing a magnetic memory device according to an embodiment of the present invention.
[図 2]図 2は、本実施形態による磁気メモリ装置の製造方法を示す工程断面図(その FIG. 2 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 2).
1)である。 1).
[図 3]図 3は、本実施形態による磁気メモリ装置の製造方法を示す工程断面図(その FIG. 3 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 3).
2)である。 2).
[図 4]図 4は、本実施形態による磁気メモリ装置の製造方法を示す工程断面図(その FIG. 4 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 4).
3)である。 3).
[図 5]図 5は、本実施形態による磁気メモリ装置の製造方法を示す工程断面図(その FIG. 5 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 1).
4)である。 4).
[図 6]図 6は、本実施形態による磁気メモリ装置の製造方法を示す工程断面図(その FIG. 6 is a process sectional view showing the method for manufacturing the magnetic memory device according to the embodiment (part 6).
5)である。 [図 7]図 7は、オージュ電子分光分析法により得られた深さ方向の濃度プロファイルを 示すグラフ(その 1)である。 5). [FIG. 7] FIG. 7 is a graph (No. 1) showing a concentration profile in the depth direction obtained by Auger electron spectroscopy.
[図 8]図 8は、オージュ電子分光分析法により得られた深さ方向の濃度プロファイルを 示すグラフ(その 2)である。  [FIG. 8] FIG. 8 is a graph (part 2) showing the concentration profile in the depth direction obtained by the Auger electron spectroscopy.
[図 9]図 9は、試料振動型磁力計により測定した磁ィ匕曲線を示すグラフである。  FIG. 9 is a graph showing a magnetic field curve measured by a sample vibration type magnetometer.
[図 10]図 10は、提案されている磁気メモリ装置の製造方法を示す工程断面図である  FIG. 10 is a process sectional view showing the proposed method for manufacturing a magnetic memory device.
[図 11]図 11は、 RIE法により積層膜をエッチングする場合を示す工程断面図である。 符号の説明 FIG. 11 is a process cross-sectional view showing a case where a laminated film is etched by the RIE method. Explanation of symbols
10· · ·半導体基板 10 ··· Semiconductor substrate
12· · ·ゲート絶縁膜 12 ··· Gate insulation film
14…ゲート電極 (読み出しワード線) 14… Gate electrode (read word line)
16a、 16b…ソース Zドレイン領域 16a, 16b ... Source Z Drain region
18· "トランジスタ 18 · "Transistor
20…層間絶縁膜 20… Interlayer insulation film
22· · ·コンタクトホール 22 ··· Contact hole
24…導体プラグ 24… Conductor plug
26…層間絶縁膜 26… Interlayer insulation film
28a, 28b…溝 28a, 28b ... groove
30a…導電層 30a… Conductive layer
30b…グラウンド層 30b ... Ground layer
32…層間絶縁膜 32… Interlayer insulation film
34· · ·コンタクトホール 34 ··· Contact hole
36…導体プラグ 36… Conductor plug
38…層間絶縁膜 38… Interlayer insulation film
40a,墨…溝 40a, sumi… groove
41a…導電層 41a… Conductive layer
41b…書き込みワード線 42··•NiFe膜、クラッド層41b ... Write word line 42 ··· NiFe film, cladding layer
44·· •Cu膜 44 · • Cu film
46·· -層間絶縁膜 46 ··-Interlayer insulation film
48·· 'コンタクトホール48 ·· 'Contact hole
50·· -導体プラグ50 ··-Conductor plug
52·· -磁気抵抗素子52 · · · magnetoresistive element
54·· -導電層、下部電極54-Conductive layer, lower electrode
56·· •NiFe膜 • NiNi film
58·· -反強磁性層 58 ... Antiferromagnetic layer
60·· '強磁性層 60 ... 'Ferromagnetic layer
62·· -非磁性層  62 ...- Non-magnetic layer
64·· -強磁性層  64 ...- Ferromagnetic layer
66·· -固定層  66--Fixed layer
68·· 'トンネル絶縁膜 68 'Tunnel insulation film
70·· -強磁性層 70 ...- Ferromagnetic layer
72·· -強磁性層  72 ...-Ferromagnetic layer
74·· -自由層  74 ...-Free layer
76·· -ルテニウム膜 76 ... Ruthenium film
78·· -導電層、上部電極78--Conductive layer, upper electrode
80·· -層間絶縁膜80 ...-Interlayer insulation film
82·· 'コンタクトホール82 ·· 'Contact hole
84·· -ビット線 84-Bit line
86·· •フォトレジスト膜 86 ·· • Photoresist film
110 …基板 110… Board
152· '· 気 IS仇素子 152 · '· Qi IS
154· …導電層、下部電極154 ... Conductive layer, lower electrode
158· …反強磁性層158 ... Antiferromagnetic layer
166' …固定層 168…トンネル絶縁膜 166 '... fixed layer 168 ... Tunnel insulating film
174· ··自由層  174 ··· Free layer
178…導電層、上部電極  178… Conductive layer, upper electrode
179· ··積層膜  179 ··· Laminated film
186…フォトレジスト膜  186 ... Photoresist film
発明を実施するための最良の形態  BEST MODE FOR CARRYING OUT THE INVENTION
[0020] 上述したように、イオンミリングにより積層膜 179をエッチングした場合には、エッチ ングされた積層膜 179の材料が、積層膜 179の側面に再付着し、自由層 166と固定 層 174とが短絡してしまう場合があった。また、イオンミリングにより積層膜 179をエツ チングする場合には、フォトレジスト膜 186に対する積層膜 179の選択比が必ずしも 十分に高くないため、フォトレジスト膜 186を十分に厚く形成せざるを得な力つた。フ オトレジスト膜 186を十分に厚く形成せざるを得ないことは、磁気抵抗素子の微細化 における阻害要因となっていた。また、イオンミリングにより積層膜 179をエッチングす る場合には、イオンの入射角によってスパッタ速度が異なる (スパッタ率の入射角依 存性)ため、ウェハ面に対して積層膜を垂直にエッチングすることが困難である。この ことも、磁気抵抗素子の微細化における阻害要因となっていた。  As described above, when the laminated film 179 is etched by ion milling, the etched material of the laminated film 179 reattaches to the side surface of the laminated film 179, and the free layer 166 and the fixed layer 174 May be short-circuited. In addition, when the laminated film 179 is etched by ion milling, the selectivity of the laminated film 179 with respect to the photoresist film 186 is not necessarily high enough, so that it is necessary to form the photoresist film 186 sufficiently thick. I got it. The fact that the photoresist film 186 had to be formed sufficiently thick was an obstacle to miniaturization of the magnetoresistive element. In addition, when the laminated film 179 is etched by ion milling, the sputtering speed varies depending on the incident angle of ions (depending on the incident angle of the sputtering rate). Is difficult. This has also been an impediment to miniaturization of magnetoresistive elements.
[0021] ここで、 RIE (Reactive Ion Etching,反応性イオンエッチング)法を用いて積層膜を エッチングすることも考免られる。  [0021] Here, etching of the laminated film using the RIE (Reactive Ion Etching) method is also considered.
[0022] 図 11は、 RIE法により積層膜をエッチングする場合を示す工程断面図である。  FIG. 11 is a process cross-sectional view showing the case where the laminated film is etched by the RIE method.
[0023] まず、図 11 (a)に示すように、基板 110上に、導電層 154、反強磁性層 158、固定 層 166、トンネル絶縁膜 168、自由層 174及び導電層 178を順次形成する。こうして 、導電層 154、反強磁性層 158、固定層 166、トンネル絶縁膜 168、自由層 174及 び導電層 178より成る積層膜 179が形成される。導電層 154は磁気抵抗素子の下部 電極となるものであり、導電層 176は磁気抵抗素子の上部電極となるものである。  First, as shown in FIG. 11 (a), a conductive layer 154, an antiferromagnetic layer 158, a fixed layer 166, a tunnel insulating film 168, a free layer 174, and a conductive layer 178 are sequentially formed on a substrate 110. . Thus, a laminated film 179 including the conductive layer 154, the antiferromagnetic layer 158, the fixed layer 166, the tunnel insulating film 168, the free layer 174, and the conductive layer 178 is formed. The conductive layer 154 serves as the lower electrode of the magnetoresistive element, and the conductive layer 176 serves as the upper electrode of the magnetoresistive element.
[0024] 次に、導電層 178上にフォトレジスト膜 186を形成する。この後、フォトリソグラフィ技 術を用い、フォトレジスト膜 186をパターユングする。  Next, a photoresist film 186 is formed on the conductive layer 178. Thereafter, the photoresist film 186 is patterned using photolithography technology.
[0025] 次に、図 11 (b)に示すように、 RIE法により、フォトレジスト膜 186をマスクとして、導 電層 178をエッチングする。エッチングガスとしては、例えばハロゲン系ガスを用いる oこうして、導電層 178より成る上部電極が形成される。 Next, as shown in FIG. 11B, the conductive layer 178 is etched by the RIE method using the photoresist film 186 as a mask. As the etching gas, for example, a halogen-based gas is used. o In this way, an upper electrode made of the conductive layer 178 is formed.
[0026] 次に、図 11 (c)に示すように、上部電極 178をハードマスクとし、導電層 154をエツ チンダストッパとして、 RIE法により、 自由層 174、トンネル絶縁膜 168、固定層 166、 反強磁性層 158を異方性エッチングする。エッチングガスとしては、例えば COガスと NHガスとの混合ガスを用いる。エッチングの終点は、例えばプラズマ分光分析装置Next, as shown in FIG. 11 (c), the free layer 174, the tunnel insulating film 168, the fixed layer 166, by the RIE method using the upper electrode 178 as a hard mask and the conductive layer 154 as an etch stopper. The antiferromagnetic layer 158 is anisotropically etched. For example, a mixed gas of CO gas and NH gas is used as the etching gas. The end point of etching is, for example, a plasma spectrometer
3 Three
を用いて検出する。  To detect.
[0027] RIE法を用いて積層膜 179をエッチングした場合にも、エッチングされた積層膜 17 9の材料は、積層膜 179の側壁に再付着するが、積層膜 179の側壁に再付着した付 着物は、以下のようにして除去される。即ち、 COガスと NHガスとの混合ガスを用い  [0027] Even when the laminated film 179 is etched using the RIE method, the material of the etched laminated film 179 reattaches to the sidewall of the laminated film 179, but does not adhere to the sidewall of the laminated film 179. The kimono is removed as follows. That is, using a mixed gas of CO gas and NH gas
3  Three
て積層膜 179を異方性エッチングすると、基板面に対してほぼ垂直な方向に積層膜 179がエッチングされ、エッチングストッパとして機能する下部電極 154が露出する。 積層膜 179がエッチングされて下部電極 154が露出した後には、付着物の原料とな る積層膜 179がエッチングされなくなるため、積層膜 179の材料が積層膜 179の側 壁に再付着することがなくなる。積層膜 179の側壁に付着していた付着物は、徐々に エッチング除去されていく。このように、 RIE法を用いて積層膜 179をエッチングすれ ば、 自由層 174と固定層 166とが短絡するのを防止することが可能となる。また、上 部電極 178をノヽードマスクとして自由層 174等をエッチングするため、フォトレジスト 膜 186を非常に厚く形成しておくことを要しない。また、 RIE法を用いて積層膜 179を エッチングする場合には、ウェハ面に対してほぼ垂直に積層膜 179をエッチングする ことが可能である。従って、 RIE法を用いてエッチングすれば、磁気抵抗素子 152の 微細化を図ることが可能となる。  When the laminated film 179 is anisotropically etched, the laminated film 179 is etched in a direction substantially perpendicular to the substrate surface, and the lower electrode 154 functioning as an etching stopper is exposed. After the laminated film 179 is etched and the lower electrode 154 is exposed, the laminated film 179 that is a raw material of the deposit is not etched, so that the material of the laminated film 179 may be reattached to the side wall of the laminated film 179. Disappear. Deposits adhering to the side walls of the laminated film 179 are gradually removed by etching. In this manner, if the laminated film 179 is etched using the RIE method, it is possible to prevent the free layer 174 and the fixed layer 166 from being short-circuited. Further, since the free layer 174 and the like are etched using the upper electrode 178 as a node mask, it is not necessary to form the photoresist film 186 very thick. Further, when the laminated film 179 is etched using the RIE method, the laminated film 179 can be etched almost perpendicularly to the wafer surface. Therefore, if the etching is performed using the RIE method, the magnetoresistive element 152 can be miniaturized.
[0028] しかしながら、 RIE法を用いて導電層 178をエッチングする際にはハロゲン系ガス が用いられるため、エッチングの際に生成されるハロゲン化物力 上部電極 178の側 壁や自由層 174の表面に付着してしまう場合がある。上部電極 178の側壁や自由層 174の表面にハロゲンィ匕物が付着すると、付着したハロゲンィ匕物が配線の材料と反 応して、配線の腐蝕 (アフターコロージヨン)が生じる場合がある。このため、必ずしも 十分に高い歩留りで磁気抵抗素子を形成することは困難である。  [0028] However, since a halogen-based gas is used when etching the conductive layer 178 using the RIE method, the halide force generated during the etching is applied to the side wall of the upper electrode 178 and the surface of the free layer 174. It may adhere. If halogenated substances adhere to the side walls of the upper electrode 178 or the surface of the free layer 174, the adhered halogenated substances may react with the wiring material, resulting in corrosion of the wiring (after-corrosion). For this reason, it is difficult to form a magnetoresistive element with a sufficiently high yield.
[0029] また、導電層 178をエッチングして上部電極を形成する際には、プラズマ分光分析 装置を用いてエッチングの終点を検出する力 自由層 174の表面が露出した段階で エッチングを正確に停止させるのは必ずしも容易ではない。自由層 174がハロゲン 系ガスに曝されると、自由層 174がダメージを受け、良好な特性を有する磁気抵抗素 子を得ることが困難となる。 In addition, when the conductive layer 178 is etched to form the upper electrode, plasma spectroscopic analysis is performed. Force to detect the end point of etching using an apparatus It is not always easy to stop etching accurately when the surface of the free layer 174 is exposed. When the free layer 174 is exposed to a halogen-based gas, the free layer 174 is damaged, making it difficult to obtain a magnetoresistive element having good characteristics.
[0030] また、エッチング速度は必ずしもウェハ面内において均一ではないため、導電層 17 8に対するパターユングをウェハ面内において均一に行うのは必ずしも容易ではない [0030] Further, since the etching rate is not necessarily uniform within the wafer surface, it is not always easy to pattern the conductive layer 178 uniformly within the wafer surface.
[0031] 本願発明者らは鋭意検討した結果、自由層と導電層(上部電極)との間にルテユウ ム膜を形成することに想到した。 [0031] As a result of intensive studies, the inventors of the present application have come up with the idea of forming a ruthenium film between the free layer and the conductive layer (upper electrode).
[0032] 本願発明によれば、自由層と導電層(上部電極)との間にルテニウム膜を形成する ため、導電層をエッチングして上部電極を形成する際に、ルテニウム膜をエッチング ストッパとして導電層をエッチングすることが可能となる。このため、導電層をエツチン グする際に用いられるハロゲン系のガスに自由層が曝されてダメージを受けるのを、 ルテニウム膜により防止することが可能である。また、導電層をエッチングして上部電 極を形成する際にルテニウム膜がエッチングストツバとして機能するため、導電層を 均一にパター-ングすることができる。従って、本実施形態によれば、微細な磁気抵 抗素子を有する磁気メモリ装置を高い歩留りで製造することが可能となる。  According to the present invention, since the ruthenium film is formed between the free layer and the conductive layer (upper electrode), when the upper electrode is formed by etching the conductive layer, the ruthenium film is used as an etching stopper. It becomes possible to etch the layer. Therefore, the ruthenium film can prevent the free layer from being damaged by being exposed to the halogen-based gas used when etching the conductive layer. In addition, since the ruthenium film functions as an etching stopper when the conductive layer is etched to form the upper electrode, the conductive layer can be patterned uniformly. Therefore, according to the present embodiment, a magnetic memory device having a fine magnetic resistance element can be manufactured with a high yield.
[0033] また、本願発明によれば、自由層と導電層(上部電極)との間に形成されたルテニ ゥム膜は、磁場を印カロしながら熱処理を行って固定層におけるスピン方向を揃える際 に、自由層を構成する原子と上部電極を構成する原子とが相互拡散するのを防止す る拡散防止膜 (バリア膜)としても機能する。このため、本願発明によれば、より特性の 良好な磁気抵抗素子を有する磁気メモリ装置を提供することが可能となる。  [0033] According to the present invention, the ruthenium film formed between the free layer and the conductive layer (upper electrode) is heat-treated while applying a magnetic field to align the spin direction in the fixed layer. At this time, it also functions as a diffusion prevention film (barrier film) that prevents the atoms constituting the free layer and the atoms constituting the upper electrode from interdiffusion. Therefore, according to the present invention, it is possible to provide a magnetic memory device having a magnetoresistive element with better characteristics.
[0034] [一実施形態]  [0034] [One Embodiment]
本発明の一実施形態による磁気メモリ装置及びその製造方法を図 1乃至図 9を用 いて説明する。  A magnetic memory device and a manufacturing method thereof according to an embodiment of the present invention will be described with reference to FIGS.
[0035] (磁気メモリ装置)  [0035] (Magnetic memory device)
まず、本実施形態による磁気メモリ装置について図 1を用いて説明する。図 1は、本 実施形態による磁気メモリ装置を示す断面図である。図 1 (a)は、本実施形態による 磁気メモリ装置の構成を示す断面図である。図 1 (b)は、本実施形態による磁気メモリ 装置の一部を示す断面図である。 First, the magnetic memory device according to the present embodiment will be explained with reference to FIG. FIG. 1 is a sectional view of the magnetic memory device according to the present embodiment. Figure 1 (a) is according to this embodiment. It is sectional drawing which shows the structure of a magnetic memory device. FIG. 1B is a cross-sectional view showing a part of the magnetic memory device according to the present embodiment.
[0036] 図 1に示すように、半導体基板 10上には、ゲート絶縁膜 12を介してゲート電極 (読 み出しワード線) 14が形成されている。半導体基板 10としては、例えばシリコン基板 が用いられている。 As shown in FIG. 1, a gate electrode (read word line) 14 is formed on a semiconductor substrate 10 via a gate insulating film 12. As the semiconductor substrate 10, for example, a silicon substrate is used.
[0037] ゲート電極 14の両側の半導体基板 10内には、ソース Zドレイン領域 16a、 16bが 形成されている。こうして、ゲート電極 14とソース/ドレイン領域 16a、 16bとを有する トランジスタ 18が構成されている。  In the semiconductor substrate 10 on both sides of the gate electrode 14, source Z drain regions 16a and 16b are formed. Thus, the transistor 18 having the gate electrode 14 and the source / drain regions 16a and 16b is formed.
[0038] トランジスタ 18が形成された半導体基板 10上には、層間絶縁膜 20が形成されてい る。層間絶縁膜 20には、ソース Zドレイン領域 16a、 16bに達するコンタクトホール 22 が形成されている。コンタクトホール 22内には、導体プラグ 24が埋め込まれている。  An interlayer insulating film 20 is formed on the semiconductor substrate 10 on which the transistor 18 is formed. In the interlayer insulating film 20, contact holes 22 reaching the source Z drain regions 16a and 16b are formed. A conductor plug 24 is embedded in the contact hole 22.
[0039] 導体プラグ 24が埋め込まれた層間絶縁膜 20上には、層間絶縁膜 26が形成されて いる。層間絶縁膜 26には、溝 28a、 28bが形成されている。溝 28aは、導電層 28aを 埋め込むためのものである。溝 28bは、配線 30bを埋め込むためのものである。溝 28 a、 28b内には、導体プラグ 24の上面が露出している。  An interlayer insulating film 26 is formed on the interlayer insulating film 20 in which the conductor plugs 24 are embedded. In the interlayer insulating film 26, grooves 28a and 28b are formed. The groove 28a is for embedding the conductive layer 28a. The groove 28b is for embedding the wiring 30b. The upper surface of the conductor plug 24 is exposed in the grooves 28a and 28b.
[0040] 溝 28a内には、導電層 30aが埋め込まれている。導電層 30aは、導体プラグ 24に 接続されている。溝 28b内には、配線 (グラウンド線) 30bが埋め込まれている。配線 3 Obは、グラウンド線として機能するものである。グラウンド線 30bは、導体プラグ 24を 介してトランジスタ 18のソース/ドレイン領域 16bに電気的に接続されて!、る。  [0040] A conductive layer 30a is embedded in the groove 28a. The conductive layer 30a is connected to the conductor plug 24. A wiring (ground line) 30b is embedded in the groove 28b. Wiring 3 Ob functions as a ground line. The ground line 30b is electrically connected to the source / drain region 16b of the transistor 18 through the conductor plug 24 !.
[0041] 導電層 30a及び配線 30bが埋め込まれた層間絶縁膜 26上には、層間絶縁膜 32が 形成されている。層間絶縁膜 32には、導電層 30aに達するコンタクトホール 34が形 成されている。コンタクトホール 34内には、導体プラグ 36が埋め込まれている。導体 プラグ 36は、導電層 30aに接続されている。  An interlayer insulating film 32 is formed on the interlayer insulating film 26 in which the conductive layer 30a and the wiring 30b are embedded. A contact hole 34 reaching the conductive layer 30a is formed in the interlayer insulating film 32. A conductor plug 36 is embedded in the contact hole 34. The conductor plug 36 is connected to the conductive layer 30a.
[0042] 導体プラグ 36が埋め込まれた層間絶縁膜 32上には、層間絶縁膜 38が形成されて いる。層間絶縁膜 38には、溝 40a、 40bが形成されている。溝 40a内には、導体ブラ グ 36の上面が露出して!/ヽる。  An interlayer insulating film 38 is formed on the interlayer insulating film 32 in which the conductor plugs 36 are embedded. Grooves 40 a and 40 b are formed in the interlayer insulating film 38. In the groove 40a, the upper surface of the conductor plug 36 is exposed!
[0043] 溝 40a内には、導電層 41aが埋め込まれている。導電層 41aは、導体プラグ 36に 接続されている。溝 40b内には、配線 (書き込みワード線) 41bが埋め込まれている。 [0044] 導電層 41a及び書き込みワード線 41bは、 Ta (タンタル)膜(図示せず)と NiFe膜 4 2と Cu (銅)膜 44とから成る積層膜によりそれぞれ構成されている。なお、 Ta膜は、バ リアメタル膜として機能するものである。 NiFe膜 42は、書き込みを行う際に強い磁場 を得るためのクラッド層として機能するものである。 [0043] A conductive layer 41a is embedded in the groove 40a. The conductive layer 41a is connected to the conductor plug 36. A wiring (write word line) 41b is embedded in the groove 40b. The conductive layer 41 a and the write word line 41 b are each composed of a laminated film composed of a Ta (tantalum) film (not shown), a NiFe film 42, and a Cu (copper) film 44. The Ta film functions as a barrier metal film. The NiFe film 42 functions as a cladding layer for obtaining a strong magnetic field when writing.
[0045] 導電層 41a及び書き込みワード線 41bが埋め込まれた層間絶縁膜 38上には、膜 厚 lOOnmの層間絶縁膜 46が形成されている。  An interlayer insulating film 46 having a film thickness of lOOnm is formed on the interlayer insulating film 38 in which the conductive layer 41a and the write word line 41b are embedded.
[0046] 層間絶縁膜 46には、導電層 41aに達するコンタクトホール 48が形成されている。コ ンタクトホール 48内には、導体プラグ 50が埋め込まれている。導体プラグ 50は、導 電層 41aに電気的に接続されている。  In the interlayer insulating film 46, a contact hole 48 reaching the conductive layer 41a is formed. A conductor plug 50 is embedded in the contact hole 48. The conductor plug 50 is electrically connected to the conductive layer 41a.
[0047] 導体プラグ 50が埋め込まれた層間絶縁膜 46上には、磁気抵抗素子 52の下部電 極 54が形成されている。下部電極 54の材料としては、例えば Ta膜が用いられている 。下部電極 54は、導体プラグ 50、導電層 41a、導体プラグ 36、導電層 30a及び導体 プラグ 24を介して、トランジスタ 18のソース/ドレイン領域 16aに電気的に接続され ている。  A lower electrode 54 of the magnetoresistive element 52 is formed on the interlayer insulating film 46 in which the conductor plug 50 is embedded. As a material of the lower electrode 54, for example, a Ta film is used. The lower electrode 54 is electrically connected to the source / drain region 16a of the transistor 18 through the conductor plug 50, the conductive layer 41a, the conductor plug 36, the conductive layer 30a, and the conductor plug 24.
[0048] 下部電極 54上には、 NiFe膜 56が形成されている。 NiFe膜 56は、結晶性の良好 な反強磁性層 58を上方に形成するためのものである。  A NiFe film 56 is formed on the lower electrode 54. The NiFe film 56 is for forming an antiferromagnetic layer 58 with good crystallinity on the upper side.
[0049] NiFe膜 56上には、 PtMn膜より成る反強磁性層 58が形成されている。  [0049] On the NiFe film 56, an antiferromagnetic layer 58 made of a PtMn film is formed.
[0050] 反強磁性層 58上には、 CoFe膜より成る強磁性層 60が形成されている。強磁性層 60上には、 Ru膜より成る非磁性層 62が形成されている。非磁性層 62上には、 CoF e膜より成る強磁性層 64が形成されて 、る。強磁性層 60と非磁性層 62と強磁性層 6 4とにより、磁気抵抗素子 52の固定層(第 1の磁性層) 66が構成されている。  [0050] On the antiferromagnetic layer 58, a ferromagnetic layer 60 made of a CoFe film is formed. On the ferromagnetic layer 60, a nonmagnetic layer 62 made of a Ru film is formed. A ferromagnetic layer 64 made of a CoFe film is formed on the nonmagnetic layer 62. The ferromagnetic layer 60, the nonmagnetic layer 62, and the ferromagnetic layer 64 constitute a fixed layer (first magnetic layer) 66 of the magnetoresistive element 52.
[0051] 固定層 66上には、アルミナ (AIO )膜より成るトンネル絶縁膜 68が形成されている  [0051] On the fixed layer 66, a tunnel insulating film 68 made of an alumina (AIO) film is formed.
X  X
[0052] トンネル絶縁膜 68上には、 C。Fe膜より成る強磁性層 70が形成されている。強磁性 層 70上には、 NiFe膜より成る強磁性層 72が形成されている。強磁性層 70と強磁性 層 72とにより、磁気抵抗素子 52の自由層(第 2の磁性層) 74が構成されている。 [0052] C on the tunnel insulating film 68; A ferromagnetic layer 70 made of an Fe film is formed. On the ferromagnetic layer 70, a ferromagnetic layer 72 made of a NiFe film is formed. The ferromagnetic layer 70 and the ferromagnetic layer 72 constitute a free layer (second magnetic layer) 74 of the magnetoresistive element 52.
[0053] 自由層 74上には、 Ru (ルテニウム)膜 76が形成されている。 Ru膜 76は、後述する ように、エッチングストッパ膜として機能するものである。また、 Ru膜 76は、後述するよ うに、拡散防止膜 (バリア膜)としても機能するものである。 A Ru (ruthenium) film 76 is formed on the free layer 74. As will be described later, the Ru film 76 functions as an etching stopper film. The Ru film 76 will be described later. In other words, it also functions as a diffusion preventing film (barrier film).
[0054] Ru膜 76上には、上部電極(キャップ層) 78が形成されている。上部電極 78の材料 としては、例えば Ta膜が用いられている。上部電極 78は、自由層 76等をエッチング する際にハードマスクとしても機能するものである。  An upper electrode (cap layer) 78 is formed on the Ru film 76. As a material of the upper electrode 78, for example, a Ta film is used. The upper electrode 78 also functions as a hard mask when the free layer 76 and the like are etched.
[0055] こうして、下部電極 54、反強磁性層 58、固定層 66、トンネル絶縁膜 68、自由層 74 、 Ru膜 76及び上部電極 78より成る磁気抵抗素子 (MTJ素子) 52が構成されている  Thus, a magnetoresistive element (MTJ element) 52 including the lower electrode 54, the antiferromagnetic layer 58, the fixed layer 66, the tunnel insulating film 68, the free layer 74, the Ru film 76, and the upper electrode 78 is formed.
[0056] 磁気抵抗素子 52が形成された層間絶縁膜 46上には、層間絶縁膜 80が形成され ている。 An interlayer insulating film 80 is formed on the interlayer insulating film 46 on which the magnetoresistive element 52 is formed.
[0057] 層間絶縁膜 80には、上部電極 78に達するコンタクトホール 82が形成されている。  A contact hole 82 reaching the upper electrode 78 is formed in the interlayer insulating film 80.
コンタクトホール 82内及び層間絶縁膜 80上には、ビット線 84が形成されている。ビッ ト線 84は、磁気抵抗素子 52の上部電極 78に接続されている。  A bit line 84 is formed in the contact hole 82 and on the interlayer insulating film 80. The bit line 84 is connected to the upper electrode 78 of the magnetoresistive element 52.
[0058] こうして本実施形態による磁気メモリ装置が構成されて 、る。  Thus, the magnetic memory device according to the present embodiment is constituted.
[0059] 本実施形態による磁気メモリ装置は、自由層 74と上部電極 78との間に Ru膜 76が 形成されて ヽることに主な特徴がある。  The magnetic memory device according to the present embodiment is mainly characterized in that a Ru film 76 is formed between the free layer 74 and the upper electrode 78.
[0060] 本実施形態によれば、自由層 74と上部電極 78との間に Ru膜 76が形成されている ため、後述するように、導電層 78をエッチングして上部電極を形成する際には、 Ru 膜 76がエッチングストツバとして機能する。このため、本実施形態によれば、導電層 7 8をエッチングする際に自由層 74がダメージを受けるのを防止することができる。しか も、 Ru膜 76をエッチングストッパとして導電層 78をエッチングするため、導電層 78に 対するパターユングをウェハ面内において均一に行うことができる。従って、本実施 形態によれば、磁気抵抗素子を高い歩留りで形成することができる。  [0060] According to the present embodiment, since the Ru film 76 is formed between the free layer 74 and the upper electrode 78, the conductive layer 78 is etched to form the upper electrode, as will be described later. In this case, the Ru film 76 functions as an etching stopper. Therefore, according to the present embodiment, it is possible to prevent the free layer 74 from being damaged when the conductive layer 78 is etched. However, since the conductive layer 78 is etched using the Ru film 76 as an etching stopper, the patterning of the conductive layer 78 can be performed uniformly in the wafer surface. Therefore, according to the present embodiment, the magnetoresistive element can be formed with a high yield.
[0061] また、本実施形態によれば、上部電極 78をマスクとして自由層 74等をパターユング するため、フォトレジスト膜 86を非常に厚く形成しておく必要がない。フォトレジスト膜 86を非常に厚く形成する必要がないため、フォトレジスト膜 86を微細にパターユング することができる。従って、本実施形態によれば、磁気抵抗素子を微細に形成するこ とが可能となる。  Further, according to the present embodiment, since the free layer 74 and the like are patterned using the upper electrode 78 as a mask, it is not necessary to form the photoresist film 86 very thickly. Since it is not necessary to form the photoresist film 86 very thickly, the photoresist film 86 can be finely patterned. Therefore, according to the present embodiment, the magnetoresistive element can be formed finely.
[0062] また、本実施形態によれば、後述するように、 Ru膜 76がエッチングストッパとして機 能するため、プラズマ分光分析装置等を用いてエッチングの終点を検出することを要 しない。このため、本実施形態によれば、簡便かつ確実に導電層 78をパターユング することができる。 Further, according to the present embodiment, as will be described later, the Ru film 76 serves as an etching stopper. Therefore, it is not necessary to detect the end point of etching using a plasma spectroscopic analyzer or the like. Therefore, according to the present embodiment, the conductive layer 78 can be patterned easily and reliably.
[0063] また、本実施形態によれば、自由層 74と上部電極 78との間に形成された Ru膜 76 は、後述するように、固定層 66におけるスピン方向を揃える際の熱処理において、自 由層 76の構成原子と上部電極 78の構成原子との相互拡散を防止する拡散防止膜 ( ノリア膜)としても機能する。このため、本実施形態によれば、上部電極 78を構成す る原子と自由層 76を構成する原子とが相互拡散するのを Ru膜 76により防止すること ができる。  Further, according to the present embodiment, the Ru film 76 formed between the free layer 74 and the upper electrode 78 is self-treated in the heat treatment when aligning the spin direction in the fixed layer 66 as described later. It also functions as a diffusion prevention film (noria film) that prevents mutual diffusion between the constituent atoms of the base layer 76 and the constituent atoms of the upper electrode 78. For this reason, according to the present embodiment, the Ru film 76 can prevent the atoms constituting the upper electrode 78 and the atoms constituting the free layer 76 from interdiffusion.
[0064] このように、本実施形態によれば、微細な磁気抵抗素子を有する磁気メモリ装置を 高 、歩留りで製造することが可能となる。  As described above, according to this embodiment, a magnetic memory device having a minute magnetoresistive element can be manufactured at a high yield.
[0065] 次に、本実施形態による磁気メモリ装置の動作について図 1を用いて説明する。 Next, the operation of the magnetic memory device according to the present embodiment will be explained with reference to FIG.
[0066] 磁気抵抗素子 52にデータを書き込む際には、ビット線 84と書き込みワード線 41bと に、それぞれ電流を流す。層間絶縁膜 46の膜厚が例えば lOOnm程度、ビット線 84 及び書き込みワード線 41bに流す電流が例えば 1mA程度の場合、例えば 70— 80 ( Oe)程度の磁場が発生する。自由層 74のスピンを反転させるために必要な磁場は、 例えば 50 (Oe)程度である。こうして、磁気抵抗素子 52にデータを書き込みことが可 能である。 [0066] When data is written to the magnetoresistive element 52, currents are passed through the bit line 84 and the write word line 41b, respectively. When the thickness of the interlayer insulating film 46 is, for example, about lOOnm, and the current passed through the bit line 84 and the write word line 41b is, for example, about 1 mA, a magnetic field of, for example, about 70-80 (Oe) is generated. The magnetic field necessary to invert the spin of the free layer 74 is, for example, about 50 (Oe). Thus, data can be written to the magnetoresistive element 52.
[0067] 磁気抵抗素子 52に書き込まれたデータを読み出す場合には、読み出しワード線 1 4に電圧を印加し、トランジスタ 18をオンにした状態で、ビット線 84に電流を流す。磁 気抵抗素子 52に書き込まれたデータに応じてビット線 84に流れる電流が異なるため 、磁気抵抗素子 52に書き込まれたデータを読み出すことが可能である。  When reading data written in the magnetoresistive element 52, a voltage is applied to the read word line 14, and a current is passed through the bit line 84 with the transistor 18 turned on. Since the current flowing through the bit line 84 differs depending on the data written to the magnetoresistive element 52, the data written to the magnetoresistive element 52 can be read.
[0068] (磁気メモリ装置の製造方法)  [0068] (Method for Manufacturing Magnetic Memory Device)
次に、本実施形態による磁気メモリ装置の製造方法を図 2乃至図 6を用いて説明す る。図 2乃至図 6は、本実施形態による磁気メモリ装置の製造方法を示す工程断面図 である。  Next, the method for manufacturing the magnetic memory device according to the present embodiment will be explained with reference to FIGS. 2 to 6 are process cross-sectional views illustrating the method of manufacturing the magnetic memory device according to the present embodiment.
[0069] まず、図 2 (a)に示すように、半導体基板 10上に、ゲート電極 14とソース Zドレイン 領域 16a、 16bとを有するトランジスタ 18を形成する。半導体基板 10としては、例え ばシリコン基板を用いる。 First, as shown in FIG. 2A, a transistor 18 having a gate electrode 14 and source Z drain regions 16a and 16b is formed on a semiconductor substrate 10. For example, the semiconductor substrate 10 For example, a silicon substrate is used.
[0070] 次に、全面に、例えば CVD法により、膜厚 lOOOnmのシリコン酸ィ匕膜より成る層間 絶縁膜 20を形成する。  Next, an interlayer insulating film 20 made of a silicon oxide film having a thickness of lOOOnm is formed on the entire surface by, eg, CVD.
[0071] 次に、例えば CMP法により、層間絶縁膜 20の表面を平坦ィ匕する。 Next, the surface of the interlayer insulating film 20 is planarized by, eg, CMP.
[0072] 次に、フォトリソグラフィ技術を用い、ソース Zドレイン領域 16a、 16bに達するコンタ タトホール 22を層間絶縁膜 20に形成する。 Next, a contact hole 22 reaching the source Z drain regions 16a and 16b is formed in the interlayer insulating film 20 by using a photolithography technique.
[0073] 次に、全面に、例えばスパッタ法により、膜厚 30nmの Ti膜(図示せず)を形成する Next, a 30 nm-thickness Ti film (not shown) is formed on the entire surface by, eg, sputtering.
[0074] 次に、全面に、例えば CVD法により、膜厚 lOnmの TiN膜(図示せず)を形成するNext, a TiN film (not shown) having a thickness of lOnm is formed on the entire surface by, eg, CVD.
。こうして、 Ti膜及び TiN膜より成るバリアメタル膜 (図示せず)が形成される。 . Thus, a barrier metal film (not shown) made of a Ti film and a TiN film is formed.
[0075] 次に、全面に、例えば CVD法により、膜厚 300nmのタングステン膜を形成する。 Next, a 300 nm-thickness tungsten film is formed on the entire surface by, eg, CVD.
[0076] 次に、例えば CMP法により、層間絶縁膜 20の表面が露出するまでタングステン膜 及びバリアメタル膜を研磨する。こうして、タングステン膜等より成る導体プラグ 24がコ ンタクトホール 22内に埋め込まれる。 Next, the tungsten film and the barrier metal film are polished by, for example, a CMP method until the surface of the interlayer insulating film 20 is exposed. Thus, the conductor plug 24 made of a tungsten film or the like is embedded in the contact hole 22.
[0077] 次に、全面に、例えば CVD法により、膜厚 300nmのシリコン酸ィ匕膜より成る層間絶 縁膜 26を形成する。 Next, an interlayer insulating film 26 made of a silicon oxide film having a thickness of 300 nm is formed on the entire surface by, eg, CVD.
[0078] 次に、例えば CMP法により、層間絶縁膜 26の表面を平坦ィ匕する。 Next, the surface of the interlayer insulating film 26 is flattened by, eg, CMP.
[0079] 次に、フォトリソグラフィ技術を用い、層間絶縁膜 26に溝 28a、 28bを形成する。溝 2Next, trenches 28 a and 28 b are formed in the interlayer insulating film 26 by using a photolithography technique. Groove 2
8aは、導電層 30aを埋め込むためのものである。溝 28bは、グラウンド線 30bを埋め 込むためのものである。 8a is for embedding the conductive layer 30a. The groove 28b is for embedding the ground line 30b.
[0080] 次に、全面に、例えばスパッタ法により、シード層(図示せず)を形成する。 Next, a seed layer (not shown) is formed on the entire surface by, eg, sputtering.
[0081] 次に、全面に、例えば電気めつき法により、膜厚 600nmの Cu膜を形成する。 Next, a 600 nm-thickness Cu film is formed on the entire surface by, eg, electroplating.
[0082] 次に、例えば CMP法により、層間絶縁膜 26の表面が露出するまで Cu膜及びシー ド層を研磨する。こうして、溝 28a内に Cu膜等より成る導電層 30aが埋め込まれるとと もに、溝 28b内に Cu膜等より成るグラウンド線 30bが埋め込まれる。 Next, the Cu film and the seed layer are polished by, for example, a CMP method until the surface of the interlayer insulating film 26 is exposed. Thus, the conductive layer 30a made of a Cu film or the like is buried in the groove 28a, and the ground line 30b made of the Cu film or the like is buried in the groove 28b.
[0083] 次に、全面に、例えば CVD法により、膜厚 200nmのシリコン酸ィ匕膜より成る層間絶 縁膜 32を形成する。 Next, an interlayer insulating film 32 made of a silicon oxide film having a thickness of 200 nm is formed on the entire surface by, eg, CVD.
[0084] 次に、例えば CMP法により、層間絶縁膜 32の表面を平坦ィ匕する。 [0085] 次に、フォトリソグラフィ技術を用い、導電層 30aに達するコンタクトホール 34を層間 絶縁膜 32に形成する。 Next, the surface of the interlayer insulating film 32 is planarized by, eg, CMP. Next, a contact hole 34 reaching the conductive layer 30a is formed in the interlayer insulating film 32 by using a photolithography technique.
[0086] 次に、全面に、例えばスパッタ法により、膜厚 30nmの Ti膜(図示せず)を形成する  Next, a 30 nm-thickness Ti film (not shown) is formed on the entire surface by, eg, sputtering.
[0087] 次に、全面に、例えば CVD法により、膜厚 20nmの TiN膜(図示せず)を形成するNext, a 20 nm-thick TiN film (not shown) is formed on the entire surface by, eg, CVD.
。こうして、 Ti膜及び TiN膜より成るバリアメタル膜 (図示せず)が形成される。 . Thus, a barrier metal film (not shown) made of a Ti film and a TiN film is formed.
[0088] 次に、全面に、例えば CVD法により、膜厚 300nmのタングステン膜を形成する。 Next, a 300 nm-thickness tungsten film is formed on the entire surface by, eg, CVD.
[0089] 次に、例えば CMP法により、層間絶縁膜 32の表面が露出するまでタングステン膜 及びバリアメタル膜を研磨する。こうして、タングステン膜等より成る導体プラグ 36がコ ンタクトホール 34内に埋め込まれる。 Next, the tungsten film and the barrier metal film are polished by, eg, CMP method until the surface of the interlayer insulating film 32 is exposed. Thus, the conductor plug 36 made of a tungsten film or the like is embedded in the contact hole 34.
[0090] 次に、全面に、例えば CVD法により、膜厚 400nmのシリコン酸ィ匕膜より成る層間絶 縁膜 38を形成する。 Next, an interlayer insulating film 38 made of a silicon oxide film having a thickness of 400 nm is formed on the entire surface by, eg, CVD.
[0091] 次に、例えば CMP法により、層間絶縁膜 38の表面を平坦ィ匕する。 Next, the surface of the interlayer insulating film 38 is planarized by, eg, CMP.
[0092] 次に、フォトリソグラフィ技術により、層間絶縁膜 38に溝 40a、 40bを形成する。溝 4Next, grooves 40a and 40b are formed in the interlayer insulating film 38 by photolithography. Groove 4
Oaは、導電層 41aを埋め込むためのものである。溝 40bは、書き込みワード線 41bを 埋め込むためのものである。 Oa is for embedding the conductive layer 41a. The groove 40b is for embedding the write word line 41b.
[0093] 次に、全面に、例えばスパッタ法により、膜厚 20nmの Ta膜(図示せず)を形成するNext, a 20 nm-thickness Ta film (not shown) is formed on the entire surface by, eg, sputtering.
。 Ta膜は、ノリアメタル膜として機能するものである。 . The Ta film functions as a noria metal film.
[0094] 次に、全面に、例えばスパッタ法により、膜厚 50nmの NiFe膜 42を形成する。 NiF e膜 42は、書き込みを行う際に強い磁場を得るためのクラッド層として機能するもので ある。 Next, a 50 nm-thickness NiFe film 42 is formed on the entire surface by, eg, sputtering. The NiFe film 42 functions as a clad layer for obtaining a strong magnetic field when writing.
[0095] 次に、電気めつき法により、膜厚 800nmの Cu膜 44を形成する。  Next, a Cu film 44 having a film thickness of 800 nm is formed by an electroplating method.
[0096] 次に、例えば CMP法により、層間絶縁膜 38の表面が露出するまで Cu膜 44、 NiF e膜 42及び Ta膜を研磨する。こうして、溝 40a内に Cu膜 44等より成る導電層 4 laが 埋め込まれるとともに、溝 40b内に Cu膜 44等より成る書き込みワード線 41bが埋め込 まれる。 Next, the Cu film 44, the NiFe film 42, and the Ta film are polished by, for example, CMP until the surface of the interlayer insulating film 38 is exposed. Thus, the conductive layer 4 la made of the Cu film 44 or the like is buried in the groove 40a, and the write word line 41b made of the Cu film 44 or the like is buried in the groove 40b.
[0097] 次に、図 2 (b)に示すように、全面に、例えば CVD法により、層間絶縁膜 46を形成 する。 [0098] 次に、フォトリソグラフィ技術を用い、層間絶縁膜 46に導電層 41aに達するコンタク トホール 48を形成する。 Next, as shown in FIG. 2B, an interlayer insulating film 46 is formed on the entire surface by, eg, CVD. Next, a contact hole 48 that reaches the conductive layer 41 a is formed in the interlayer insulating film 46 by using a photolithography technique.
[0099] 次に、全面に、例えばスパッタ法により、膜厚 30nmの Ti膜(図示せず)を形成する Next, a 30 nm-thick Ti film (not shown) is formed on the entire surface by, eg, sputtering.
[0100] 次に、例えば CVD法により、膜厚 20nmの TiN膜(図示せず)を形成する。こうして 、 Ti膜及び TiN膜より成るバリアメタル膜 (図示せず)が形成される。 Next, a TiN film (not shown) having a thickness of 20 nm is formed by, eg, CVD. Thus, a barrier metal film (not shown) made of a Ti film and a TiN film is formed.
[0101] 次に、例えば CVD法により、膜厚 300nmのタングステン膜を形成する。  Next, a 300 nm-thickness tungsten film is formed by, eg, CVD.
[0102] 次に、例えば CMP法により、タングステン膜及びバリアメタル膜を層間絶縁膜 46の 表面が露出するまで研磨する。こうして、タングステン等より成る導体プラグ 50がコン タクトホール 48内に埋め込まれる。  Next, the tungsten film and the barrier metal film are polished by CMP, for example, until the surface of the interlayer insulating film 46 is exposed. In this way, the conductor plug 50 made of tungsten or the like is embedded in the contact hole 48.
[0103] 次に、図 3 (a)に示すように、全面に、例えばスパッタ法により、 Ta膜より成る導電層 54を形成する。導電層 54は、磁気抵抗素子 52の下部電極となるものである。なお、 図 3 (a)では、層間絶縁膜 46より下層に存在する構成要素につ ヽては省略されて!ヽ る。  Next, as shown in FIG. 3 (a), a conductive layer 54 made of a Ta film is formed on the entire surface by, eg, sputtering. The conductive layer 54 becomes a lower electrode of the magnetoresistive element 52. In FIG. 3A, the components existing below the interlayer insulating film 46 are omitted.
[0104] 次に、例えばスパッタ法により、膜厚 2nmの NiFe膜 56を形成する。 NiFe膜 56は、 結晶性の良好な反強磁性層 58を上方に形成するためのものである。  Next, a NiFe film 56 having a thickness of 2 nm is formed by, eg, sputtering. The NiFe film 56 is for forming an antiferromagnetic layer 58 with good crystallinity on the upper side.
[0105] 次に、例えばスパッタ法により、膜厚 20nmの PtMn膜より成る反強磁性層 58を形 成する。  Next, an antiferromagnetic layer 58 made of a PtMn film having a thickness of 20 nm is formed by, eg, sputtering.
[0106] 次に、例えばスパッタ法により、膜厚 3nmの CoFe膜より成る強磁性層 60を形成す る。  Next, the ferromagnetic layer 60 made of a CoFe film having a thickness of 3 nm is formed by, eg, sputtering.
[0107] 次に、例えばスパッタ法により、膜厚 0. 9nmの Ru膜より成る非磁性層 62を形成す る。  Next, the nonmagnetic layer 62 made of a Ru film having a thickness of 0.9 nm is formed by, eg, sputtering.
[0108] 次に、例えばスパッタ法により、膜厚 3nmの CoFe膜より成る強磁性層 64を形成す る。強磁性層 60と非磁性層 62と強磁性層 64とにより、固定層 66が構成される。  Next, the ferromagnetic layer 64 made of a CoFe film having a thickness of 3 nm is formed by, eg, sputtering. The ferromagnetic layer 60, the nonmagnetic layer 62, and the ferromagnetic layer 64 constitute a fixed layer 66.
[0109] 次に、例えばスパッタ法により、膜厚 lnmのアルミナ (AIO )より成るトンネル絶縁 [0109] Next, tunnel insulation made of lnm-thick alumina (AIO) is formed by, for example, sputtering.
X  X
膜 68を形成する。  A film 68 is formed.
[0110] 次に、例えばスパッタ法により、膜厚 2nmの CoFe膜より成る強磁性層 70を形成す る。 [0111] 次に、例えばスパッタ法により、膜厚 4nmの NiFe膜より成る強磁性層 72を形成す る。強磁性層 70と強磁性層 72とにより、自由層 74が構成される。 Next, a ferromagnetic layer 70 made of a CoFe film having a thickness of 2 nm is formed by, eg, sputtering. Next, a ferromagnetic layer 72 made of a NiFe film having a thickness of 4 nm is formed by, eg, sputtering. The ferromagnetic layer 70 and the ferromagnetic layer 72 constitute a free layer 74.
[0112] 次に、例えばスパッタ法により、膜厚 lnmの Ru (ルテニウム)膜 76を形成する。 Ru 膜 76は、後述するように、導電層 78をパターユングして上部電極を形成する際に、 エッチングストッパとして機能するものである。また、 Ru膜 76は、後述するように、磁 場を印加しながら熱処理を行って固定層 66におけるスピン方向を揃える際に、上部 電極 78中の原子と自由層 74中の原子とが相互拡散するのを防止する拡散防止膜( ノ リア膜)としても機能するものである。  Next, a Ru (ruthenium) film 76 having a thickness of 1 nm is formed by, eg, sputtering. As will be described later, the Ru film 76 functions as an etching stopper when the conductive layer 78 is patterned to form the upper electrode. In addition, as will be described later, when the Ru film 76 is heat-treated while applying a magnetic field to align the spin direction in the fixed layer 66, the atoms in the upper electrode 78 and the atoms in the free layer 74 are interdiffused. It also functions as a diffusion preventive film (nore film) that prevents this.
[0113] 次に、例えばスパッタ法により、膜厚 30nmの Ta膜より成る導電層 78を形成する。  Next, the conductive layer 78 made of a Ta film with a thickness of 30 nm is formed by, eg, sputtering.
導電層 78は、上部電極となるものである。また、導電層 78は、後述するように、自由 層 74等をパターユングする際にハードマスク (キャップ層)として機能するものである。  The conductive layer 78 becomes an upper electrode. Further, as will be described later, the conductive layer 78 functions as a hard mask (cap layer) when the free layer 74 and the like are patterned.
[0114] 次に、全面に、例えばスピンコート法により、フォトレジスト膜 86を形成する。  [0114] Next, a photoresist film 86 is formed on the entire surface by, eg, spin coating.
[0115] 次に、フォトリソグラフィ技術を用い、フォトレジスト膜 86をパターユングする(図 3 (b) 参照)。フォトレジスト膜 86を露光する際には、例えば電子線を用いて露光する。  [0115] Next, the photoresist film 86 is patterned using a photolithography technique (see FIG. 3B). When exposing the photoresist film 86, for example, it is exposed using an electron beam.
[0116] 次に、図 4 (a)〖こ示すように、 RIE (Reactive Ion Etching,反応性イオンエッチング) 法により、フォトレジスト膜 86をマスクとし、 Ru膜 76をエッチングストッパとして、導電 層 78をエッチングする。エッチング装置としては、例えば誘導結合プラズマ (ICP : Inductively Coupled Plasma)エッチング装置を用いる。誘導結合プラズマエッチング 装置とは、アンテナにより発生される高周波誘導磁場によりプラズマ中に誘導電界を 生成し、これによる電子の加速によって生成される高密度プラズマを用いたプラズマ エッチング装置のことである。エッチング条件は、例えば以下の通りとする。エツチン グガスとしては、ハロゲン系ガスを用いる。より具体的には、ハロゲン系ガスと Arガスと の混合ガスを用いる。ハロゲン系ガスとしては、例えば C1ガスを用いる。 C1ガスの流  Next, as shown in FIG. 4 (a), the conductive layer 78 is formed by the RIE (Reactive Ion Etching) method using the photoresist film 86 as a mask and the Ru film 76 as an etching stopper. Etch. As the etching apparatus, for example, an inductively coupled plasma (ICP) etching apparatus is used. The inductively coupled plasma etching apparatus is a plasma etching apparatus using a high-density plasma generated by accelerating electrons by generating an induction electric field in plasma by a high frequency induction magnetic field generated by an antenna. The etching conditions are as follows, for example. Halogen gas is used as the etching gas. More specifically, a mixed gas of halogen gas and Ar gas is used. For example, C1 gas is used as the halogen-based gas. C1 gas flow
2 2 量は、例えば 20sccmとする。 Arガスの流量は、例えば 17sccmとする。エッチングを 行う際におけるチャンバ内の圧力は、例えば 0. 7Paとする。エッチング装置の上部電 極に印加する電力は、例えば 800Wとする。エッチング装置の下部電極に印加する 電力は、例えば 60Wとする。エッチング時間は、例えば 20秒とする。導電層 78は、 例えば 15秒程度のエッチングによりパターユングされる力 ここでは、 5秒程度のォ 一バーエッチングを行う。オーバーエッチングを行うのは、導電層 78をウェハ面内で 均一にパターユングするためである。 2 2 The amount is, for example, 20 sccm. The flow rate of Ar gas is, for example, 17 sccm. The pressure in the chamber when performing etching is, for example, 0.7 Pa. The power applied to the upper electrode of the etching apparatus is 800 W, for example. The power applied to the lower electrode of the etching apparatus is 60 W, for example. The etching time is 20 seconds, for example. For example, the conductive layer 78 is patterned by etching for about 15 seconds. One bar etch is performed. The over-etching is performed in order to pattern the conductive layer 78 uniformly in the wafer surface.
[0117] 導電層 78をエッチングする際に Ru膜 76がエッチングストッパとして機能するため、 導電層 78をウェハ面内において均一にパターユングすることが可能となる。また、 Ru 膜 78に対する導電層 78の選択比が十分に高いため、導電層 78をエッチングする際 に Ru膜 76までもがエッチングされてしまうことはない。従って、導電層 78をエツチン グする際に自由層 74にダメージが加わるのを、 Ru膜 76により防止することができる。  [0117] Since the Ru film 76 functions as an etching stopper when the conductive layer 78 is etched, the conductive layer 78 can be uniformly patterned in the wafer surface. Further, since the selection ratio of the conductive layer 78 to the Ru film 78 is sufficiently high, even the Ru film 76 is not etched when the conductive layer 78 is etched. Therefore, the Ru film 76 can prevent the free layer 74 from being damaged when the conductive layer 78 is etched.
[0118] なお、ここでは、導電層 78の材料として Ta膜を用いる場合を例に説明したが、導電 層 78の材料は Ta膜に限定されるものではな ヽ。例えば Ti膜や TiN膜を導電層 78の 材料として用いてもよい。導電層 78の材料として Ti膜や TiN膜を用いた場合にも、 R u膜 76に対して高い選択比で導電層 78をエッチングすることが可能である。  [0118] Although the case where a Ta film is used as the material of the conductive layer 78 has been described as an example here, the material of the conductive layer 78 is not limited to the Ta film. For example, a Ti film or a TiN film may be used as the material for the conductive layer 78. Even when a Ti film or a TiN film is used as the material of the conductive layer 78, the conductive layer 78 can be etched with a high selectivity with respect to the Ru film 76.
[0119] また、ハロゲン系ガスは、 C1ガスに限定されるものではない。例えば、ハロゲン系ガ  [0119] The halogen-based gas is not limited to the C1 gas. For example, halogen-based gas
2  2
スとして、 CFガス等を用いてもよい。 CFガスを用いた場合にも、 Ru膜 76に対して  As gas, CF gas or the like may be used. Even when CF gas is used,
4 4  4 4
高 、選択比で導電層 78をエッチングすることが可能である。  The conductive layer 78 can be etched at a high selectivity.
[0120] このように、 Ru膜 76に対して高い選択比で導電層 78をエッチングし得るように、導 電層 78の材料やエッチングガス等を適宜設定すればょ 、。  [0120] As described above, the material of the conductive layer 78, the etching gas, and the like may be appropriately set so that the conductive layer 78 can be etched with a high selection ratio with respect to the Ru film 76.
[0121] こうして、導電層 78より成る上部電極が形成される。上部電極 78は、後述するよう に、自由層 74等をエッチングする際におけるハードマスクとしても機能する。  Thus, the upper electrode made of the conductive layer 78 is formed. As will be described later, the upper electrode 78 also functions as a hard mask when the free layer 74 and the like are etched.
[0122] 次に、図 4 (b)に示すように、上部電極 78をノヽードマスクとし、導電層 54をエツチン ダストツバとして、 Ru膜 76、 自由層 74、トンネル絶縁膜 68、固定層 66、反強磁性層 58及び NiFe膜 56をエッチングする。エッチング条件は、以下の通りとする。エツチン グガスとしては、例えば、 COガスと NHガスとの混合ガスを用いる。 COガスの流量  Next, as shown in FIG. 4 (b), the upper electrode 78 is used as a node mask, the conductive layer 54 is used as an eztin dust flange, a Ru film 76, a free layer 74, a tunnel insulating film 68, a fixed layer 66, The ferromagnetic layer 58 and the NiFe film 56 are etched. The etching conditions are as follows. As the etching gas, for example, a mixed gas of CO gas and NH gas is used. CO gas flow rate
3  Three
は例えば 5sccmとする。 NHガスの流量は、例えば 40sccmとする。エッチング速度  For example, 5 sccm. The flow rate of NH gas is 40 sccm, for example. Etching rate
3  Three
は、例えば lOnmZ分とする。  Is, for example, lOnmZ.
[0123] 次に、図 5 (a)に示すように、フォトリソグラフィ技術を用い、導電層 54をパターニン グする。これにより、導電層 54より成る下部電極が形成される。 Next, as shown in FIG. 5 (a), the conductive layer 54 is patterned using a photolithography technique. Thereby, a lower electrode made of the conductive layer 54 is formed.
[0124] 次に、図 5 (b)に示すように、低温プラズマ CVD法により、シリコン酸ィ匕膜より成る層 間絶縁膜 80を形成する。成膜温度は、例えば 300°C以下とする。 [0125] 次に、 CMP法により、層間絶縁膜 80の表面を平坦ィ匕する。 Next, as shown in FIG. 5B, an interlayer insulating film 80 made of a silicon oxide film is formed by a low temperature plasma CVD method. The film formation temperature is, for example, 300 ° C or lower. Next, the surface of the interlayer insulating film 80 is planarized by CMP.
[0126] 次に、図 6 (a)に示すように、フォトリソグラフィ技術を用い、上部電極 78に達するコ ンタクトホール 82を形成する。  Next, as shown in FIG. 6A, a contact hole 82 reaching the upper electrode 78 is formed by using a photolithography technique.
[0127] 次に、磁場を印加しながら、熱処理を行うことにより、固定層 66におけるスピンの方 向を揃える。熱処理温度は、例えば 260°Cとする。磁場の強さは、例えば 2Tとする。 自由層 74と上部電極 78との間に Ru膜 76が形成されているため、このような熱処理 を行ったとしても、 自由層 74中の原子と上部電極 78中の原子とが相互拡散するのをNext, the direction of spin in the fixed layer 66 is aligned by performing heat treatment while applying a magnetic field. The heat treatment temperature is, for example, 260 ° C. The strength of the magnetic field is 2T, for example. Since the Ru film 76 is formed between the free layer 74 and the upper electrode 78, even if such a heat treatment is performed, the atoms in the free layer 74 and the atoms in the upper electrode 78 are interdiffused. The
Ru膜 76により防止することが可能である。 It can be prevented by the Ru film 76.
[0128] 次に、図 6 (b)に示すように、全面に、例えばスパッタ法により、例えばアルミニウム より成る導電層 84を形成する。 Next, as shown in FIG. 6B, a conductive layer 84 made of, eg, aluminum is formed on the entire surface by, eg, sputtering.
[0129] 次に、フォトリソグラフィ技術を用い、導電層 84をパターユングする。こうして、導電 層 84より成るビット線が形成される。ビット線 84は、磁気抵抗素子の上部電極に電気 的に接続される。 [0129] Next, the conductive layer 84 is patterned using a photolithography technique. Thus, a bit line made of the conductive layer 84 is formed. The bit line 84 is electrically connected to the upper electrode of the magnetoresistive element.
[0130] こうして本実施形態による磁気メモリ装置が製造される。 Thus, the magnetic memory device according to the present embodiment is manufactured.
[0131] 本実施形態によれば、自由層 74と導電層 78との間に Ru膜 76を形成することに主 な特徴がある。  According to the present embodiment, the main feature is that the Ru film 76 is formed between the free layer 74 and the conductive layer 78.
[0132] 本実施形態によれば、自由層 74と上部電極 78との間に Ru膜 76を形成するため、 導電層 78をエッチングして上部電極を形成する際には、 Ru膜 76がエッチングストツ ノ として機能する。このため、本実施形態によれば、導電層 78をエッチングする際に 自由層 74がダメージを受けるのを防止することができる。し力も、 Ru膜 76をエツチン ダストッパとして導電層 78をエッチングするため、導電層 78に対するパターユングを ウェハ面内において均一に行うことができる。従って、本実施形態によれば、磁気抵 抗素子を高 、歩留りで形成することができる。  [0132] According to the present embodiment, the Ru film 76 is formed between the free layer 74 and the upper electrode 78. Therefore, when the upper electrode is formed by etching the conductive layer 78, the Ru film 76 is etched. Functions as a stock. Therefore, according to the present embodiment, it is possible to prevent the free layer 74 from being damaged when the conductive layer 78 is etched. In addition, since the conductive layer 78 is etched using the Ru film 76 as an etch stopper, the patterning of the conductive layer 78 can be performed uniformly in the wafer surface. Therefore, according to the present embodiment, the magnetic resistance element can be formed with a high yield.
[0133] また、本実施形態によれば、上部電極 78をマスクとして自由層 74等をパターユング するため、フォトレジスト膜 86を非常に厚く形成しておく必要がない。フォトレジスト膜 86を非常に厚く形成する必要がないため、フォトレジスト膜 86を微細にパターユング することができる。従って、本実施形態によれば、磁気抵抗素子を微細に形成するこ とが可能となる。 [0134] また、本実施形態によれば、後述するように、 Ru膜 76がエッチングストッパとして機 能するため、プラズマ分光分析装置等を用いてエッチングの終点を検出することを要 しない。このため、本実施形態によれば、簡便かつ確実に導電層 78をパターユング することができる。 Further, according to the present embodiment, since the free layer 74 and the like are patterned using the upper electrode 78 as a mask, it is not necessary to form the photoresist film 86 very thickly. Since it is not necessary to form the photoresist film 86 very thickly, the photoresist film 86 can be finely patterned. Therefore, according to the present embodiment, the magnetoresistive element can be formed finely. Further, according to the present embodiment, as will be described later, since the Ru film 76 functions as an etching stopper, it is not necessary to detect the etching end point using a plasma spectroscopic analyzer or the like. Therefore, according to the present embodiment, the conductive layer 78 can be patterned easily and reliably.
[0135] また、本実施形態によれば、自由層 74と上部電極 78との間に形成された Ru膜 76 は、固定層 66におけるスピン方向を揃える際の熱処理において、自由層 76の構成 原子と上部電極 78の構成原子との相互拡散を防止する拡散防止膜 (バリア膜)とし ても機能する。このため、本実施形態によれば、上部電極 78を構成する原子と自由 層 76を構成する原子とが相互拡散するのを Ru膜 76により防止することができる。  Further, according to the present embodiment, the Ru film 76 formed between the free layer 74 and the upper electrode 78 is formed by the constituent atoms of the free layer 76 in the heat treatment when aligning the spin direction in the fixed layer 66. It also functions as a diffusion prevention film (barrier film) that prevents mutual diffusion between the upper electrode 78 and the constituent atoms of the upper electrode 78. Therefore, according to the present embodiment, the Ru film 76 can prevent the atoms constituting the upper electrode 78 and the atoms constituting the free layer 76 from interdiffusion.
[0136] このように、本実施形態によれば、微細な磁気抵抗素子を有する磁気メモリ装置を 高 、歩留りで製造することが可能となる。  As described above, according to the present embodiment, a magnetic memory device having a fine magnetoresistive element can be manufactured at a high yield.
[0137] (評価結果)  [0137] (Evaluation result)
次に、本実施形態による磁気メモリ装置及びその製造方法の評価結果を図 7及び 図 8を用いて説明する。  Next, evaluation results of the magnetic memory device and the manufacturing method thereof according to the present embodiment will be described with reference to FIGS.
[0138] 図 7及び図 8は、ォージェ電子分光分析法 (AES: Auger Electron Spectroscopy)に より得られた深さ方向の濃度プロファイルを示すグラフである。 AES法とは、固体表 面に電子線を照射し、オージュ遷移により放出される電子エネルギー分布を測定す ることにより、試料表面の元素の同定、定量を行う方法のことである。分析を行う際に は、積層膜の表面をスパッタしながら分析を行った。横軸はスパッタ時間を示しており 、縦軸は原子濃度を示している。  7 and 8 are graphs showing concentration profiles in the depth direction obtained by Auger Electron Spectroscopy (AES). The AES method is a method for identifying and quantifying elements on the surface of a sample by irradiating a solid surface with an electron beam and measuring the electron energy distribution emitted by the Auge transition. When performing the analysis, the analysis was performed while sputtering the surface of the laminated film. The horizontal axis indicates the sputtering time, and the vertical axis indicates the atomic concentration.
[0139] 図 7は、本実施形態の場合、即ち、 NiFe膜上に Ru膜を介して Ta膜を形成した場 合を示している。 NiFe膜の膜厚は 10nmとした。 Ru膜の膜厚は、 lnmとした。 Ta膜 の膜厚は 30nmとした。図 7における点線は、熱処理を行うことなく AES法により分析 した場合を示している。図 7における実線は、 330°C、 30分の熱処理を行った後、 A ES法により分析した場合を示している。  FIG. 7 shows the case of the present embodiment, that is, the case where the Ta film is formed on the NiFe film via the Ru film. The thickness of the NiFe film was 10 nm. The film thickness of the Ru film was lnm. The thickness of the Ta film was 30 nm. The dotted line in Fig. 7 shows the case of analysis by AES method without heat treatment. The solid line in Fig. 7 shows the case of analysis by AES method after heat treatment at 330 ° C for 30 minutes.
[0140] 図 8は、比較例の場合、即ち、 NiFe膜上に、 Ru膜を形成することなぐ Ta膜を直接 形成した場合を示している。 NiFe膜の膜厚は 10nmとした。 Ta膜の膜厚は 30nmと した。図 8の点線は、熱処理を行うことなく AES法により分析した場合を示している。 図 8の実線は、 330°C、 30分の熱処理を行った後、 AES法により分析した場合を示 している。 [0140] FIG. 8 shows the case of the comparative example, that is, the case where the Ta film without forming the Ru film is directly formed on the NiFe film. The thickness of the NiFe film was 10 nm. The thickness of the Ta film was 30 nm. The dotted line in Fig. 8 shows the case of analysis by AES method without heat treatment. The solid line in Fig. 8 shows the case of analysis by AES after heat treatment at 330 ° C for 30 minutes.
[0141] 図 8から分力るように、比較例の場合、即ち、 NiFe膜上に、 Ru膜を形成することなく 、 Ta膜を直接形成した場合には、熱処理を行うことにより、積層膜の表面近傍におけ る Taの濃度が低くなる。また、比較例の場合には、熱処理を行うことにより、積層膜の 表面近傍における Niの濃度が高くなる。これらのことから、比較例の場合には、熱処 理を行うことにより、 NiFe膜を構成する原子と Ta膜を構成する原子とが相互拡散して しまうことが分かる。  [0141] As shown in FIG. 8, in the case of the comparative example, that is, when the Ta film is directly formed on the NiFe film without forming the Ru film, the laminated film is obtained by performing heat treatment. The Ta concentration in the vicinity of the surface becomes lower. In the case of the comparative example, the Ni concentration in the vicinity of the surface of the laminated film is increased by performing the heat treatment. From these, it can be seen that in the case of the comparative example, the atoms constituting the NiFe film and the atoms constituting the Ta film are mutually diffused by heat treatment.
[0142] これに対し、図 7から分かるように、本実施形態の場合、 NiFe膜上に Ru膜を介して Ta膜を形成した場合には、熱処理を行っても、積層膜の表面近傍における Taの濃 度は殆ど変化していない。また、本実施形態の場合には、熱処理を行っても、積層膜 の表面近傍における Niの濃度も殆ど変化していない。これらのことから、本実施形態 の場合には、 NiFe膜を構成する原子と Ta膜を構成する原子とが相互拡散するのを 防止し得ることが分かる。  On the other hand, as can be seen from FIG. 7, in the case of this embodiment, when a Ta film is formed on a NiFe film via a Ru film, even if heat treatment is performed, it is in the vicinity of the surface of the laminated film. The Ta concentration has hardly changed. In the present embodiment, even when heat treatment is performed, the Ni concentration in the vicinity of the surface of the laminated film is hardly changed. From these facts, it can be seen that in the case of the present embodiment, the atoms constituting the NiFe film and the atoms constituting the Ta film can be prevented from interdiffusion.
[0143] これらのことから、本実施形態によれば、固定層 66におけるスピン方向を揃える際 の熱処理において、自由層 76を構成する原子と上部電極 78を構成する原子とが相 互拡散するのを Ru膜 76により防止し得ることが分かる。  From these facts, according to the present embodiment, the atoms constituting the free layer 76 and the atoms constituting the upper electrode 78 are mutually diffused in the heat treatment for aligning the spin direction in the fixed layer 66. It can be seen that the Ru film 76 can prevent this.
[0144] 図 9は、試料振動型磁力計 (VSM: Vibrating Sample Magnetometer)により測定し た磁化曲線 (Magnetization Curve)を示すグラフである。図 9において、横軸は外部 磁場を示しており、縦軸は磁ィ匕を示している。図 9において、細い実線は、比較例の 場合、即ち、 NiFe膜上に、 Ru膜を形成することなぐ Ta膜を直接形成した場合を示 している。図 9において、太い実線は、本実施形態の場合、即ち、 NiFe膜上に Ru膜 を介して Ta膜を形成した場合を示して 、る。  [0144] FIG. 9 is a graph showing a magnetization curve (Magnetization Curve) measured by a sample vibration magnetometer (VSM). In Fig. 9, the horizontal axis indicates the external magnetic field, and the vertical axis indicates the magnetic field. In FIG. 9, the thin solid line shows the case of the comparative example, that is, the case where the Ta film is formed directly on the NiFe film without forming the Ru film. In FIG. 9, the thick solid line shows the case of the present embodiment, that is, the case where the Ta film is formed on the NiFe film via the Ru film.
[0145] 図 9から分力るように、本実施形態では、比較例と比較して、飽和磁化が 15%程度 大きくなつている。  As shown in FIG. 9, in this embodiment, the saturation magnetization is increased by about 15% compared to the comparative example.
[0146] このことから、本実施形態によれば、良好な特性を有する磁気抵抗素子を形成しう ることが分かる。本実施形態においてこのような良好な特性が得られるのは、固定層 66におけるスピン方向を揃える際の熱処理において、自由層 76を構成する原子と 上部電極 78を構成する原子とが相互拡散するのを Ru膜 76により防止し得るためと 考えられる。 [0146] From this, it can be seen that according to the present embodiment, a magnetoresistive element having good characteristics can be formed. In the present embodiment, such good characteristics can be obtained because the atoms constituting the free layer 76 and the atoms constituting the free layer 76 are subjected to heat treatment when aligning the spin direction in the fixed layer 66. This is because the Ru film 76 can prevent the atoms constituting the upper electrode 78 from interdiffusion.
[0147] [変形実施形態]  [Modified Embodiment]
本発明は上記実施形態に限らず種々の変形が可能である。  The present invention is not limited to the above embodiment, and various modifications can be made.
[0148] 例えば、上記実施形態では、下部電極 54上に、反強磁性層 58、固定層 66、トンネ ル絶縁膜 68及び自由層 74を順次積層する場合を例に説明したが、磁気抵抗素子 5 2の積層構造はこれに限定されるものではない。例えば、下部電極 54上に、自由層 7 4、トンネル絶縁膜 68、固定層 66及び反強磁性層 58を順次積層するようにしてもよ い。この場合、反強磁性層 58と上部電極 78との間に Ru膜 76を形成すればよい。  For example, in the above embodiment, the case where the antiferromagnetic layer 58, the fixed layer 66, the tunnel insulating film 68, and the free layer 74 are sequentially stacked on the lower electrode 54 has been described as an example. The laminated structure of 52 is not limited to this. For example, the free layer 74, the tunnel insulating film 68, the fixed layer 66, and the antiferromagnetic layer 58 may be sequentially stacked on the lower electrode 54. In this case, a Ru film 76 may be formed between the antiferromagnetic layer 58 and the upper electrode 78.
[0149] また、上記実施形態では、 Ru膜 76上に上部電極 78が残存して 、る場合を例に説 明したが、自由層 74等をパターユングした後に、上部電極 78を研磨除去してもよい 。この場合には、ビット線 84が磁気抵抗素子 52の上部電極を兼ねることとなる。なお 、この場合には、上部電極 78を研磨除去する際に Ru膜 76までもが除去されて自由 層 74にダメージが加わらないよう、 Ru膜 76を厚めに形成しておくことが好ましい。  In the above embodiment, the case where the upper electrode 78 remains on the Ru film 76 has been described as an example. However, after patterning the free layer 74 and the like, the upper electrode 78 is polished and removed. May be. In this case, the bit line 84 also serves as the upper electrode of the magnetoresistive element 52. In this case, it is preferable that the Ru film 76 be formed thick so that when the upper electrode 78 is removed by polishing, even the Ru film 76 is removed and the free layer 74 is not damaged.
[0150] また、上記実施形態では、 COガスと NHガスとの混合ガスを用いて、 Ru膜 76及び  [0150] In the above-described embodiment, the Ru film 76 and the mixed gas of CO gas and NH gas are used.
3  Three
自由層 74等をエッチングする場合を例に説明したが、 Ru膜 76及び自由層 74等を エッチングする際に用いるエッチングガスはこれに限定されるものではない。例えば、 エッチングガスとしてメタノールガスを用いてもょ 、。メタノールガスを用いた場合であ つても、 Ru膜 76及び自由層 74等を高い選択比でエッチングすることが可能である。  Although the case where the free layer 74 and the like are etched has been described as an example, the etching gas used for etching the Ru film 76 and the free layer 74 and the like is not limited thereto. For example, use methanol gas as the etching gas. Even when methanol gas is used, it is possible to etch the Ru film 76, the free layer 74, and the like with a high selectivity.
[0151] また、上記実施形態では、自由層 74の材料として CoFe膜や NiFe膜を用いる場合 を例に説明したが、自由層 74の材料は CoFe膜や NiFe膜に限定されるものではな い。上部電極 78に対して高い選択比でエッチングし得るあらゆる磁性材料を、自由 層 74の材料として適宜用いることができる。例えば、 Co (コバルト)、 Fe (鉄)、 Ni (二 ッケル)の少なくとも 、ずれかを含む磁性材料を、自由層 74の材料として用いること ができる。 [0151] In the above embodiment, the case where a CoFe film or a NiFe film is used as the material of the free layer 74 has been described as an example. However, the material of the free layer 74 is not limited to the CoFe film or the NiFe film. . Any magnetic material that can be etched at a high selectivity with respect to the upper electrode 78 can be used as the material of the free layer 74 as appropriate. For example, a magnetic material containing at least one of Co (cobalt), Fe (iron), and Ni (nickel) can be used as the material of the free layer 74.
[0152] また、上記実施形態では、固定層 66の材料として CoFe膜等を用いる場合を例に 説明したが、固定層 66の材料は CoFe膜等に限定されるものではない。上部電極 78 に対して高 、選択比でエッチングし得るあらゆる磁性材料を、固定層 66の材料として 適宜用いることができる。例えば、 Co、 Fe、 Niの少なくともいずれかを含む磁性材料 を、固定層 66の材料として用いることができる。 [0152] In the above embodiment, the case where a CoFe film or the like is used as the material of the fixed layer 66 has been described as an example. However, the material of the fixed layer 66 is not limited to the CoFe film or the like. Any magnetic material that can be etched at a high selectivity with respect to the upper electrode 78 is used as the material of the fixed layer 66. It can be used as appropriate. For example, a magnetic material containing at least one of Co, Fe, and Ni can be used as the material of the fixed layer 66.
[0153] また、上記実施形態では、反強磁性層 58の材料として PtMn膜を用いる場合を例 に説明したが、反強磁性層 58の材料は PtMn膜に限定されるものではない。上部電 極 78に対して高 、選択比でエッチングし得るあらゆる反強磁性材料を、反強磁性層 58の材料として適宜用いることができる。例えば、 IrMn (Ir:イリジウム、 Mn:マンガン )膜を反強磁性層 58の材料として用いてもょ 、。  [0153] In the above embodiment, the case where a PtMn film is used as the material of the antiferromagnetic layer 58 has been described as an example. However, the material of the antiferromagnetic layer 58 is not limited to the PtMn film. Any antiferromagnetic material that can be etched at a high selectivity with respect to the upper electrode 78 can be appropriately used as the material of the antiferromagnetic layer 58. For example, an IrMn (Ir: iridium, Mn: manganese) film may be used as the material of the antiferromagnetic layer 58.
[0154] また、上記実施形態では、トンネル絶縁膜 68の材料としてアルミナ膜を用いる場合 を例に説明したが、トンネル絶縁膜 68の材料はアルミナ膜に限定されるものではな い。上部電極 78に対して高い選択比でエッチングし得るあらゆる絶縁材料を、トンネ ル絶縁膜 68の材料として適宜用いることが可能である。例えば、 MgO (Mg:マグネ シゥム)、 HfO (Hf :ハフニウム)、 HfAlO (A1:アルミニウム)、 TiO等をトンネル絶  [0154] In the above embodiment, the case where an alumina film is used as the material of the tunnel insulating film 68 has been described as an example. However, the material of the tunnel insulating film 68 is not limited to the alumina film. Any insulating material that can be etched with a high selectivity with respect to the upper electrode 78 can be used as the material of the tunnel insulating film 68 as appropriate. For example, MgO (Mg: Magnesium), HfO (Hf: Hafnium), HfAlO (A1: Aluminum), TiO, etc. can be tunneled.
2 X X  2 X X
縁膜 68の材料として用いてもょ 、。  It can also be used as a material for the edge film 68.
産業上の利用可能性  Industrial applicability
[0155] 本発明による磁気メモリ装置及びその製造方法は、微細な磁気抵抗素子を有する 磁気メモリ装置を高い歩留りで製造するのに有用である。 The magnetic memory device and the manufacturing method thereof according to the present invention are useful for manufacturing a magnetic memory device having fine magnetoresistive elements with a high yield.

Claims

請求の範囲 The scope of the claims
[1] 基板上に形成された第 1の磁性層と;前記第 1の磁性層上に形成されたトンネル絶 縁膜と;前記トンネル絶縁膜上に形成された第 2の磁性層と;前記第 2の磁性層上に 形成された電極を有する磁気抵抗素子を有する磁気メモリ装置であって、  [1] a first magnetic layer formed on a substrate; a tunnel insulating film formed on the first magnetic layer; a second magnetic layer formed on the tunnel insulating film; A magnetic memory device having a magnetoresistive element having an electrode formed on a second magnetic layer,
前記第 2の磁性層と前記電極との間に形成されたルテニウム膜を更に有する ことを特徴とする磁気メモリ装置。  A magnetic memory device further comprising a ruthenium film formed between the second magnetic layer and the electrode.
[2] 請求の範囲第 1項記載の磁気メモリ装置において、 [2] In the magnetic memory device according to claim 1,
前記電極は、タンタル、チタン又は窒化チタンを含む  The electrode comprises tantalum, titanium or titanium nitride
ことを特徴とする磁気メモリ装置。  A magnetic memory device.
[3] 請求の範囲第 1項又は第 2項記載の磁気メモリ装置において、 [3] In the magnetic memory device according to claim 1 or 2,
前記第 2の磁性層は、コバルト、鉄、又はニッケルを含む  The second magnetic layer includes cobalt, iron, or nickel
ことを特徴とする磁気メモリ装置。  A magnetic memory device.
[4] 請求の範囲第 1項又は第 2項記載の磁気メモリ装置において、 [4] In the magnetic memory device according to claim 1 or 2,
前記第 2の磁性層は、 CoFe膜又は NiFe膜を含む  The second magnetic layer includes a CoFe film or a NiFe film
ことを特徴とする磁気メモリ装置。  A magnetic memory device.
[5] 基板上に第 1の磁性層を形成する工程と、 [5] forming a first magnetic layer on the substrate;
前記第 1の磁性層上にトンネル絶縁膜を形成する工程と、  Forming a tunnel insulating film on the first magnetic layer;
前記トンネル絶縁膜上に第 2の磁性層を形成する工程と、  Forming a second magnetic layer on the tunnel insulating film;
前記第 2の磁性層上にルテニウム膜を形成する工程と、  Forming a ruthenium film on the second magnetic layer;
前記ルテニウム膜上に導電層を形成する工程と、  Forming a conductive layer on the ruthenium film;
前記導電層上にフォトレジストマスクを形成する工程と、  Forming a photoresist mask on the conductive layer;
前記フォトレジストマスクを用い、前記ルテニウム膜をエッチングストッパとして、前記 導電層をエッチングすることにより、前記導電層より成る電極を形成する工程と、 前記電極をマスクとして、少なくとも前記ルテニウム膜及び前記第 2の磁性層をエツ チングする工程と  Etching the conductive layer by using the photoresist mask and using the ruthenium film as an etching stopper to form an electrode made of the conductive layer; and using the electrode as a mask, at least the ruthenium film and the second layer Etching the magnetic layer of
を有することを特徴とする磁気メモリ装置の製造方法。  A method of manufacturing a magnetic memory device, comprising:
[6] 請求の範囲第 5項記載の磁気メモリ装置の製造方法にぉ 、て、 [6] In the method of manufacturing a magnetic memory device according to claim 5,
前記導電層は、タンタル、チタン又は窒化チタンを含む ことを特徴とする磁気メモリ装置の製造方法。 The conductive layer includes tantalum, titanium, or titanium nitride. A method of manufacturing a magnetic memory device.
[7] 請求の範囲第 5項又は第 6項記載の磁気メモリ装置の製造方法にお 、て、  [7] In the method of manufacturing a magnetic memory device according to claim 5 or 6,
前記第 2の磁性層は、コバルト、鉄、ニッケルを含む  The second magnetic layer includes cobalt, iron, and nickel
ことを特徴とする磁気メモリ装置の製造方法。  A method of manufacturing a magnetic memory device.
[8] 請求の範囲第 5項又は第 6項記載の磁気メモリ装置の製造方法にお 、て、 [8] In the method of manufacturing a magnetic memory device according to claim 5 or 6,
前記第 2の磁性層は、 CoFe膜又は NiFe膜を含む  The second magnetic layer includes a CoFe film or a NiFe film
ことを特徴とする磁気メモリ装置の製造方法。  A method of manufacturing a magnetic memory device.
[9] 請求の範囲第 5項乃至第 8項の 、ずれか 1項に記載の磁気メモリ装置の製造方法 において、 [9] In the method of manufacturing a magnetic memory device according to any one of claims 5 to 8,
前記導電層をエッチングする工程では、ハロゲン系ガスを用いて、前記導電層をェ ツチングする  In the step of etching the conductive layer, the conductive layer is etched using a halogen-based gas.
ことを特徴とする磁気メモリ装置の製造方法。  A method of manufacturing a magnetic memory device.
[10] 請求の範囲第 5項乃至第 9項の 、ずれか 1項に記載の磁気メモリ装置の製造方法 において、 [10] In the method of manufacturing a magnetic memory device according to any one of claims 5 to 9,
前記ルテニウム膜及び第 2の磁性層をエッチングする工程では、 COガスと NHガ  In the step of etching the ruthenium film and the second magnetic layer, CO gas and NH gas are etched.
3 スとの混合ガスを用いて、前記ルテニウム膜及び前記第 2の磁性層をエッチングする ことを特徴とする磁気メモリ装置の製造方法。  Etching the ruthenium film and the second magnetic layer using a mixed gas with 3 s. A method of manufacturing a magnetic memory device, comprising:
[11] 請求の範囲第 5項乃至第 9項のいずれか 1項に記載の磁気メモリ装置の製造方法 において、 [11] In the method of manufacturing a magnetic memory device according to any one of claims 5 to 9,
前記ルテニウム膜及び第 2の磁性層をエッチングする工程では、メタノールガスを 用いて、前記ルテニウム膜及び前記第 2の磁性層をエッチングする  In the step of etching the ruthenium film and the second magnetic layer, the ruthenium film and the second magnetic layer are etched using methanol gas.
ことを特徴とする磁気メモリ装置の製造方法。  A method of manufacturing a magnetic memory device.
[12] 請求の範囲第 5項乃至第 11項のいずれか 1項に記載の磁気メモリ装置の製造方 法において、 [12] In the method of manufacturing a magnetic memory device according to any one of claims 5 to 11,
前記ルテニウム膜及び前記第 2の磁性層をエッチングする工程の後、前記第 1の磁 性層又は前記第 2の磁性層に磁場を印加しながら、熱処理を行うことにより、前記第 1の磁性層又は前記第 2の磁性層におけるスピンの方向を揃える工程を更に有する ことを特徴とする磁気メモリ装置の製造方法。  After the step of etching the ruthenium film and the second magnetic layer, the first magnetic layer is subjected to a heat treatment while applying a magnetic field to the first magnetic layer or the second magnetic layer. Alternatively, the method of manufacturing a magnetic memory device, further comprising the step of aligning spin directions in the second magnetic layer.
PCT/JP2005/005390 2005-03-24 2005-03-24 Magnetic memory device and method for manufacturing same WO2006100779A1 (en)

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JPH1192971A (en) * 1997-09-22 1999-04-06 Natl Res Inst For Metals Mask for reactive ion etching
JP2004319725A (en) * 2003-04-16 2004-11-11 Fujitsu Ltd Magnetic random access memory device
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Publication number Priority date Publication date Assignee Title
CN110896126A (en) * 2018-09-13 2020-03-20 东芝存储器株式会社 Magnetic memory device
CN110896126B (en) * 2018-09-13 2024-04-09 铠侠股份有限公司 Magnetic memory device

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