WO2006078736A3 - Circuits and methods of generating and controlling signals on an integrated circuit - Google Patents

Circuits and methods of generating and controlling signals on an integrated circuit Download PDF

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Publication number
WO2006078736A3
WO2006078736A3 PCT/US2006/001764 US2006001764W WO2006078736A3 WO 2006078736 A3 WO2006078736 A3 WO 2006078736A3 US 2006001764 W US2006001764 W US 2006001764W WO 2006078736 A3 WO2006078736 A3 WO 2006078736A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
circuits
generating
methods
transmission line
Prior art date
Application number
PCT/US2006/001764
Other languages
French (fr)
Other versions
WO2006078736A2 (en
Inventor
Paul William Ronald Self
Original Assignee
Paul William Ronald Self
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/038,560 external-priority patent/US7215208B2/en
Priority claimed from US11/200,472 external-priority patent/US7276977B2/en
Priority claimed from US11/329,779 external-priority patent/US20060164141A1/en
Application filed by Paul William Ronald Self filed Critical Paul William Ronald Self
Priority to EP06718785A priority Critical patent/EP1842288A4/en
Publication of WO2006078736A2 publication Critical patent/WO2006078736A2/en
Publication of WO2006078736A3 publication Critical patent/WO2006078736A3/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/02—Automatic control of frequency or phase; Synchronisation using a frequency discriminator comprising a passive frequency-determining element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H03L7/0895—Details of the current generators
    • H03L7/0896—Details of the current generators the current generators being controlled by differential up-down pulses

Abstract

Embodiments of the present invention include an integrated circuit feedback loop comprising an integrated transmission line [350], wherein the integrated transmission line is used as a timing reference for the feedback loop and wherein the feedback loop and the transmission line are integrated on a single integrated circuit. The feedback loop and transmission line may be used as a frequency generator or controlled delay [Fig. 12A], for example. In another embodiment [Fig. 16A], the present invention includes a timing loop with first and second commutating phase detectors [1610A and 1610B].
PCT/US2006/001764 2005-01-19 2006-01-18 Circuits and methods of generating and controlling signals on an integrated circuit WO2006078736A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP06718785A EP1842288A4 (en) 2005-01-19 2006-01-18 Circuits and methods of generating and controlling signals on an integrated circuit

Applications Claiming Priority (10)

Application Number Priority Date Filing Date Title
US11/038,560 2005-01-19
US11/038,560 US7215208B2 (en) 2005-01-19 2005-01-19 Fully integrated frequency generator
US64583705P 2005-01-21 2005-01-21
US60/645,837 2005-01-21
US66365505P 2005-03-21 2005-03-21
US60/663,655 2005-03-21
US11/200,472 2005-08-09
US11/200,472 US7276977B2 (en) 2005-08-09 2005-08-09 Circuits and methods for reducing static phase offset using commutating phase detectors
US11/329,779 US20060164141A1 (en) 2005-01-21 2006-01-11 Controlled delay line circuit with integrated transmission line reference
US11/329,779 2006-01-11

Publications (2)

Publication Number Publication Date
WO2006078736A2 WO2006078736A2 (en) 2006-07-27
WO2006078736A3 true WO2006078736A3 (en) 2006-12-21

Family

ID=36692828

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2006/001764 WO2006078736A2 (en) 2005-01-19 2006-01-18 Circuits and methods of generating and controlling signals on an integrated circuit

Country Status (2)

Country Link
EP (1) EP1842288A4 (en)
WO (1) WO2006078736A2 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE27092E (en) * 1967-11-01 1971-03-23 Moving target indication system using a staggered repetition rate
US5570054A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for adaptive clock deskewing
US5696951A (en) * 1996-01-03 1997-12-09 Credence Systems Corporation Signal deskewing system for synchronous logic circuit
US6433596B1 (en) * 1999-07-02 2002-08-13 Peter R. Bossard Programmable on-chip damping coefficient for CMOS filter circuits that gives faster lockup times and lower jitter in phase lock loop circuits
US6622370B1 (en) * 2000-04-13 2003-09-23 Raytheon Company Method for fabricating suspended transmission line
US6741109B1 (en) * 2002-02-28 2004-05-25 Silicon Laboratories, Inc. Method and apparatus for switching between input clocks in a phase-locked loop

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19913084A1 (en) * 1999-03-23 2000-10-19 Siemens Ag Oscillator circuit for voltage controlled oscillator
US6583653B1 (en) * 2000-03-31 2003-06-24 Intel Corporation Method and apparatus for generating a clock signal

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE27092E (en) * 1967-11-01 1971-03-23 Moving target indication system using a staggered repetition rate
US5570054A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for adaptive clock deskewing
US5696951A (en) * 1996-01-03 1997-12-09 Credence Systems Corporation Signal deskewing system for synchronous logic circuit
US6433596B1 (en) * 1999-07-02 2002-08-13 Peter R. Bossard Programmable on-chip damping coefficient for CMOS filter circuits that gives faster lockup times and lower jitter in phase lock loop circuits
US6622370B1 (en) * 2000-04-13 2003-09-23 Raytheon Company Method for fabricating suspended transmission line
US6741109B1 (en) * 2002-02-28 2004-05-25 Silicon Laboratories, Inc. Method and apparatus for switching between input clocks in a phase-locked loop

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP1842288A4 *

Also Published As

Publication number Publication date
WO2006078736A2 (en) 2006-07-27
EP1842288A4 (en) 2010-01-20
EP1842288A2 (en) 2007-10-10

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