WO2006073776A1

WO2006073776A1 - Method for controlling a transposed scan display system using customizable waveforms

Info

Publication number: WO2006073776A1
Application number: PCT/US2005/045900
Authority: WO
Inventors: Richard Hugh Miller; Frank Melvin Koch; James Arthur Hutton; Richard William Collins; Richard Laverne Eyer
Original assignee: Thomson Licensing
Priority date: 2004-12-31
Filing date: 2005-12-19
Publication date: 2006-07-13

Abstract

The method for controlling a transposed scan display system utilizes customized waveforms that are derived from the fast scan and slow scan sync signals of an incoming video signal. The presence of fast sync pulses and slow sync pulses are monitored and used to generate control signal values from a stored look up table. The looked up control signals are used to generate low level inputs to a quad driver and N-S pin cushion modulator to provide the appropriate N-S pin cushion correction and quad coil control for the transposed scan display.

Description

METHOD FOR CONTROLLING A TRANSPOSED SCAN DISPLAY SYSTEM USING CUSTOMIZABLE WAVEFORMS

CROSS REFERENCE TO RELATED APPLICATIONS This application claims the benefit under 35 LJ. S. C. §119(e) of U.S. Provisional Patent application Serial No. 60/640,946 filed on December 31 , 2004, the entire contents of which is incorporated herein by reference.

FIELD OF THE INVENTION The present invention relates to cathode ray tubes (CRTs) for displays such as, for example, High Definition Television (HDTV). More particularly, it relates to CRTs operating in a vertical scan mode and a method of operating the CRT in the vertical scan mode.

BACKGROUND OF THE INVENTION The popularity of HDTV has prompted an increased demand for television sets capable of displaying HDTV images. Such demand has prompted an increase in demand for larger aspect ratio, true flat screen displays having a shallower depth, increased deflection angle and improved visual resolution performance.

The demand for shallow, flat screen displays has led to efforts to improve spot performance so that spot size and shape exhibit greater uniformity across the entire screen for improved visual resolution performance. To this end, most displays now make use of dynamic focus. Increasing the deflection angle also yields an improvement in spot performance in the central area of the screen because increasing the deflection angle results in a decreased gun-to- screen distance, hereinafter referred to as the 'throw distance'. Figure 1 illustrates the basic geometrical relationship between throw distance and deflection angle for a typical CRT. Increasing the deflection angle (A) reduces the throw distance, thus allowing for production of a shorter CRT and ultimately, a slimmer television set.

As the deflection angle increases, the throw distance decreases and spot size decreases in a non-linear relationship. The following formula mathematically approximates relationship between spot size and throw distance:

Spot Size w B * Throw ^M (Equation 1) where the exponent 1.4 represents an approximation taking into consideration the effects of magnification and space charge effects over a useful range of beam current. The term B represents a system-related proportionality constant. Considering this relationship, for a tube having a diagonal dimension of 760 mm, increasing the corner to corner deflection angle from 100 degrees to 120 degrees while decreasing the center throw distance, for example, from 413mm to 313mm yields a 32% reduction in spot size at the center of the screen.

Increasing the deflection angle in these displays gives rise to increases in obliquity, which is defined as the effect of a beam intercepting the screen at an oblique angle, thereby causing an elongation of the spot. The problem of obliquity becomes especially apparent in CRTs having a standard horizontal gun orientation, i.e., a CRT whose guns have a horizontal alignment along the major axis of the screen. As obliquity increases, a spot having a generally circular shape at the center of the screen becomes oblong or elongated as the spot moves toward edges of the screen. Based on this geometrical relationship, in a large aspect ratio screen, such as a 16 x 9 screen, the spot appears most elongated at the edges of the major axis and at the screen corners. Thus it becomes apparent that the obliquity effect causes the spot size to grow. The following equation defines the spot size radius SS_radi_ai: SSra_diβi = SS,,_orm!,i/cos(A) (Equation 2) where A represents deflection angle, as measured from Dc to De as shown in Figure 1 and nominal spot size SS,,_Or_mai represents the spot size without obliquity.

In addition to the obliquity effect, yoke deflection effects in self-converging CRTs having a horizontal gun orientation can compromises spot shape uniformity. To achieve self convergence, CRT's typically include a horizontal yoke that generates a pincushion shaped field and a vertical yoke that generates a barrel shaped field. These yoke fields cause the spot shape to become elongated. This elongation adds to the obliquity effect by further increasing spot distortion at the three-o'clock and nine o'clock positions (referred to as the "3/9" positions) and at corner positions on the screen.

Various attempts have been made to address spot distortion and obliquity. For example, U.S. Patent No. 5, 170,102 describes a CRT with a vertical electron gun orientation whose un- deflected beams appear parallel to the short axis of the display screen. The deflection system described in this patent includes a signal generator for causing scanning of the display screen in a raster-scan fashion, thereby yielding a plurality of lines oriented along the short axis of the display screen. The deflection system also comprises a first set of coils for generating a substantially pincushion-shaped deflection field for deflecting the beams in the direction of the short axis of the display screen. A second set of coils generates a substantially barrel shaped deflection field for deflecting the beams in the direction in the long axis of the display screen. The deflection system's coils generally distort spots by elongating them vertically. This vertical elongation compensates for obliquity effects, thereby reducing spot distortion at the 3/9 and corner positions on the screen. The barrel shaped field required to achieve self convergence at 3/9 screen locations overcompensates for obliquity and vertically elongates the spot at the 3/9 and corner locations as shown in Figure 10 of the U.S. Patent No. 5, 170,102. (In effect, the barrel shaped field overcompensates, thus making the spot shape at the 3/9 position and the screen corners a vertically oriented ellipse). Orienting the electron guns along the vertical or minor axis will yield improvements in a self-converging system, but spot distortion remains problematic at the 3/9 positions and at the corner screen locations.

Thus, a need exists for a CRT system that overcomes the aforementioned disadvantages when increasing the deflection angle A and thereby reducing throw distance and thus the overall depth of the CRT. More specifically, the reduction in throw arm distance reduces the beam spread, thereby resulting in a smaller center spot. Furthermore wide angle deflection increases the center-to-center spot growth due to increase inclination angles of the beam in the corners of the display screen. However, the shortened throw arm provided compensation, and the absolute spot size at 3/9 and the corners of the standard scan tubes (CRTs) match that of the transposed scan display device of the present principles.

SUMMARY OF THE INVENTION

Briefly, in accordance with a preferred embodiment of the present principles, there is provided a video display system that comprises a cathode ray tube having a picture display area. The display system includes a deflection system for the cathode ray tube to provide line rate scanning in a vertical direction.

A video signal processing system serves to transpose video signals supplied to the deflection system. The display system includes a silicon based system that has customizable waveforms that control one or more parameters of the transposed scan display electronics.

In accordance with an embodiment of the present principles, the method for controlling a transposed scan cathode rate tube (CRT) display using customized waveforms includes monitoring the presence of fast sync pulses at an input, and generating customized waveforms for at least one of a quad coil driver circuit or a N-S pin cushion modulator circuit when a fast scan sync pulse is present.

The generating customized waveforms further includes setting a quad output value corresponding to a quad counter address when a fast scan sync pulse is present at the input, setting a N-S pin cushion output value corresponding to a N-S pin cushion counter address when a fast scan sync pulse is present at the input, outputting the quad output value to a quad coil driver circuit, and outputting the N-S pin cushion output value to a N-S pin modulator circuit. The outputting steps further include D/A converting the output values fed to the quad driver and N-S pin cushion modulator.

In accordance with a preferred embodiment of the present principles, the quad output value and the N-S pin cushion output value are low level analog signals in a range of 0 to 2.4V. In another embodiment, the outputting includes outputting at least two values for each fast scan line of the transposed scan display.

The setting of the quad output value further comprise looking up a value in a stored look up tables corresponding to the quad counter address. The setting a N-S pin cushion output value further includes looking up a value in a stored look up tables corresponding to the N-S pin cushion counter address.

In further embodiments, the presence of slow sync pulses is monitored, and a slow sync pulse flag is set when the slow sync pulse is present at the input. When the slow scan sync flag is set, the N-S pin cushion counter address is reset, the quad counter address is reset, and the slow sync flag is reset. A sync timer is also reset in response to the presence of the slow scan sync flag.

The sync timer is monitored and the high voltage to the transposed scan display is disabled with there is a sync timer overflow.

In accordance with yet a further embodiment of the present principles, the method for controlling a transposed scan display using customized waveforms includes monitoring the presence of fast sync pulses at an input, setting a quad output value corresponding to a quad counter address when a fast scan sync pulse is present at the input, the quad output value being a low level analog signal in a range of 0 to 2.4V, setting a N-S pin cushion output value corresponding to a N-S pin cushion counter address when a fast scan sync pulse is present at the input, outputting the quad output value to a quad coil driver circuit, and outputting the N-S pin In another embodiment of the present principles, the method for controlling a transposed scan display using customized waveforms includes monitoring the presence of fast sync pulses at an input, setting a quad output value corresponding to a quad counter address when a fast scan sync pulse is present at the input, setting a N-S pin cushion output value corresponding to a N-S pin cushion counter address when a fast scan sync pulse is present at the input, said N-S pin cushion output value being a low level analog signal in a range of 0 to 2.4V, outputting the quad output value to a quad coil driver circuit; and outputting the N-S pin cushion output value to a N- S pin modulator circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will now be described by way of example with reference to the accompanying figures, wherein like reference numerals depict similar elements throughout the views:

Figure 1 is a diagram depicting the basic geometrical relationship between the throw distance and deflection angle in a typical CRT;

Figure 2a is a diagrammatic cross-sectional view of a CRT according to a preferred embodiment of the present principles; Figure 2b is a diagram representing the lines and pixels of a standard scan CRT;

Figure 2c is a diagram representing the lines and pixels of the transposed scan display according to an embodiment of the present principles;

Figure 3 is a diagram of the screen of the CRT of Figure 2 illustrating a mis-convergence pattern in accordance with the present principles; Figure 4 is a diagram depicting optimization of spot shape in accordance with the present principles;

Figure 5 is a block diagram of the transposed scan display system incorporating the transposed scan display control using customizable waveforms of the present principles;

Figures 6a-6c are illustrative schematic diagrams of the video/deflection system having the customizable waveforms of the present principles;

Figure 6d is an illustrative schematic diagram of the anode power supply and dynamic focus output circuits according to an embodiment of the present principles;

Figure 7a is an illustrative schematic diagram of an oscillator circuit within the anode power supply according to an embodiment of the present principles;

Figure 7b is an illustrative schematic diagram of a high voltage regulator circuit within the anode power supply according to an embodiment of the present principles;

Figure 7c is an illustrative schematic diagram of a drive circuit within the anode power supply according to an embodiment of the present principles;

Figure 7d is an illustrative schematic diagram of the high voltage output circuit of the anode power supply according to an embodiment of the present principles;

Figure 8 is a schematic diagram of the N-S pin modulator of the fast scan circuit according to an embodiment of the present principles; Figure 9 is a schematic diagram of the driver portion for the fast scan circuit according to an embodiment of the present principles;

Figure 10 is a schematic diagram of the output stage of the fast scan circuit according to an embodiment of the present principles;

Figure 11 is graphical representation of a custom correction waveform for the fast scan circuit according to an embodiment of the present principles;

Figure 12 is an illustrative schematic diagram of the quad coil circuit according to an embodiment of the present principles; and

Figure 13 is a flow diagram of the interrupt handling method enabling the transposed scan display microprocessor to control the same using customizable waveforms according to an embodiment of the present invention. DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Prior to discussing the CRT display system of the present principles, a brief discussion of the facets of a typical cathode ray tube will prove helpful. Figure 2a illustrates a cathode ray tube (CRT) 1, for example a W76 wide screen tube, having a glass envelope 2 having a rectangular faceplate panel 3 and a tubular neck 4 connected by a funnel 5. The funnel 5 has an internal conductive coating (not shown) that extends from an anode button 6 toward the faceplate panel 3 and to the neck 4. The faceplate panel 3 comprises a viewing faceplate 8 and a peripheral flange or sidewall 9, which is sealed to the funnel 5 by a glass frit 7. The inner surface of the faceplate panel 3 carries a three-color phosphor screen 12. The screen 12 comprises a line screen with the phosphor lines arranged in triads. Each triad includes a phosphor line of three primary colors, typically Red, Green and Blue, and extends generally parallel to the major axis of the screen 12.

A mask assembly 10 lies in a predetermined spaced relation with the screen 12. The mask assembly 10 has a multiplicity of elongated slits extending generally parallel to the major axis of the screen 12. An electron gun assembly 13, shown schematically by dashed lines in Figure 2a, is centrally mounted within the neck 4 to generate three inline electron beams, a center beam and two side or outer beams, directed along convergent paths through the mask frame assembly 10 to strike the screen 12. The electron gun assembly 13 has three vertically oriented guns, each generating an electron beam for a separate one of the three colors, Red, Green and Blue. The three guns lie in a linear array extending parallel to a minor axis of the screen 12.

The CRT 1 employs an external magnetic deflection system comprised of a yoke 14 situated in the neighborhood of the funnel-to-neck junction. When activated with deflection currents, the yoke 14 generates magnetic fields that cause the beams to scan over the screen 12 vertically and horizontally in a rectangular raster.

Conventional video signal transmission assumes a pixel-by-pixel time sequence such that transmission of Red, Green and Blue images effectively occurs as a series of scan lines proceeding from the left edge to the right edge of the image along a scan line and then moving down to the next scan line where again the signal sequence proceeds from left to right. This process continues from top to bottom, in either a progressive scan mode or an interlaced scan mode, as is known in the art. Figure 2b shows an example of a standard orientation (scan) CRT having 720 horizontally scanned lines each having a pixel width of 1280. Those of skill in the art will recognize that the yoke 14 of the transposed scan display of the present principles includes a first deflection coil system (not shown) that generates a horizontal deflection yoke field that is substantially barrel-shaped. The yoke 14 has a second deflection coil system (not shown) electrical insulated from the first deflection coil system for generating a vertical yoke field that is substantially pin cushion shaped. These yoke fields affect beam convergence and spot shape for the transposed scan display.

To achieve a vertical scan (or transposed scan) display, the image must undergo a translation into a vertical scan pattern such that the signal sequence starts at the upper left hand corner of the image. The subsequent signal elements then follow along a vertical line from top to bottom along the left edge. After an appropriate retrace interval, generation of a signal element at the top edge of the image at the second scan line occurs, followed by the signal elements corresponding to a sequence from top to bottom along the second scan line. Similarly the third scan line starts at the top and proceeds to the bottom of the image, and thus the corresponding top to bottom signal element must be provided. This process continues through the last scan line at right vertical edge of the image.

To effect vertical scanning, the horizontal scan sequence must undergo a change from a conventional left-to-right and stepwise top-to-bottom regimen to a top-to- bottom and stepwise left to right transposed sequence. Figure 2c shows an example of the vertical scanning of the transposed scan display according to an embodiment of the present principles. As shown in this example, there are 1280 vertically scanned lines, each having a length of 720 pixels.

For the purposes of the following discussion, the terms "Digital Orthogonal Scan" and/or DOS refer to the above-described transposition operation and is used herein interchangeably with the term "transposed scan display". In accordance with one aspect of the present principles, the electron beam undergoes spot shaping. To understand spot shaping, a discussion of the yoke 14 and the effect of the yoke fields will prove helpful. As discussed, the yoke 14 lies in the neighborhood of the funnel-to- neck junction on the CRT 1 as shown in Figure 2a. In the illustrated embodiment, the yoke 14 has first deflection coil system (not shown) that generates a horizontal deflection yoke field that is substantially barrel-shaped. The yoke 14 has a second deflection coil system (not shown) electrically insulated from the first deflection coil system for generating a vertical yoke field that is substantially pincushion-shaped. These yoke fields affect beam convergence and spot shape. Rather than adjust for self-convergence, the horizontal barrel field shape associated with the first deflection system undergoes an adjustment (e.g., a reduction), to yield an optimized spot shape at the sides of the screen. The barrel shape of the yoke field attributable to the second deflection coil system undergoes a reduction. The combined effects of the barrel-shaped field and the dynamic astigmatism correction provided by the dynamic focus associated with the electron guns yields an optimized, nearly round spot shape at the 3/9 position and at the corner screen locations. The use of pincushion vertical field and a barrel horizontal field, where the barrel horizontal field is adjusted to improve spot shapes and allow some misconvergence of the electron beams along the screen edges is characterized as quasi-self-convergent deflection fields.

The field reduction that results in improved spot shape from self-convergence actually causes mis-convergence at certain locations on the screen. Figure 3 illustrates a transposed scan display screen showing the resulting misconvergence from such a reduced barrel-shaped field. For example, when the barrel field undergoes a reduction to achieve an optimized spot at the 3/9 positions and at the comer locations of the screen, the beams over-converge at the sides of the screen. Over-convergence as used here refers to a condition that results from the red and blue beams crossing over each other prior to striking the screen. The amount of over-convergence varies as a function beam deflection. Thus, the resultant pattern appears converged at the center of the screen while appearing mis-converged at the sides of the screen. Assuming the electron gun assembly 13 of Figure 2a has its red, green, and guns orientated from top to bottom, the over-convergence causes the electron beams to generate a blue, green, red convergence pattern at the sides of the screen as seen in FIG. 3. The resultant over-convergence at the screen sides in this example was measured at 15 millimeters. Other CRT designs having different geometries or different yoke field distributions will result in more or less over-convergence, for example, in the range of 1 to 35 millimeters.

The addition of multipole coils, such as the quadrupole coils 16 shown in Figure 2a, can correct for mis-convergence, or over-convergence that results from the yoke effect described above. In particular, positioning the quadrupole coils 16 on the gun side of the yoke 14 will dynamically correct for the yoke effect. The quadrupole coils 16 are fixed to the yoke 14 or alternatively, can be applied to the neck and have their four poles oriented at approximately 90° angles relative to each other as is known in the art. The adjacent poles of the coils 16 have

alternating polarity and the orientation of their poles lies at 45° from the tube axes so that the

resultant magnetic field displaces the outer (red and blue) beams in a vertical direction to provide correction for the mis-convergence pattern shown in Figure 3. Alternatively, the quadrupole coils 16 can lie behind the yoke 14 approximately at or near the dynamic astigmatism correction point of the guns of the electron gun assembly 13.

Operating under dynamic control, the quadrupole coils 16 create a correction field for adjusting mis-covergence on the screen. The quadrupole coils 16 in this embodiment are driven in synchronism with the horizontal deflection. The signal driving the quadrupole coils 16 has a magnitude selected to correct over-convergence described above. In an illustrated embodiment, the quadrupole coil signal has a waveform is customizable and generally has a shape that approximates a parabola.

The electron gun assembly 13 of the CRT 1 has electrostatic dynamic focus astigmatism correction to achieve optimum focus in both the horizontal and vertical directions of each of the three beams. This electrostatic dynamic astigmatism correction occurs separately for each beam, thereby allowing for correction of the horizoiital-to-vertical focus voltage differences without affecting convergence. Although the quadrupole coils 16 affect beam focus, their location near the dynamic astigmatism point of the guns of the electron gun assembly 13 allows for correction of this effect by adjusting the electrostatic dynamic astigmatism voltage so that there is a minimal effect on the spot. This enables correction of mis-convergence at selected locations on the screen without affecting the spot shape. Advantageously, modification of the yoke field design can optimize spot shape and the dynamically driven quadrupole coils 16 can correct for any resultant mis-convergence.

Figure 4 illustrates one quadrant of the screen of a W76 CRT with an aspect ratio of 16:9

and a 120° deflection angle and shows the improvement in spot shape and size obtained by the

design of the yoke 14 and the use of the quadrupole coils 16 as discussed above. The spots illustrated by the dotted lines represent the effects of throw distance and obliquity referenced to a round center spot. Optimized spots obtained in accordance with the present principles appear with solid lines. Significant improvements in spot size and shape appear at the sides and corners of the screen. Table 1 lists experimental results for an illustrative embodiment in accordance with the present principles, with H representing the horizontal dimension of each spot, and V representing the vertical dimension of each spot normalized to the center spot. Table 1 compares the

cumulative effect of gun orientation, yoke field effects and dynamically controlled quadrupole coils with dynamic astigmatism correction applied to traditional horizontal inline gun CRTs.

TABLE 1 The center column of Table 1 lists the spot dimensions for a prior art standard horizontal gun orientation CRT with self-convergent beams, whereas the right-hand column represents the results for a CRT with vertical gun alignment in accordance with the present principles wherein the beams undergo dynamically controlled convergence. Although spot shape suffers a slight compromise at the 6 O'clock and 12 O'clock screen positions (6/12 or otherwise as the top and bottom), spot size uniformity shows great improvement at the 3 O'clock and 9 O'clock positions (3/9 or otherwise as the side) and at the corner locations. The present technique advantageously provides more uniform spot shape across the screen, thus enhancing visual resolution. Although the invention is applicable to CRTs having deflection angles at 100 or above, the invention has particular applicability to much larger deflection angles such as systems exceeding 120 degrees. In general, CRT displays exhibit raster distortions. The most common raster distortions pertain to geometric errors and to convergence errors. A geometric error results from non- linearities in the scanned positions of the beams as the raster traverses the screen. Convergence errors occur in a CRT display when the Red, Green and Blue rasters do not align perfectly such that over some portion of the image, a Red sub-image appears offset with respect to the Green sub-image and the Blue sub-image appears offset to the right of the Green sub-image. Convergence errors of this type can occur in any direction and can appear anywhere in the displayed image. With known color CRT displays, both convergence and geometric errors can occur despite perfect alignment of the center region during the original manufacture of the CRT display, assuming that the deflection signals applied to the deflection coils ramp linearly. Traditional analog circuit techniques compensate for such distortions by modifying the deflection signals from linear ramps to more complex wave shapes. Also, adjustment in the details of the yoke design can reduce convergence errors and geometry errors. As the deflection angle increases beyond 100°, however, the traditional methods of geometry and convergence corrections become more difficult to implement. It becomes clear from the above, that when the deflection angle is increased in a transposed scan display, thereby decreasing the throw distance of the electron gun, many considerations and corrections are required in order to compensate for the negative effects on the displayed image resulting from such changes in design.

The display system of the present invention includes a video deflection system for the transposed scan CRT to provide line rate scanning in a transposed or the vertical direction. This digital orthogonal scanning (DOS) provides a fast scan in the short direction of a 16:9 format screen.

Figure 5 shows a block diagram of the transposed scan display system 100 according to an embodiment of the present principles. As shown, an input from a high definition (HD) video source 102, such as, for example from a cable, satellite, network or other service provider is provided to the display system. The high resolution source input is fed to an FPGA 110 where it is processed and then input into the video processor 116. In some instances, an RGB to YPrPb converter 104 may be required to input the Y, Pr and Pb signals to the video processor 116. In addition, content source 102 provides horizontal and vertical sync signals (H & V) which are processed by the FPGA 110 and sent to the sync processor 118.

The video processor 116 outputs the RGB video signals to the video drivers 133 which drive the electron gun of the slim transposed scan (DOS) CRT 200.

The sync processor 118 outputs several signals including synchronization signals to a waveform generator 120 embodied within the microprocessor 1 12 in order to generate the appropriate waveform for the quad coil drivers 130, and for N-S Pincushion Modulator 124. In other contemplated embodiments, the waveform generator can be incorporated into the FPGA 1 10 and thus be eliminated from the microprocessor the circuit shown in Figure 3. The sync processor 1 18 is responsible for handling the synchronization of the output signals to the transposed scan (DOS) CRT 200. As such, it is responsible for the fast scan (V Drive) and slow scan (H Drive) signals input to the V scan 128 and H scan 126 circuits, respectively. Sync processor 1 18 also provides control signals to the focus modulation generator 120, which controls the dynamic focus output 121 connected to the anode power supply 134. In accordance with one embodiment, the video processor 116 may include OSD insertion

1 17 capabilities. In other contemplated embodiments, the OSD may be integrated into video processor 116, or the microprocessor 112, or the FPGA 110 without departing from the spirit of the present disclosure. Those of skill in the art will recognize that many of the components shown in the block diagram of Figure 5 can be embodied in an application specific integrated circuit (ASIC) or other specialized integrated circuit without departing from the spirit of the present principles. Examples of such circuits that could be embodied in one or more ASICS would be, FPGA 110, Microprocessor 112, RGB to YPrPb converter 104, sync processor 118, video processor 116 and/or focus modulation generator 120.

Microprocessor 112 functions to control the video processor 116, the OSD 117, the FPGA 110, and the SW mode power supply 113. An IR pickup 114/ keyboard or other user interface device may be connected to the microprocessor for providing remote control capability to the system 100.

The Anode power supply outputs the heater voltage and G2, G3 and G5 voltages to the appropriate pins (not shown) of the electron gun 13. In addition, it provides a 3OkV anode voltage to the transposed scan CRT 200. The quad drivers 130 drive the quad coils 16 of the CRT, and the V scan 128 and H scan 126 circuits drive the yoke 14. The video drivers 133 provide the video signals to the electron gun for display on the CRT 200. The fast scan sync waveform generated by the V scan circuit 128, is used by: the sync processor 1 18 for phase correction; the video processor 116 to generate blanking; the SW mode power supply 113 for synchronization and the anode power supply 134 for synchronization.

The present principles provide a method for controlling the display of a transposed scan (DOS) CRT using customizable waveforms for North/South Pincushion, vertical scan amplitude and for current into the quad coils 16. In addition, the customized waveforms are synchronized with the scanned video information. For North/South Pincushion and current into the quad coils, both waveforms are synchronized with the scanned video information. The customized signal for the vertical scan size is generated but does not need to be synchronized with the scanned video information. Other possibilities for customized waveforms that are not presently implemented include various forms of magnetic compensation and/or purity control.

Figures 6a-6d show exemplary schematic circuit diagrams blocked according to the block diagram of Figure 5. The details of the inter-workings of some of these circuits is described below with reference to the schematic diagrams shown in Figures 7-9.

Figure 6c shows the fast scan circuit 128 according to an embodiment of the present principles. The fast scan circuit 128 is made up of a V scan driver circuit 600 and an output stage 700.

The V scan driver circuit 600 is connected to the sync processor 118 to receive the V drive signals according to the transposed V sync from FPGA 110. The output 612 of the driver circuit is coupled to the corresponding input 712 on the output circuit 700.

According to one embodiment of the present principles, the high frequency scan rate for the transposed scan display is 41.25 KHz. As shown in Figure 5, the V (fast) scan circuit 128 receives pin cushion correction waveform signals from the N-S pin modulator 124 (depicted as "modulated B+")- The N-S pin modulator 124 is connected to the microprocessor 1 12, and includes a supply voltage B+. The microprocessor 1 12 provides the N-S pin modulator 124 with a custom waveform signal to assist in producing the pin cushion correction wave form, modulated B+. The modulated B+ signal is applied to the output stage 700 of the V scan circuit 128 to correct the yoke current according to the required N-S pin cushion correction for the transposed (vertical) scan display according of the present principles.

Referring now to the circuit examples of Figure 8-10, Figure 8 shows the N-S Pin Modulator 124 which works in conjunction with the Vertical (fast) scan circuit 128. The N-S Pin modulator 124 operates as an amplifier effectively providing an output that functions to adjust the amplitude of the V Scan. Circuit 124 includes a height adjustment input 501, a customized waveform input 502, a B+ supply voltage, and a B+ modulated output 510. The microprocessor 112 provides a customized waveform signal to the input 502 for purposes of modulating the B+ signal that is applied to the Vertical scan output. Figure 11 shows a graphical representation of the B+ supply signal 810, and the customized waveform 802 provided by microprocessor 112. The microprocessor 112 can provide the height adjustment input 501 to the N-S pin modulator 124 in any suitable known manner in an analog form. The height adjustment, as discussed herein, is the DC level of the correction waveform 502 applied to the B+ supply voltage waveform. By way of example, the microprocessor 112 can provide a DC height adjustment signal in the range of 0 to 4.8V through the OSD device (e.g., LM1257) and utilize the D/ A converter contained therein for the output of this height adjustment signal.

The height adjustment signal is combined (summed) with the customized correction waveform 802 (Figure 1 1). This correction waveform is used to control the B+ supply voltage to provide the modulated B+ waveform. The modulated B+ output 510 is fed into the output circuit 700 at input 710.

When applying the modulated B+ to the output circuit 700, consideration must be made to prevent ringing that may be caused by that waveform. Referring to Figure 10 and output circuit 700, the inductance value of LTlOl is selected along with the values of LClOl and LRl 11 (See Figure 5) in order to minimize ringing in the modulated B+ waveform. By way of example, LTlOl can be 500μH, while LClOl is 2.2 μF and LRl 11 is 22 ohms.

Figure 6d shows the anode power supply 134 and the dynamic focus output circuit 121. According to one aspect of the present principles, anode power supply 134 includes several circuits 650, 660, 670 and 680, which are now described with reference to Figures 7a-7d. Figure 7a shows an exemplary circuit diagram of an oscillator circuit 650 according to an embodiment of the present principles. This oscillator circuit 650 functions to maintain the phase control of the anode power supply by allowing the retrace pulse to be set so as to phase it with respect to the scan. The oscillator 650 also functions to: 1) provides a reference +5 volt supply at output 710A to the regulator circuit 660 at input 710B (Figure 7b); and 2) provides an output signal through output 720A to input 720D of the high voltage circuit 680 (Figure 7d) to prevent failures of the circuit, and more particularly to prevent failure in the operating transistor LQ610 in the high voltage circuit 680.

Figure 7b shows an exemplary circuit diagram of the high voltage regulator circuit 660 according to an embodiment of the present principles. The regulator circuit 660 outputs a High voltage supply voltage HVB+ at output 730B to the input 730D of the high voltage circuit 680 (Figure 7d).

Figure 7c shows an exemplary circuit diagram of the drive circuit 670 within the anode power supply according to an embodiment of the present principles. Drive circuit 670 provides the drive voltage and waveform to the drive transformed in the high voltage circuit 680. The drive circuit 670 receives the high voltage drive signal (HVDRV) at from the oscillator circuit 650. The HVDRV signal is applied at input 750D for the drive circuit 670. The driver circuit outputs the HVDRV signal at output 740C, where it is input to the high voltage circuit at input 740D (Figure Id).

Figure 7d shows an exemplary circuit diagram of a high voltage output circuit 680 within the anode power supply according to an embodiment of the present principles.

Figure 12 shows an exemplary circuit diagram of the quad coil driver circuit 130 according to an embodiment of the present principles. Since the quad coils 16 require high currents to be driven, the microprocessor 112 is not sufficient to drive the same. As such, the quad coil driver circuit 130 includes an audio amplifier (e.g., TDA2052) to provide the higher currents. The circuit 130 receives a low level input voltage signal from microprocessor 112, which is input to the TDA 2052 at the tied together inputs at pins 5 and 7. The circuit 130 functions as an amplifier to convert the low level signal from the microprocessor 112 to the current required to properly drive the quad coil 16. In the present implementation, circuit 130 converts IV at the input to IA at the output. Other implementations are possible to meet the requirements of the specific silicon generator and quad coils used.

Referring to Figure 5, the FPGA 110 converts an incoming video signal from source 102 to a 128Oi format. The sync signals from the FPGA go to the video processor 1 16 and the sync processor 1 18. Although Figure 5 shows the fast and slow scan sync signals input into the sync processor 1 18, those of skill in the art will recognize that these sync signals are input into the video processor 1 16, and the appropriate synchronizing signals from the video processor 116 are the basis for the timing of the customizable waveforms of the present principles. Those of skill will also recognize that appropriate timing signals could come from other circuit elements in the display.

The microprocessor 112 receives the fast scan sync from the clamp pulse output of the video processor 116 which is only present when there is a fast scan available from the V scan output, and the slow scan sync from the VP_out of the video processor 116, which is only present when slow scan is active. It is through this mechanism, as shown and now described in Figure 13, that the microprocessor 112 controls and generates the customized waveform outputs to control the display electronics. The output level from the microprocessor 112 of each waveform (i.e., quad coil, N-S pin cushion) is a low level analog signal 0 to 2.4V resulting from the D/ A conversion.

Figure 13 is a flow diagram of the interrupt handling method 1000 of the microprocessor 112 according to an embodiment of the present principles.

According to this embodiment, the "customized" aspect of the waveforms is based on the fast scan and slow scan sync signals received by the microprocessor 112. The slow scan input 1002 is monitored to determine 1004 the presence of a slow sync pulse. When a slow sync pulse is sensed at the input, a slow sync flag is set 1006 and the routine ends 1008. Those of skill in the art recognize that the routine returns to the beginning to set the next flag at the next slow sync pulse. At the fast sync input 1010, it is determined when a fast sync pulse is present 1012.

When the fast sync pulse is present, the microprocessor 1 12 uses the quad counter address to obtain the quad output value from the look up table. The quad output is set to the looked up value, and that value is sent to a D/A output to generate the current value (i.e., the time appropriate value of the customized waveform) by driving quad drivers 130 and thereby quad coil 16.

Once the quad output value is set 1014, the quad counter address is incremented 1016 and the N-S pin ouput value is set to the value corresponding to the pin counter address 1018. As with the quad coil, microprocessor 112 uses the pin counter address to obtain the N-S pin output value from the look up table. The N-S pin output value is sent to the D/A converter to generate the current value driving the N-S pin cushion modulator 124. The pin counter address is then incremented 1020. After a short time delay 1022, the quad output is set 1024 to the value in the look up table corresponding to the quad counter address. The quad counter address is then incremented 1026. In this implementation, two values are output for each fast scan line. In alternate implementations, more than two values, or even many more than two values could be output during each fast scan line to form a fast scan rate waveform. This fast scan rate waveform could be different for each fast scan line during a given slow scan as needed by the performance of the display.

At this point in the process it is determined 1028 whether a slow sync flag has been set. When a slow sync flag is set, the N-S pin counter address is reset 1030, the quad counter address is reset 1032 and the slow sync flag is reset 1034. At this point, the Sync timer is reset 1036 and the routine ends 1038.

When the slow sync flag is not set 1028, the routine skips steps 1030, 1032 and 1034 and proceeds to reset the sync timer 1036. The sync timer includes a timer overflow 1040 for safeguarding the CRT from high voltages when the fast scan is lost. In the present embodiment, the time interval for the sync timer is equal to two (2) fast pulses + Δ, where Δ represents a tolerance in the timing interval. This tolerance can be, for example, 10%. When the time interval of the sync timer is exceeded, the sync timer overflow 1040 is triggered and the high voltage to the CRT is disabled 1042. The routine then ends 1044.

While there have been shown, described and pointed out fundamental novel features of the invention as applied to preferred embodiments thereof, it will be understood that various omissions, substitutions and changes in the form and details of the methods described and devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements and/or method steps which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements and/or method steps shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed, described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.

Claims

1. A method for controlling a transposed scan cathode rate tube (CRT) display using customized waveforms, the method comprising the steps of: monitoring (1012) the presence of fast sync pulses at an input; and generating (1014, 1018) customized waveforms for at least one of a quad coil driver circuit (130) or a N-S pin cushion modulator circuit (124) when a fast scan sync pulse is present.

2. The method according to claim 1, wherein said generating further comprises: setting a quad output value (1014) corresponding to a quad counter address when a fast scan sync pulse is present at the input; setting a N-S pin cushion output value (1018) corresponding to a N-S pin cushion counter address when a fast scan sync pulse is present at the input; outputting the quad output value to a quad coil driver circuit (130); and outputting the N-S pin cushion output value to a N-S pin modulator circuit (124).

3. The method according to claim 1, further comprising: monitoring (1004) the presence of slow sync pulses at an input; and setting a slow sync pulse flag (1006) when a slow sync pulse is present at the input.

4. The method according to claim 1, wherein said outputting steps further comprise D/ A converting the output values fed to the quad driver (130) and N-S pin cushion modulator (124).

5. The method according to claim 1 , further comprising incrementing said quad counter address (1016) after said step of setting the quad output value.

6. The method according to claim 1 , further comprising incrementing said N-S pin counter address (1020) is after said step of setting the N-S pin cushion output value.

7. The method according to claim 1, wherein said step of setting a quad output value (1014) further comprises looking up a value in a stored look up tables corresponding to the quad counter address.

8. The method according to claim 1, wherein said step of setting a N-S pin cushion output value (1018) further comprises looking up a value in a stored look up tables corresponding to the N-S pin cushion counter address.

9. The method according to claim 2, further comprising the steps of: resetting the N-S pin cushion counter address (1030) when the slow scan sync flag is set; resetting the quad counter address (1032) when the slow scan sync flag is set; and resetting the slow sync flag (1034) when the slow scan sync flag is set.

10. The method according to claim 8, further comprising the step of resetting a sync timer

(1036).

11. The method according to claim 1, further comprising: monitoring a sync timer (1040); and disabling high voltage (1042) to the transposed scan display when a sync timer overflow is present.

12. The method according to claim 3, wherein said quad output value and said N-S pin cushion output value comprise low level analog signals in a range of 0 to 2.4V.

13. The method according to claim 2, wherein said outputting comprises outputting at least two values for each fast scan line of the transposed scan display.

14. A method for controlling a transposed scan display using customized waveforms, the method comprising the steps of: monitoring (1012) the presence of fast sync pulses at an input; setting a quad output value (1014) corresponding to a quad counter address when a fast scan sync pulse is present at the input, said quad output value being a low level analog signal in a range of O to 2.4V; setting a N-S pin cushion output value (1018) corresponding to a N-S pin cushion counter address when a fast scan sync pulse is present at the input; outputting the quad output value to a quad coil driver circuit (130); and outputting the N-S pin cushion output value to a N-S pin modulator circuit (124).

15. The method according to claim 14, further comprising: monitoring (1004) the presence of slow sync pulses at an input; and setting a slow sync pulse flag (1006) when a slow sync pulse is present at the input.

16. The method according to claim 15, further comprising the steps of: resetting the N-S pin cushion counter address (1030) when the slow scan sync flag is set; resetting the quad counter address (1032) when the slow scan sync flag is set; and resetting the slow sync flag (1034) when the slow scan sync flag is set.

17. The method according to claim 14, further comprising incrementing said quad counter address (1016) after said step of setting the quad output value.

18. The method according to claim 14, further comprising incrementing said N-S pin counter address (1020) after said step of setting the N-S pin cushion output value.

19. The method according to claim 14, further comprising: monitoring (1040) a sync timer; and disabling high voltage (1042) to the transposed scan display when a sync timer overflow is present.

20. The method according to claim 14, wherein said outputting comprises outputting at least two values for each fast scan line of the transposed scan display.

21. A method for controlling a transposed scan display using customized waveforms, the method comprising the steps of: monitoring (1012) the presence of fast sync pulses at an input; setting a quad output value (1014) corresponding to a quad counter address when a fast scan sync pulse is present at the input; setting a N-S pin cushion output value (1018) corresponding to a N-S pin cushion counter address when a fast scan sync pulse is present at the input, said N-S pin cushion output value being a low level analog signal in a range of 0 to 2.4V; outputting the quad output value to a quad coil driver circuit (130); and outputting the N-S pin cushion output value to a N-S pin modulator circuit (124).

22. The method according to claim 21, further comprising: monitoring (1004) the presence of slow sync pulses at an input; and setting a slow sync pulse flag (1006) when a slow sync pulse is present at the input.

23. The method according to claim 22, further comprising the steps of: resetting the N-S pin cushion counter address (1030) when the slow scan sync flag is set; resetting the quad counter address (1032) when the slow scan sync flag is set; and resetting the slow sync flag (1034) when the slow scan sync flag is set.

24. The method according to claim 21, further comprising incrementing said quad counter address (1016) after said step of setting the quad output value.

25. The method according to claim 21, further comprising incrementing said N-S pin counter address (1020) is after said step of setting the N-S pin cushion output value.

26. The method according to claim 21, wherein said outputting comprises outputting at least two values for each fast scan line of the transposed scan display.