WO2006061812A3 - A digital frequency synthesiser and a method for producing a frequency sweep - Google Patents

A digital frequency synthesiser and a method for producing a frequency sweep Download PDF

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Publication number
WO2006061812A3
WO2006061812A3 PCT/IE2005/000142 IE2005000142W WO2006061812A3 WO 2006061812 A3 WO2006061812 A3 WO 2006061812A3 IE 2005000142 W IE2005000142 W IE 2005000142W WO 2006061812 A3 WO2006061812 A3 WO 2006061812A3
Authority
WO
WIPO (PCT)
Prior art keywords
frequency
synthesiser
digital
output signal
swept
Prior art date
Application number
PCT/IE2005/000142
Other languages
French (fr)
Other versions
WO2006061812A2 (en
Inventor
Hans Juergen Tucholski
Original Assignee
Analog Devices Inc
Hans Juergen Tucholski
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc, Hans Juergen Tucholski filed Critical Analog Devices Inc
Priority to DE602005014888T priority Critical patent/DE602005014888D1/en
Priority to CN2005800421828A priority patent/CN101073046B/en
Priority to AT05816065T priority patent/ATE433580T1/en
Priority to JP2007545104A priority patent/JP5015793B2/en
Priority to EP05816065A priority patent/EP1828867B1/en
Publication of WO2006061812A2 publication Critical patent/WO2006061812A2/en
Publication of WO2006061812A3 publication Critical patent/WO2006061812A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/08Clock generators with changeable or programmable clock frequency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02Digital function generators
    • G06F1/03Digital function generators working, at least partly, by table look-up
    • G06F1/0321Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
    • G06F1/0328Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers in which the phase increment is adjustable, e.g. by using an adder-accumulator
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A single chip digital frequency synthesiser (1) for synthesising a frequency swept synthesised output signal of a selectable frequency sweep comprises a direct digital synthesiser (5) which produces the frequency swept synthesised output signal on an output terminal (7) in response to values of a frequency control digital word applied to a frequency control input (8) thereof by an on-chip data processing circuit (25). An on-chip programmable data storing circuit (12) is programmable to store data indicative of a selected mode in which the digital frequency synthesiser (1) is to operate, and to store data indicative of selectable frequency and the time domains of the frequency swept synthesised output signal to be produced. The data processing circuit (25) reads the mode of operation and the frequency domain data and if appropriate the time domain data of a frequency swept synthesised output signal to be produced by the digital frequency synthesiser (1) from the data storing circuit (12), and computes the values of the frequency control digital word and the sequence in which the values of the frequency control digital word are to be applied to the direct digital synthesiser (5). Depending on the mode of operation, the data processing circuit (25) determines the rate at which the values of the frequency control digital word are to be applied to the direct digital synthesiser (5) in response to a logic control signal applied to a control terminal (20) or as a function of a number of clock cycles of a system clock signal applied on a system clock terminal (10) or a number of cycles of the frequency swept synthesised output signal. The frequency swept synthesised output signal may also be produced in frequency bursts.
PCT/IE2005/000142 2004-12-10 2005-12-09 A digital frequency synthesiser and a method for producing a frequency sweep WO2006061812A2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE602005014888T DE602005014888D1 (en) 2004-12-10 2005-12-09 Digital frequency synthesizer and method for producing a frequency sweep
CN2005800421828A CN101073046B (en) 2004-12-10 2005-12-09 A digital frequency synthesiser and a method for producing a frequency sweep
AT05816065T ATE433580T1 (en) 2004-12-10 2005-12-09 DIGITAL FREQUENCY SYNTHESIZER AND METHOD FOR GENERATING A FREQUENCY SWEEP
JP2007545104A JP5015793B2 (en) 2004-12-10 2005-12-09 Digital frequency synthesizer and method for generating a frequency sweep
EP05816065A EP1828867B1 (en) 2004-12-10 2005-12-09 A digital frequency synthesiser and a method for producing a frequency sweep

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US63518404P 2004-12-10 2004-12-10
US60/635,184 2004-12-10

Publications (2)

Publication Number Publication Date
WO2006061812A2 WO2006061812A2 (en) 2006-06-15
WO2006061812A3 true WO2006061812A3 (en) 2006-08-31

Family

ID=36481408

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IE2005/000142 WO2006061812A2 (en) 2004-12-10 2005-12-09 A digital frequency synthesiser and a method for producing a frequency sweep

Country Status (8)

Country Link
US (1) US7365608B2 (en)
EP (1) EP1828867B1 (en)
JP (1) JP5015793B2 (en)
CN (1) CN101073046B (en)
AT (1) ATE433580T1 (en)
DE (1) DE602005014888D1 (en)
TW (1) TWI365609B (en)
WO (1) WO2006061812A2 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7417510B2 (en) * 2006-09-28 2008-08-26 Silicon Laboratories Inc. Direct digital interpolative synthesis
US7764134B2 (en) * 2007-06-14 2010-07-27 Silicon Laboratories Inc. Fractional divider
US7800451B2 (en) * 2008-08-20 2010-09-21 Silicon Laboratories Inc. Frequency adjustment for clock generator
JP2011151532A (en) * 2010-01-20 2011-08-04 Nippon Dempa Kogyo Co Ltd Frequency generator
US8248175B2 (en) 2010-12-30 2012-08-21 Silicon Laboratories Inc. Oscillator with external voltage control and interpolative divider in the output path
EP2917901B1 (en) * 2012-11-07 2017-04-12 Gentex Corporation Frequency shifting method for universal transmitters
CN104935258B (en) * 2014-03-18 2019-08-13 苏州普源精电科技有限公司 A kind of swept signal generator can produce multiple frequency markings
CN104320087B (en) * 2014-10-13 2017-05-24 中国电子科技集团公司第四十一研究所 High-speed digital frequency scanning method
DE102015103942A1 (en) 2015-03-17 2016-09-22 Infineon Technologies Ag Frequency ramp generation

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331293A (en) * 1992-09-02 1994-07-19 Motorola, Inc. Compensated digital frequency synthesizer
US6066967A (en) * 1997-02-07 2000-05-23 Sensytech, Inc. Phase-coherent frequency synthesis with a DDS circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2010032A (en) 1977-12-15 1979-06-20 Honeywell Inc Waveform generator
US5379001A (en) * 1993-10-25 1995-01-03 Alliant Techsystems Inc. Closed loop linearizer for ramp modulated VCO
US6252464B1 (en) * 1999-10-06 2001-06-26 Cubic Defense Systems, Inc. Numerically-controlled nyquist-boundary hopping frequency synthesizer
CN1260893C (en) * 2003-10-31 2006-06-21 清华大学 Integrated radio frequency phase locked loop type frequency synthesizer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5331293A (en) * 1992-09-02 1994-07-19 Motorola, Inc. Compensated digital frequency synthesizer
US6066967A (en) * 1997-02-07 2000-05-23 Sensytech, Inc. Phase-coherent frequency synthesis with a DDS circuit

Also Published As

Publication number Publication date
JP2008523694A (en) 2008-07-03
EP1828867A2 (en) 2007-09-05
ATE433580T1 (en) 2009-06-15
TWI365609B (en) 2012-06-01
JP5015793B2 (en) 2012-08-29
US20060139102A1 (en) 2006-06-29
EP1828867B1 (en) 2009-06-10
TW200635230A (en) 2006-10-01
CN101073046B (en) 2010-05-12
WO2006061812A2 (en) 2006-06-15
DE602005014888D1 (en) 2009-07-23
US7365608B2 (en) 2008-04-29
CN101073046A (en) 2007-11-14

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