WO2006061739A2

WO2006061739A2 - Driving a bi-stable display

Info

Publication number: WO2006061739A2
Application number: PCT/IB2005/053982
Authority: WO
Inventors: Mark T. Johnson; Roel Van Woudenberg; Fransiscus J. Vossen; Ramon P. Van Gorkom
Original assignee: Koninklijke Philips Electronics N.V.
Priority date: 2004-12-06
Filing date: 2005-11-30
Publication date: 2006-06-15
Also published as: TW200638307A; WO2006061739A3

Abstract

A driver (2, 3, 4) for an active matrix display (1) comprises pixels (5) of a bi-stable material arranged at intersections of select lines (20) and data lines (30) between first electrodes (40) and a second electrodes (50) for receiving a pixel voltage (VP). The driver (2, 3, 4) comprises a select driver (2) which supplies select voltages (VS) to the select lines (20) to select a selected line of the pixels (5) during a line select period (TL). A data driver (3) supplies data signals (DA) to the selected line of pixels (5). A switch circuit (S) selectively couples the data signals (DA) to the associated first electrodes (40) of the selected line of pixels (5). And a controller (4) controls the switch circuit (S): (i) during a first period in time (Tl) to select, of the selected line of pixels (5), first selected pixels which should receive the pixel voltage (VP) within a first range for changing their optical state, and (ii) during a second period in time (T2) to select, of the selected line of pixels (5), second selected pixels which should receive the pixel voltage (VP) within a second range different than the first range for changing their optical state.

Description

Driving a bi- stable display

The invention relates to a driver for an active matrix display comprising pixels of a bi- stable material, a display device comprising such a driver, a display apparatus comprising the display device, a method of driving such an active matrix display, an active matrix display, a data driver for use in the driver, and a controller for use in the driver.

An electrophoretic display is known from WO99/53373. This patent application discloses an electronic ink display (further also referred to as E-ink display) which comprises two substrates. One substrate is transparent, the other substrate is provided with electrodes arranged in rows and columns. Display elements are associated with intersections of the row and column electrodes. Each display element comprises a pixel which is coupled to the column electrode via a main current path of a thin- film transistor (further also referred to as TFT). A gate of the TFT is coupled to the row electrode. This arrangement of pixels, TFT's and row and column electrodes jointly forms an array of display elements called an active matrix display device.

Each pixel is arranged between a pixel electrode and a common electrode. The pixel electrode is the electrode of the display element which is connected via the TFT to the column electrodes. The common electrode is present on the transparent substrate opposite the substrate which comprises the row and column electrodes. During an image update or image refresh period, a row driver is controlled to select all the rows of display elements one by one, and the column driver is controlled to supply data signals in parallel to the selected row of display elements via the column electrodes and the TFT's. The data signals correspond to image data to be displayed on the matrix display device.

In an E-ink display, the pixel comprises an electronic ink which is thus sandwiched between the common electrode and the pixel electrodes. The electronic ink comprises multiple microcapsules of about 10 to 50 microns. Each microcapsule comprises positively charged white particles and negatively charged black particles suspended in a fluid. When a positive voltage is applied to the pixel electrode, the positively charged white particles move to the side of the microcapsule directed to the transparent substrate, and the pixel appears white to a viewer. Simultaneously, the negatively charged black particles move to the pixel electrode at the opposite side of the microcapsule where they are hidden from the viewer. By applying a negative voltage to the pixel electrode, the black particles move to the common electrode at the side of the microcapsule directed to the transparent substrate, and the pixel appears dark to a viewer. When the electric field is removed, the pixel remains in the acquired state and exhibits a bi-stable character. This electronic ink display with its black and white particles is particularly useful as an electronic book.

Grey scales can be created in the display device by controlling the amount of particles that move to the common electrode at the top of the microcapsules. For example, the energy of the positive or negative electric field, defined as the product of field strength and time of application, controls the amount of particles moving to the top of the microcapsules.

It is also possible to make colour displays. For example, different coloured particles in the same or in different pixels can be used.

In order to accurately drive an E-ink based electrophoretic display, the driving voltages are selected as high as possible. In a present Si-TFT active matrix E-ink panel the driver has to be able to supply +15 V, OV and -15V. Thus, the driver has to be made in an IC-

(Integrated Circuit) process able to withstand a 30V data swing.

Each IC-process technology has its own maximum possible voltage. Currently, process limits occur at voltages in the ranges 2.5 to 5 V, 16 to 20 V and 40 to 42 V. These voltages are used for digital logic, large LCD data drivers, and large LCD row drivers, respectively. Changing to a next higher voltage technology increases the cost of the IC considerably due to higher production costs and a larger chip area.

Moreover, each process technology has its own maximum IC clock speed. As an example, an LCD data driver application in the 16-20 V process uses clock speeds in the range of 10 to 100 MHz (for example, a 400 column driver for a SXGA 1024 row panel operated at 60 Hz requires 400*1024*60 Hz). The 40-42 V process which is developed for addressing the rows of an LCD requires a speed of 10 to 100 kHz only.

Because developing an optimized IC process for another voltage range and another speed range generally takes a lot of effort and hence is expensive, it would be beneficial if the voltage demands put on the IC are lowered.

It is an object of the invention to provide a data driver for a bi-stable display which requires a lower voltage range. A first aspect of the invention provides a driver for an active matrix display comprising pixels of a bi-stable material as claimed in claim 1. A second aspect of the invention provides a display device as claimed in claim 12. A third aspect of the invention provides a display apparatus as claimed in claim 13. A fourth aspect of the invention provides a method of driving an active matrix display as claimed in claim 14. A fifth aspect of the invention provides an active matrix display as claimed in claim 15. A sixth aspect of the invention provides a data driver for use in the driver as claimed in claim 17. A seventh aspect provides a controller for use in the driver as claimed in claim 18. Advantageous embodiments are defined in the dependent claims. The driver in accordance with the first aspect drives a matrix display with display elements which comprise pixels of a bi-stable material arranged between first electrodes and second electrodes. A bi-stable display is any display where the pixels maintain their brightness level after the voltage to the pixel is removed. It has to be noted that a bistable display may have more than 2 brightness levels. The display elements and thus the pixels are arranged at intersections of select lines and data lines. A pixel voltage is supplied between the first electrodes and the second electrodes. For example, the first electrodes are the pixel electrodes and the second electrodes are common electrodes of the mentioned prior art. The common electrodes are also often referred to as the counter electrodes. Usually, the counter electrodes of all the pixels are interconnected or form a single electrode plane. The driver comprises a select driver which supplies select voltages to the select lines for selecting a selected line of the pixels during a line select period. The select lines are usually the rows of the display, but could as well be the columns. A data driver supplies data signals to the selected line of pixels. The data lines are usually the columns of the display, but could as well be the rows. Usually, during a frame period, the select lines are selected one by one, each during a line period. Alternatively, it is possible to select two or more adjacent select lines at the same time during one or more line select periods.

A switch circuit selectively couples the data signals supplied by the data driver to the associated first electrodes of the selected line of pixels. A controller controls the switch circuit to couple: (i) during a first period in time, first selected pixels of the selected line of pixels to the data driver to only supply the pixel voltage having a first voltage range to these pixels of which the optical state has to change in accordance with the first voltage range, and (ii) during a second period in time, second selected pixels of the selected line of pixels to the data driver to only supply the pixel voltage having a second voltage range different than the first voltage range to these pixels of which the optical state has to change in accordance with the second voltage range.

Thus, because during the first period in time only the first voltage range, usually having a first polarity, of the pixel voltage is required, and during the second period in time only the second voltage range, usually having a second polarity opposite to the first polarity, of the pixel voltage is required, there is no period in time anymore in which the data driver has to be able to supply both the first range and the second range. Consequently, the power supply range which the driver should be able to withstand can be smaller.

In an embodiment, the pixel voltage in the first range has a positive polarity to change the optical state of the pixel to a particular one of the two limit states, and in the pixel voltage in the second range has a negative polarity to change the optical state of the pixel to the other one of the two limit states. Usually, further a zero output voltage level is required as in the prior art data driver. Consequently, in this particular embodiment, the data driver in accordance with the invention need only be designed to withstand halve the power supply voltage of the prior art data driver.

In the now following, when the first or second polarity is mentioned, this actually is true for a display in which the bi- stable material acts symmetrically around zero volts. But, because the bi-stable material may act asymmetrically, in fact the different voltage ranges need not be symmetrically around zero volts and thus must not have opposite polarities. An example of bi-stable display which reacts asymmetrically is the bi-stable cholesteric texture liquid crystal display, which for example switches between a voltage range below 10V and another voltage range above 40V. Thus, instead of the mentioned different polarities, also different voltage ranges may be implemented.

It has to be noted that it is not required that the optical state in the first voltage range changes towards the first one of the two limit states while the optical state in the second voltage range changes towards the second one of the two limit states. For example, in the first range, the change of the optical state may be slower than in the second range to improve the accuracy of the grey scales. The optical state may then be changed to one of the limit states during a reset period, while the voltages in both the first and the second range change the optical state towards the other one of the limit states.

In an embodiment in accordance with the invention it suffices that the data driver supplies the zero output level and the positive level during the first period in time and the zero output level and the negative level during the second period in time, or the other way around. Preferably, the driver comprises a polarity switching circuit which either connects the power supply voltage with a first polarity or the second, opposite, polarity between a power supply input and a ground input of the data driver. This polarity switching circuit may be part of the data driver. For example, during the first period in time, the data driver receives a power supply voltage of +15V between its power supply input and ground input, respectively. This power supply voltage is forwarded directly to the output stages of the data driver to supply either ground level or a level of +15 volts. During the second period in time, the data driver receives the power supply voltage of -15 volts between its ground input and power supply input, respectively. Now, the output stages supply either ground level or -15 volts. The second electrodes can be kept on a fixed potential. In another embodiment, the data driver only needs to supply either only the zero output level and the positive level, or only the zero output level and the negative level while the potential of the second electrodes differs during the first periods in time and the second periods in time such that the pixels receive opposite polarity voltages during the first and the second period in time. For example, the data driver always supplies data signals with either ground level or a positive level (for example +15 V), while the second electrodes carry zero volts during the first period in time and a negative voltage (for example -15 V) during the second period in time.

In the examples above, for simplicity only, it is assumed that no voltage drops occurs across conductive transistors. In a practical implementation, the output levels will not be identical to the power supply levels. The levels mentioned are selected symmetrically, such that the negative voltage between the first and second electrodes has the same absolute value as the positive voltage during the other period in time. If the bi-stable material does not respond symmetrically to positive and negative voltages, asymmetric levels may be selected. Less optimal embodiments may reduce the power supply voltage over the data driver to less than half of that of the prior art to also improve the switching speed.

In an embodiment of the present invention, the line select period comprises the first period in time and the second period in time. Thus, during a line select period, first, during the first period in time which is a sub-period of the line period, the data driver and/or second electrodes receive power supply voltages such that the first polarity of the voltage is available for supply to pixels of the selected line which have to change their optical state towards the first limit state (for example white). Then, during the second period in time which is another sub-period of the line period, the data driver and/or second electrodes receive power supply voltages such that the second polarity of the voltage is available for supply to the pixels of the selected line which have to change their optical state towards the second limit state (for example black). Consequently, usually, the line select period in accordance with the present invention lasts longer than that of the prior art.

All lines of pixels are addressed within a frame period. In contrast to the prior art where each line of pixels is selected and the data driver is able to supply positive, negative and zero voltages, now the driver needs to supply only the zero voltage and either the positive or negative voltage. The consequence is that the pixels which have to change their optical state in one limit direction have to be provided with the suitable pixel voltage at a different time period during the line period than the pixels which have to change their optical state in the other limit direction with another suitable pixel voltage. The switching of the power supply voltage of the data driver and/or second electrodes has to be performed within the line period.

In an embodiment in accordance with the invention, the switching of the power supply voltage of the data driver and/or second electrodes is performed in the frame period. The total frame period now comprises a first frame period during which the data driver and/or second electrodes receive power supply voltages such that the first polarity of the voltage is available, and a second frame period during which the data driver and/or second electrodes receive power supply voltages such that the second polarity of the voltage is available. Usually, all the lines of pixels are selected during the first frame period and for each selected line only the pixels which have to change their optical state towards the first limit state are connected to receive the data signals. Then, all the lines of pixels are selected during the second frame period and for each selected line only the pixels which have to change their optical state towards the second limit state are connected to receive the data signals. It is not required to update all the lines, for example, if a partial update may be performed during which only the lines are updated on which the information displayed has to be changed.

The first and second electrodes may be positioned such that the bi-stable material is sandwiched between them. Alternatively, the first and second electrodes may be laterally displaced in order to create an electrical field in the plane of the substrate.

In an embodiment in accordance with the invention, the driver comprises per pixel three switches. The first switch connects the data line to the pixel of bi-stable material if this switch is closed. The status of the first switch depends on its voltage on its control input. The voltage on this control input is determined by the status of the second switch which connects the voltage on the select line of the pixel to the control input of the first transistor if a voltage on the control input of the second transistor has a suitable level. The voltage on the control input of the second transistor is determined by the state of the third switch which connects the control input of the second transistor to the data line of the pixel if the third switch is closed. The control input of the third switch receives an activate signal.

If the activate signal is active, the third switch is closed and the voltage on the data line is fed to a voltage storage element at the control input of the second switch. If the data voltage is active, the second switch is closed, if the data voltage is inactive, the second switch is open. The status of the second switch is kept due to the voltage storage element when the activate signal is deactivated and the third switch opens. Next, the select line becomes active and the data is put on the data line. However, this data only is supplied to the pixel if the second switch is closed. Thus, the data during the active activation line determines whether the pixel is connected to the data line during the active select line. The activate line may extend in the direction of the select lines. Usually, the voltage storage element is a capacitor. This capacitor may be formed by capacitances of the switches, especially if the switches are FET' s. In an embodiment in accordance with the invention the driver comprises per pixel three switches. The first switch connects the data line to the pixel if this switch is closed. The state of the first switch depends on its voltage on the control input. The voltage on the control input is determined by the state of the second switch which connects the voltage on the select line of the pixel to the control input of the first transistor if a voltage on the control input of the second transistor has a suitable level. The voltage on the control input of the second transistor is determined by the state of the third switch which connects the control input of the second transistor to the data line of the pixel if the third switch is closed. The control input of the third switch receives a select signal of an adjacent select line. The adjacent select line may be the previous or next select line of the select line associated with the pixel.

If the adjacent select line is active, the third switch is closed and the voltage on the data line is fed to a voltage storage element at the control input of the second switch. If the data voltage is active, the second switch is closed, and if the data voltage is inactive, the second switch is open. The status of the second switch is kept when the activate signal is deactivated because a voltage storage element is present at the control input of the second switch. The deactivation of the activate signal causes the third switch to open. Next, the present select line becomes active and the data is put on the data line. However, this data only is supplied to the pixel if the second switch is closed. Thus, the data signal present during the active adjacent select line determines whether the data which is put on the data line during the active present select line is or is not forwarded to the pixel. Consequently, this topology of the display element allows selecting the pixels which should be updated during the first period in time but not during the second period in time or the other way around. The term display element is used to indicate the combination of the pixel, the first to third switches and the voltage storage element which usually is a capacitor. The pixel is the part of the bi-stable material which is associated with the intersection of the data line and the present select line. This part may or may not be mechanically separated from the other pixels. Next, the adjacent select line is made active, the third switch is closed and an inactive voltage level on the data line is fed to a voltage storage element at the control input of the second switch such that the second switch is opened. The same sequence of pulses is produced during the next line select period during which the line of pixels succeeding the present line of pixels is selected. This embodiment has the advantage that no separate activation line is required.

In an embodiment in accordance with the invention, the driver comprises per pixel two switches. These switches are arranged in series between the pixel and the data line. One of the switches is controlled by the select line, the other is controlled by an activation signal. The signal on data line can only reach the pixel if both switches are closed, which is the case if both the select line and the activate line are active. It is thus possible to select with the activate line whether the data on the data line is or is not supplied to the bi-stable cell during a particular time period the line of pixels is selected. Now, the activate line has to extend in the direction of the data lines.

In an embodiment in accordance with the invention, the driver comprises per pixel three switches. The first switch and the second switch are arranged in series between the pixel and the data line. The control input of the first switch is controlled by the select line, and the control input of the second switch is connected to the data line via the third switch. A voltage storage element is present at the control input of the second switch. The control input of the third switch receives the activate signal. Again, first the activate signal is activated to close the third switch, and the data present on the data line will be stored in the capacitor. This data determines the state of the second switch. If the data is active, the second switch will be closed, if the data is inactive, the switch will be open. Then, the activate line is inactivated and the state of the data will be kept by the voltage storage element which usually is a capacitor. The capacitor may be an intrinsic capacitor of the first switch if this first switch is a FET (Field Effect Transistor). Now, the select line is activated to close the first switch. Dependent on the earlier defined state of the second switch, the data on the data line is or is not supplied to the pixel. Thus, again, it is possible to select whether the data on the data line is connected to the pixel or not. The activate line may extend in the direction of the select lines.

In an embodiment in accordance with the invention, the driver comprises per pixel two switches. The first switch is arranged between the data line and the pixel, the second switch is arranged between the control input of the first switch and the data line. The control input of the second switch is connected to the select line. A voltage storage element is present at the control input of the first switch. Usually, this voltage storage element is a capacitor. The capacitor may be an intrinsic capacitor of the first switch if this first switch is a FET. First, the select line is activated, the second switch is closed, and the data is on the data line is stored in the voltage storage element to determine the state of the first switch. Thus, if the data on the pixel has to be changed, an active data signal is written into the voltage storage element and the switch Sl is closed to receive the data put on the data lines at a later instant when the select line is inactive. If the data has not to be changed, an inactive data signal is written into the voltage storage element and the switch Sl is open. Now the data put on the data line after the select line is deactivated will not be able to reach the pixel. Then, while maintaining the data on the data line, the select line is activated again and successively, the data line is deactivated to open the second switch.

This embodiment has the advantage that only two switches are required and no extra activate line nor an extra connection to another select line is required. However, during the second phase of the addressing, the pixel sees the data stored on the voltage storage element. In the third phase the correct data is written. However, this is not a problem because the second phase has a duration which is much shorter than the frame period.

In an embodiment in accordance with the invention, the display elements comprise one switch, and the switching circuit comprises a switch per data line. The display elements are now identical to the prior art. Each display element comprises one switch arranged between the pixel and the associated data line to supply the voltage on this data line to the pixel when the control input of the switch receives a suitable voltage from the associated select line. The switch of the switching circuit is operated in synchronism with the first and second periods in time to only put the data signal on the data line of a particular pixel either during the first or the second period in time, dependent on the optical change of the pixel required. Pixels that are not addressed hold their previous voltage. This embodiment has the advantage that the display elements have a simple construction. However, a disadvantage is that either the voltage on the second electrodes or the power supply voltage for the data driver must be changed twice each line period instead of twice each frame period.

These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.

In the drawings:

Fig. 1 shows diagrammatically a cross-section of a portion of a prior art electrophoretic display device,

Fig. 2 shows diagrammatically a prior art display apparatus with an equivalent circuit diagram of a portion of the electrophoretic display device,

Figs. 3A-3D show select and data pulses in the prior art display apparatus during line periods, Figs. 4A-4D show data pulses in the prior art display apparatus during frame periods,

Fig. 5 shows a circuit diagram of an embodiment of a display element in accordance with the invention,

Figs. 6A-6D show drive signals for driving the pixel of the display element shown in Fig. 5,

Fig. 7 shows a circuit diagram of an embodiment of a display element in accordance with the invention,

Figs. 8A- 8D show drive signals for driving the pixel of the display element shown in Fig. 7, Fig. 9 shows a circuit diagram of an embodiment of a display element in accordance with the invention,

Fig. 10 shows a circuit diagram of an embodiment of a display element in accordance with the invention,

Fig. 11 shows a circuit diagram of an embodiment of a display element in accordance with the invention,

Figs. 12A-12C show drive signals for driving the pixel of the display element shown in Fig. 11,

Fig. 13 shows a circuit diagram of an embodiment of part of a data driver in accordance with the invention, Figs. 14A-14E show drive signals for driving the pixel of the display element shown in Fig. 13, and

Figs. 15A-15E show drive signals for driving the pixel of the display element shown in Fig. 13.

The same references in different Figures indicate the same items. All instants in time are referred to as ti wherein i is an index for discriminating different instants. The instants in time in different Figures which have the same index are not related to each other unless stated differently. Thus, a same time index used in different figures does not mean that the same instants in time are indicated.

Fig. 1 diagrammatically shows a cross-section of a portion of an electrophoretic display device 1 which, for elucidation only, has the size of a few display elements only. The electrophoretic display device 1 comprises a base substrate 11, an electrophoretic film with an electronic ink which is present between two transparent substrates 12 and 16 which, for example, are of polyethylene. One of the substrates 12 is provided with transparent picture electrodes 40, 40', and the other substrate 16 with a transparent counter electrode 50. The electronic ink comprises multiple micro capsules 14, of about 10 to 50 microns. The microcapsules 14 need not be ball-shaped, any other shape, such as for example, predominantly rectangular, is possible. Each micro capsule 14 comprises positively charged black particles 15 and negative charged white particles 13 suspended in a fluid 17. The dashed material 18 is a polymeric binder. The particles 13 and 15 may have other colours than black and white. It is only important that the two types of particles 13, 15 have different optical properties and different charges such that they act differently to an applied electric field. The layer 12 is not necessary, or could be a glue layer. When a negative voltage is applied to the counter electrode 50 with respect to the picture electrodes 40, 40', an electric field is generated which moves the black particles 15 to the side of the micro capsule 14 directed to the counter electrode 50. Simultaneously, the white particles 13 move to the opposite side of the microcapsule 14 where they are hidden to the viewer and the display element will appear dark to a viewer. By applying a positive field between the counter electrodes 50 and the picture electrodes 40,40', the white particles 13 move to the side of the micro capsule 14 directed to the counter electrode 50 and the display element will appear white to a viewer (not shown). When the electric field is removed the particles 13, 15 remain in the acquired state, the display exhibits a bi-stable character and consumes substantially no power.

Fig. 2 shows diagrammatically an equivalent circuit of a picture display apparatus which comprises the electrophoretic display device 1. The electrophoretic display device 1 comprises an electrophoretic film laminated on the base substrate 11 provided with active switching elements Sl, a row driver 2 and a column driver 3. Preferably, the counter electrode 50 is provided on the film comprising the encapsulated electrophoretic ink, but, the counter electrode 50 could be alternatively provided on a base substrate if a display operates based on using in-plane electric fields. The display device 1 comprises a matrix of display elements 10 at the area of intersecting row or select electrodes 20 and column or data electrodes 30. The row or data driver 2 supplies select voltages VS(I) to consecutively select the row electrodes 20. The column or data driver 3 provides data signals DA(J) to the column electrodes 30 for the display elements 10 of the selected row electrode 20. Preferably, a processor 4 firstly processes incoming data ID into the data signals DA(J) to be supplied by the column electrodes 30.

The select voltages VS(I) are referenced to by VS followed by an index (I) which indicates which one of the select voltages is meant. VS(I) is the select voltage for the first line (usually a row) of display elements 10. The reference VS(I) is used to indicate an arbitrary one of the select voltages. The data signals DA(J) are referenced to by DA followed by an index (J) which indicates which one of the data signals is meant. DA(I) is the data signals for the first column of display elements 10. The reference DA(J) is used to indicate an arbitrary one of the data signals. The display device may 1 may be constructed in that the select lines 20 extend in the column direction and the data lines 30 extend in the row direction. The display elements 10 shown are known from the prior art and comprise the pixel 5, a counter electrode 50, a pixel electrode 40, a switch Sl and a capacitor 23. The voltage across the bi-stable material of the pixel 5 is applied with the counter electrode 50 and the pixel electrode 40.

The control signals CS and CS' control the mutual synchronisation between the data driver 3 and the select driver 2. Select signals VS(I) from the select driver 2 which are electrically connected to the select electrodes 20 select the pixel electrodes 40 via the gates of the thin film transistors Sl. The sources of the thin film transistors Sl are electrically connected to the data electrodes 30. A data signal DA(J) present at the data electrode 30 is transferred to the pixel electrode 40 of the pixel 5 coupled to the drain of the TFT Sl. In the embodiment shown, the display elements further comprises an optional capacitor 23 which is connected between the pixel electrodes 40 of the associated pixel 5 and one or more storage capacitor lines 24. Instead of a TFT other switching elements Sl can be applied such as diodes, MIM's, etc. The lines 24 may be connected to ground. The processor 4 may comprise a memory 150, a comparator 151, a controller

153, and a memory 152. The memory 150 stores a previous image of the incoming data ID. The comparator 151 compares a present image of the incoming data ID with the stored previous image to determine desired optical transitions to be made by the pixels 5. The suitable drive waveform Dij for the particular pixel 5 is based on the desired optical transition to be made. Fig. 4 shows such a suitable drive waveform Dij for a transition from black to white (if black and white particles are present).

In a display apparatus which comprises the display panel 1, an image processing circuit 25 is present which receives the input data signal IV to supply images as the incoming data ID to the processor 4. The incoming data ID determines the optical transitions to be made be the pixels 5.

Figs. 3A-3D show select and data pulses in the prior art display apparatus during line periods. Figs 3 A, 3B, 3C, respectively show the select voltages VS(I) to VS(N) which are activated sequentially, usually each during a line period TL. Fig.3D shows the data DA(J) which is supplied to the pixels 5 associated with the selected select line 20 in synchronism with the line periods TL. The frame period TF lasts the number of select lines 20 times the line period TL.

Figs. 4A-4D show data pulses in the prior art display apparatus in a frame period. Every period in time between two successive vertical lines is one frame period TF. As discussed, specific drive waveforms Dij (DOl to DOn are shown) are required to change an optical state of a pixel 5 which is build from bi-stable material such as electrophoretic material. An example of such a specific waveform Dij is shown for a display wherein the electrophoretic material is E-ink.

By way of example only, the known set of waveforms Doj shown in Figs. 4 A to 4D comprise in the order shown: first shaking pulses SPl, reset pulses RP, second shaking pulses SP2, and driving pulses DP. For the four optical transitions shown, the driving pulses DP have zero amplitude. The shaking pulses SPl and SP2 decrease the inertness of the particles 13 and 15 such that they have a faster response to the reset pulses RP and the driving pulses DP. The reset pulses RP improve the reproducibility of the optical states of the pixels 5 by first changing the optical states of the pixels 5 to a well defined limit state (black B, or white W). However, both or one of the shaking pulses SPl, SP2, and/or the reset pulse RP need not be present.

The known drive of electrophoretic displays uses a set of drive waveforms which for each optical transition to be made by the particular pixel 5 comprises the same structure of the drive waveform Doj. In the example shown in Figs. 4A to 4D only four of n drive waveforms DoI to Don (collectively also referred to as Doj) for only four of the n optical transitions are shown. The shown drive waveforms Doj are respectively: DoI for the optical transition from white W to black B, Do2 for the optical transition from black B to black B, Doj for the optical transition from black B to white W, and Don for the optical transition from white W to white W.

In all the drive waveforms DoI to Don, the shaking pulses SPl comprise a series of pulses having alternating polarity which are time aligned. Also the shaking pulses SP2 are present in all the drive waveforms DoI to Don and are time aligned. However, the shaking pulses SPl and/or SP2 need not be time aligned. Further, the shaking pulses SPl, SP2 need not be present if no change of level is required. In the waveform DoI , the reset pulse RP has the positive polarity such that all the positive black particles 15 are moved to the top of the micro capsules 14 and the pixel 5 appears black, no driving pulse DP is required to reach the desired optical state black B. In the waveform Do2, no optical transition is required and thus no reset is required, although a positive polarity reset pulse may be applied, preferably with a short duration and/or low amplitude to prevent sticking of the particles 13 and 15. In the waveform Doj, the reset pulse RP has a negative polarity to move all the negative white particles 13 to the top of the micro capsules 14 and the pixel 5 appears white, no driving pulse DP is required anymore to reach the desired optical state white W. In the waveform Don, no optical transition is required and thus no reset is required, although a negative polarity reset pulse may be applied. If intermediate grey levels have to be displayed, a non-zero drive pulse DP is required to change the optical state of the pixel 5 from either the well defined white or black state reached by applying the reset pulse RP.

If the particles have other colors, other optical transitions will occur. Further optical states may be present, such as light grey and dark grey. If the optical states black B, dark grey, light grey, and white W are possible, 16 possible optical transitions exist, each which a corresponding drive waveform DoI to Don, with n=16. Not all these waveforms must be different.

The drive waveforms Doj shown have to be supplied across a pixel 5 to obtain the desired change of the optical state of the pixel 5. The voltage across the pixel 5 is determined by the data signal DA(J) and the voltage on the counter electrode 50. Although the shaking pulses SPl and SP2 may be identical for all pixels 5, the reset pulse RP and the drive pulse DP may depend on the change of the optical state of the particular pixel 5, and thus should be controllable per pixel 5. Thus, in a display wherein the voltage on the counter electrode 50 has a fixed value of usually zero volts, the data driver 3 must be able to supply either a positive voltage (usually about +15V) or a negative voltage (usually about -15V) dependent on the optical change of the particular pixel 5. Consequently, the data driver 3 has to be made in an IC process which can withstand the complete voltage swing (usually 30V) between the positive and the negative voltage. Fig. 5 shows an embodiment of a display element in accordance with the invention. The display element 10 comprises a switch circuit S and a pixel 5 with a pixel electrode 40 and a counter electrode 50. The pixel 5 is represented as a pixel capacitance CP. The switch circuit S comprises a first switch Sl with a main current path arranged between the pixel electrode 40 and the data line 30 on which the data signal DA(J) is present. A second switch S2 has a main current path arranged between a control input of the first switch Sl and the select line 20 on which the select voltage VS(I) is present. A third switch S3 has a main current path arranged between a control input of the second switch S2 and the data electrode 30, and a control input coupled to an activation line 60 on which an activation signal AC(I) is present. A voltage storage element CSl is connected to the control input of the second switch S2. The operation of this display element 10 is elucidated with respect to Fig. 6.

Figs. 6A-6D show drive signals for driving the pixel of the display element shown in Fig. 5. Fig. 6A shows the activation voltage AC(N-I) on the activation line 60 of the one but last row of pixels 5. Fig. 6B shows the select voltage VS(N-I) on the select electrode 20 of the one but last row of pixels 5. Figs. 6C and 6D show the data signal DA(J) for the f¹ pixel 5 of the one but last row R(N-I) and the last row R(N) of the present frame period TF which starts well before the instant t0 ends at the instant t5, and for the first row R(I) of pixels 5 of the next frame period TF which starts at the instant t5.

It is assumed that the data driver 3 receives a positive power supply voltage during the present frame period TF and a negative power supply voltage during the next frame period TF. Thus, during the present frame period TF only the pixels 5 which require a positive data signal DA(J) should be selected to receive this positive data signal DA(J), the other pixels 5 should not receive the positive data signal DA(J). During the next frame period TF only the pixels 5 which should receive a negative data signal DA(J) should be connected to the data lines 30.

During each line period TL, the controller 4 controls the select driver 2, the data driver 3, and the activation line 60 in the manner explained in the now following for the row R(N-I).

At the instant tθ, the activation voltage AC(N-I) on the activation line (60) gets a high level to activate the activation line (60) and to close the switch S3. Off course, if other conductivity types FET' s are used for the switches, a low level of the activation voltage AC(N-I) would close the switch S3. To be independent on the actual used FET' s, instead of mentioning the level of a signal it is defined that a line is activated which means that the line caries a voltage which closes the switch of which the control input is connected to this line. The data driver 3 is controlled to supply a data signal DA(J) which is stored in the storage element CSl. The level of the data signal DA(J) determines a conductive state of the second switch S2 to either connect or disconnect the select line 20 to or from the control input of the first switch Sl, respectively. During this first phase, lasting from the instant t0 to the instant tl, the switch S2 is brought into a state determining whether the pixel 5 will be or will not be connected to the data line 30 when, at a later instant, the select line 20 becomes active. At the instant tl, the activation line 60 is deactivated. However, the voltage on the capacitor CSl takes care that the selected state of the switch S2 is kept the same. At the instant t2, the select line 20 is activated, and the data driver 3 is controlled to supply a data signal DA(J). This data signal DA(J) only reaches the pixels 5 associated with the selected line if the switch Sl is closed. The switch Sl is only closed if the second switch S2 was closed during the first phase lasting from instant t0 to tl. If the second switch S2 was not closed during the first phase, the switch Sl will now not be closed and the data signal DA(J) is not supplied to the pixel 5 and thus cannot influence the optical state of the pixel 5. Thus, the pixels 5 associated with the selected line of pixels 5 for which the second switch S2 was closed will be updated, the other pixels will not be updated. This allows to select only the pixels 5 to be connected to the data lines 30 which have to receive the available polarity of the data voltage to change their optical state. Fig. 6C shows an example of the data signal DA(J) if the pixel 5 has to be connected to receive this data signal DA(J). Fig. 6D shows an example of the data signal DA(J) if the pixel 5 must not be connected to receive this data signal DA(J). At the instant t3 the select line 20 is deactivated, after the time period lasting from instants t3 to t4. The same sequence is started at the instant t4 for the activate line 60 and the select line 20 of the next (in this example, the last) line of pixels 5. At the instant t5, the next frame period TF starts, the supply voltage of the data driver 3, and optionally also the select driver 2, gets the other polarity and the same line sequence starts. Instead of providing the supply voltage with another polarity to the data driver 3, the supply voltage of the data driver 3 is not altered but the level of the voltage on the counter electrode 50 is changed.

It has to be noted that the state of the switch Sl is kept even when the switch S2 is open by capacitance present on the gate of the switch Sl. The periods in time between the instants tl and t2, and/or the instants t3 and t4 may be relatively short, or may be omitted if the pulse edges are sufficient steep or the RC-times of the pixel circuit are sufficient long.

Fig. 7 shows an embodiment of a display element in accordance with the invention. The display element 10 shown in Fig. 7 is based on the display element 10 shown in Fig. 5, the only difference is that the activate line 60 is omitted and that the control input of the switch S3 is connected to the select line 20 of the next line of pixels 5. On this select line 20 of the next line of pixels 5, the select voltage VS(I+1) is present. The operation of this embodiment is elucidated with respect to Figs. 8A- 8D.

Figs. 8A- 8D shows drive signals for driving the pixel of the display element shown in Fig. 7. Fig. 8A shows the select voltage VS(I) on the select line 20 of the row R(I- 1) which is selected during the line period TL lasting from the instant t0 to the instant tlO, and of the row R(I) which is selected during the line period TL lasting from the instant tlO to t20. Fig. 8B shows the select voltage VS(I+1) on the select line 20 of the row R(I), and of the row R(I+1) which is selected during the line period TL lasting from the instant t20 to t30. Figs. 8C and 8D show the data signal DA(J) for the j^th pixel 5 of the rows R(I-I), R(I), and R(I+ 1) of the present frame period TF which starts well before the instant t0 ends at the instant t40, and for the first row R(I) of pixels 5 of the next frame period TF which starts at the instant t40.

The operation of the display element is elucidated for the line period TL lasting from the instant tlO to the instant t20 and during which the a subset of the row R(I) of pixels 5 of the present frame period TF has to be connected to the data line 30 while the rest of the pixels 5 of this row should not be connected to the date line 30. Fig. 8C shows an example of the data signal DA(J) for a pixel 5 which should be connected, and Fig. 8D shows an example of the data signal DA(J) for a pixel 5 which should not be connected. During the present line period TL lasting from the instant tlO to the instant t20, the controller 4 controls the select driver 2 and the data driver 3 in the manner explained in the now following for the row R(I).

At the instant tlO, the controller 4 activates the next select line 20 by supplying a suitable level of the select voltage VS(I+1) to this select line 20. The controller 4 further controls the data driver 3 to supply a data signal DA(J) which will be stored in the storage element CSl and which determines a conductive state of the switch S2 to either connect or disconnect the select line 20 to or from the control input of the switch Sl, respectively. In Fig. 8C, the switch S2 is closed, in Fig. 8D the switch S2 stays open. At the instant tl 1, the controller 4 deactivates the next select line 20.

At the instant tl2, the controller 4 activates the present select line 20 by supplying a suitable level of the select voltage VS(I) on this select line 20. The controller 4 further controls the data driver 3 to supply a data signal DA(J) to influence the optical state of the pixels 5 associated with the selected line of pixels (5) for which the switch S2 is closed during the set-phase lasting from the instant tl 0 to the instant tl 1. The pixels 5 for which the switch S2 is not closed during the set-phase, are not influenced by the data signal DA(J) because the switch Sl is open.

At the instant tl3, the controller 4 deactivates the present select line 20. At the instant tl4, the controller 4 again activates the next select line 20, and controls the data driver 3 to supply a data signal DA(J) such that the second switch S2 is opened. The present select line 20 is deactivated at the instant tl5. Next a short period of time lasting from the instant tl5 to t20 is required to be sure that the next select line 20 is deactivated before the next line period TL starts.

The sequence of signals described with respect to the row R(I) has to be repeated for the other rows, but off course, the select pulses have to supplied to the correct associated two select lines 20. As in Figs. 6A-6D, again the data has opposite polarities during the present frame period TF lasting from the instant t0 to the instant t40, and the next frame TF starting at instant t40.

Fig. 9 shows an embodiment of a display element in accordance with the invention. The switch circuit S comprises the switches Sl and S4. A series arrangement of a main current path of the switch Sl and a main current path of the switch S2 is arranged between the pixel electrode 40 and the data line 30 carrying the data signal DA(J). The pixel 5 is depicted as the pixel capacitance CP. A control input of the switch Sl is coupled to the select line 20 to receive the select voltage VS(I), and a control input of the switch S2 is coupled to the activation line 60 to receive the activation signal AC(J). During a period in time the data signals DA(J) and the voltage on the counter electrode 50 are selected to have a particular polarity, the controller 4 only activates the activation line 60 for the pixels 5 associated with the select line 20 which should receive this particular polarity. During another period in time the data signals DA(J) and the voltage on the counter electrode 50 are selected to have a polarity opposite to the particular polarity, the controller 4 only activates the activation line 60 for the pixels 5 associated with the select line 20 which should receive this opposite polarity. The periods in time during which the different polarities are supplied, preferably are half frame periods such that a total frame period comprises half a frame period during which the particular polarity is present and half a frame period during which the opposite polarity is present.

Fig. 10 shows an embodiment of a display element in accordance with the invention. The switch circuit S comprise the switches Sl, S4, and S5. A series arrangement of a main current path of the switch Sl and a main current path of the switch S4 is arranged between the pixel electrode 40 and the data line 30 carrying the data signal DA(J). The pixel 5 is shown as a capacitance CP arranged between the pixel electrode 40 and the counter electrode 50. A control input of the switch Sl is coupled to the present select line 20 to receive the select voltage VS(I). The switch S5 has a main current path arranged between a control input of the switch S4 and the data line 30, and a control input coupled to either the next select line 20 to receive the select voltage VS(I+1) or the activation line 60 to receive the activation signal AC(I). A voltage storage element CS2 is coupled to the control input of the switch S4.

If the control input of the switch S5 is connected to the activation line 60, the switching circuit S is operated in the same manner as the circuit shown in Fig. 5. If the control input of the switch S5 is connected to the next select line 20, the switching circuit operates in the same manner as the circuit shown in Fig. 7.

Fig. 11 shows an embodiment of a display element in accordance with the invention. The switch circuit S comprise a switch Sl with a main current path arranged between the pixel electrode 40 and the data line 30 carrying the data signal DA(J). The pixel 5 is shown as the capacitance CP which is arranged between the pixel electrode 40 and the counter electrode 50. A switch S6 has a main current path arranged between a control input of the switch Sl and the data line 30, and a control input connected to the select line 20 to receive a select voltage VS(I). A voltage storage element which is the capacitance CS3 is connected to the control input of the switch Sl. The operation of this display element 10 is elucidated with respect to Figs. 12A-12C.

Figs. 12A-12C show drive signals for driving the pixel of the display element shown in Fig. 11. Fig. 12A shows the select voltage VS(I) on the select line 20. Fig. 12B shows the data voltage DA(J) on the data line 30 when the data voltage DA(J) should influence the optical state of the pixel 5. Fig. 12C shows the data voltage DA(J) on the data line 30 when the data voltage DA(J) should not influence the optical state of the pixel 5.

The controller 4 controls the data driver 3 and the select driver 2 during line period TL, which lasts from the instant t0 to the instant t6, to perform the following actions. At the instant tθ, the select line 20 is activated, the switch S6 is closed and the data driver 3 is controlled to supply a data signal DA(J) which will be stored in the storage element CS3. The level of the data signal DA(J) determines a conductive state of the switch Sl. If the data signal DA(J) is active, the switch Sl is closed and the data line 30 is connected to the pixel capacitance CP, see Fig. 12B. If the data signal DA(J) is inactive, the switch Sl stays open and the data line 30 is not connected to the pixel capacitance CP, see Fig. 12C. At the instant tl, the select line 20 is deactivated, but the conductive state of the switch Sl is preserved due to the voltage stored on the capacitance C S3.

At the instant t2, the data driver 3 is controlled to supply a data signal DA(J) to influence the optical state of the pixels 5 associated with the selected line of pixels for which the switch Sl is closed earlier. For the other pixels 5 of the selected line, the switch Sl is open and the optical state of the pixels 5 is not influenced.

At the instant t3 the select line 20 is activated again, the switch S6 is closed, and at the instant t4 the data driver 3 is controlled to inactivate the data line 20 by supplying a data signal DA(J) such that the voltage on the capacitance gets a value to open the switch Sl. At the instant t5, the select line 20 is deactivated.

Fig. 13 shows an embodiment of a data driver in accordance with the invention. Now, the display element 10 is identical to the prior art display cell 10 shown in Fig. 2 and is not further elucidated. However the optional capacitor 23 is not shown. The switch circuit S comprises the switch S7 which has a main current path arranged between an input data signal DO(J) and the data line 30 carrying the data signal DA(J). The switch S7 has a control input to receive a switch or activate signal DC(J). The data driver 3 supplies the input data signal DO(J) and the switch signal DC(J). Preferably the switching circuit S is part of the data driver 3. The operation of this topology is elucidated with respect to Figs. MA- HE and 15 A-15E. Figs. 14A-14E show drive signals for driving the pixel of the display element shown in Fig. 13. Fig. 14A shows the select signal VS(I) on the select line 20. Fig. 14B shows the input data signal DO(J) when the first polarity level is available. Fig. 14C shows the switch signal DC(J) for a pixel 5 which should receive the first polarity level. Fig. 14D shows the input signal DO(J) when the second polarity level which has the opposite polarity of the first polarity level is available. Fig. 14E shows the switch signal DC(J) for a pixel 5 which should receive the second polarity level. The first and second polarity levels indicate that the power supply voltage of the data driver 3 and/or the voltage of the counter electrode 50 are selected to obtain a voltage across the pixel 5 which has a level with either the first or the second polarity. Thus, the line period which lasts from instant tO to instant t3, comprises a first period in time Tl, which lasts from the instant tO to the instant tl, during which the first polarity level is available and a second period in time T2 which lasts from the instant tl to the instant t2 during which the second polarity level is available.

For a pixel which should receive the first polarity level, the switch S7 should connect the input data signal DO(J) to the data line 30 only during the first period in time Tl as is illustrated in Figs. 14D and 14E. For a pixel which should receive the second polarity level, the switch S7 should connect the input data signal DO(J) to the data line 30 only during the second period in time T2 as is illustrated in Figs. 14B and 14C.

This method of driving has the drawback that due to the open switch S7, the data of the previous line time may be written to the pixel 5 during the first period in time Tl . During the second period in time, the correct data will be written to the pixel. However, this is not a severe drawback as the first period in time Tl is quite short with respect to the frame period TF. This drawback is solved in the method of driving shown in Figs. 15A-15E.

Figs. 15A-15E shows drive signals for driving the pixel of the display element shown in Fig. 13. Fig. 15A shows the select signal VS(I) on the select line 20. Fig. 15B shows the input data signal DO(J) when the first polarity level is available. Fig. 15C shows the switch signal DC(J) for a pixel 5 which should receive the first polarity level. Fig. 15D shows the input signal DO(J) when the second polarity level which has the opposite polarity of the first polarity level is available. Fig. 15E shows the switch signal DC(J) for a pixel 5 which should receive the second polarity level. The only difference with respect to Figs.

14A-14E is now that the select voltage VS(I) is only active during the second period in time T2.

When switch S7 is open, the associated column of pixels is not addressed, when switch S7 is closed, the column is addressed. The data driver 3 may receive power supply voltages which jump in a time sequential manner between, for example, 0 and +15 V during a first period in time, and 0 and -15V during a second period in time, respectively. Thus, the switch S7 has to be closed during one of these periods to supply the data in the correct polarity to the pixel 5. During the period in time lasting from tO to tl the select voltage VS(I) is low and thus the switch Sl is open. However due to capacitances, the data voltage DA(J) put on the data electrode 30 will be kept some time after the instant tl such that at the instant tl when the select voltage VS(I) closes the switch Sl, the correct data signal DA(J) is supplied to the pixel 5. The delay caused in the voltages due to the capacitances is not shown in Figs. 14A-14E and 15A-15E. It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. Preferably, the switches are semiconductor switches. Preferably, these switches are FET's, but any other semiconductor switches may be used. Any capacitances shown may be intrinsic capacitances of the switches or a combination of these intrinsic capacitances, other parasitic capacitances and added capacitors.

The bi-stable display may be any other display then an electrophoretic display. For example, the bi-stable display may be the rotating ball display of Gyricon.

Instead of two periods during which two different voltage ranges are present, more than two periods during which corresponding different voltage ranges are present may be used.

Electrophoretic display panels can form the basis of a variety of applications where information may be displayed, for example in the form of information signs, public transport signs, advertising posters, pricing labels, billboards etc. In addition, they may be used where a changing non- information surface is required, such as wallpaper with a changing pattern or color, especially if the surface requires a paper like appearance.

In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. Use of the verb "comprise" and its conjugations does not exclude the presence of elements or steps other than those stated in a claim. The article "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the device claim enumerating several means, several of these means may be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Claims

CLAIMS:

1. A driver (2, 3, 4) for an active matrix display (1) comprising pixels (5) of a bistable material arranged at intersections of select lines (20) and data lines (30) between first electrodes (40) and a second electrodes (50) for receiving a pixel voltage (VP), the driver (2, 3, 4) comprises a select driver (2) supplying select voltages (VS) to the select lines (20) for selecting a selected line of the pixels (5) during a line select period (TL), a data driver (3) for supplying data signals (DA) to the selected line of pixels

(5), a switch circuit (S) for selectively coupling the data signals (DA) to the associated first electrodes (40) of the selected line of pixels (5), and a controller (4) for controlling the switch circuit (S):

(i) during a first period in time (Tl) to select, of the selected line of pixels (5), first selected pixels which should receive the pixel voltage (VP) having a first voltage range for changing their optical state, and (ii) during a second period in time (T2) to select, of the selected line of pixels

(5), second selected pixels which should receive the pixel voltage (VP) having a second voltage range different than the first voltage range for changing their optical state.

2. A driver (2, 3, 4) as claimed in claim 1, wherein the data driver (3) has a power supply input and a ground input for receiving a power supply voltage (VB) there between, and wherein the driver (2, 3, 4) further comprises a polarity switching circuit for altering a polarity of the power supply voltage (VB) received to obtain the first voltage range having a first polarity for changing the optical state of the first selected pixels towards a first limit state during the first period in time (Tl) and the second voltage range having a second polarity opposite the first polarity for changing the optical state of the second selected pixels towards a second limit state during the second period in time (T2), and wherein the second electrodes (50) are arranged to receive a fixed potential. 3. A driver (2, 3, 4) as claimed in claim 1, wherein the data driver (3) has a power supply input and a ground input for receiving a first power supply voltage (VBl) there between, and wherein the driver (2,

3, 4) further comprises a level switching circuit for altering a level of a second power supply voltage (VB2) being supplied to the second electrodes (50) to obtain the first voltage range during the first period in time (Tl) and the second voltage range during the second period in time (T2).

4. A driver (2, 3, 4) as claimed in claim 1, wherein the line select period (TL) comprises the first period in time (Tl) and the second period in time (T2), and wherein the controller (4) is arranged for controlling the switch circuit (S) to connect the pixels (5), which have to receive the pixel voltage (VP) within the first voltage range, to data lines (30) only during the first period in time (Tl) and not during second period in time (T2), and to connect the pixels (5), which have to receive the pixel voltage (VP) within the second voltage range, to data lines (30) only during the second period in time (T2) and not during first period in time (Tl).

5. A driver (2, 3, 4) as claimed in claim 1, wherein a frame period (TF) comprises the first period in time (Tl) and the second period in time (T2), both lasting longer than one line select time (TL), and wherein the controller (4) is arranged for controlling the switch circuit (S) to connect pixels (5), which have to receive the pixel voltage (VP) within the first voltage range, to data lines (30) only during the first period in time (Tl) and not during second period in time (T2), and to connect pixels (5), which have to receive the pixel voltage (VP) within the second voltage range, to data lines (30) only during the second period in time (T2) and not during first period in time (Tl).

6. A driver (2, 3, 4) as claimed in claim 1, wherein the switch circuit (S) comprise a first switch (Sl) having a main current path arranged between the first electrode (40) and the data line (30), a second switch (S2) having a main current path arranged between a control input of the first switch (Sl) and the select line (20), a third switch (S3) having a main current path arranged between a control input of the second switch (S2) and the data electrode (30), and a control input coupled to an activation line (60), wherein a voltage storage element (CSl) is coupled to the control input of the second switch (S2), and wherein the controller (4) is arranged for in a line period (TL), in the order mentioned:

(i) activating the activation line (60), and controlling the data driver (3) for supplying a data signal (DA) being stored in the storage element (CSl) and determining a conductive state of the second switch (S2) to either connect or disconnect the select line (20) to or from the control input of the first switch (Sl),

(ii) deactivating the activation line (60), (iii) activating the select line (20), and controlling the data driver (3) for supplying a data signal (DA) for influencing the optical state of pixels (5) associated with the selected line of pixels (5) for which the conductive state of the second switch (S2) is set to connect and for not influencing the optical state of pixels (5) associated with the selected line of pixels (5) for which the conductive state of the second switch (S2) is set to disconnect, and (iv) deactivating the select line (20).

7. A driver (2, 3, 4) as claimed in claim 5, wherein the switch circuit (S) comprise a first switch (Sl) having a main current path arranged between the first electrode (40) and the data line (30), a second switch (S2) having a main current path arranged between a control input of the first switch (Sl) and a first select line (20), a third switch (S3) having a main current path arranged between a control input of the second switch (S2) and the data electrode (30), and a control input coupled to a second select line (20) of a neighboring line of pixels (5), wherein a voltage storage element (CSl) is coupled to the control input of the second switch (S2), and wherein the controller (4) is arranged for in a line period (TL), in the order mentioned:

(i) activating the second select line (20), and controlling the data driver (3) for supplying a data signal (DA) being stored in the storage element (CSl) and determining a conductive state of the second switch (S2) to either connect or disconnect the select line (20) to or from the control input of the first switch (Sl), (ii) deactivating the second select line (20),

(iii) activating the first select line (20), and controlling the data driver (3) for supplying a data signal (DA) for influencing the optical state of the pixels (5) associated with the selected line of pixels (5) for which the conductive state of the second switch (S2) is set to connect and for not influencing the optical state of the pixels (5) associated with the selected line of pixels (5) for which the conductive state of the second switch (S2) is set to disconnect,

(iv) deactivating the select line (20),

(v) activating the second select line (20), and controlling the data driver (3) for supplying a data signal (DA) for setting the conductive state of the second switch (S2) to disconnect, and

(vi) deactivating the second select line (20).

8. A driver (2, 3, 4) as claimed in claim 1, wherein the switch circuit (S) comprise a first switch (Sl) and a second switch (S4), a series arrangement of a main current path of the first switch (Sl) and a main current path of the second switch (S4) is arranged between the first electrode (40) and the data line (30), a control input of the first switch is coupled to the select line (20), and a control input of the second switch (S4) is coupled to an activation line (60), and wherein the controller (4) is arranged for only activating the activation line (60) for the pixels (5) associated with the select line (20) during either the first period in time (Tl) or the second period in time (T2).

9. A driver (2, 3, 4) as claimed in claim 1, wherein the switch circuit (S) comprise a first switch (Sl), a second switch (S4), and a third switch (S5), a series arrangement of a main current path of the first switch (Sl) and a main current path of the second switch (S4) is arranged between the first electrode (40) and the data line (30), a control input of the first switch is coupled to the select line (20), and the third switch (S5) has a main current path arranged between a control input of the second switch (S4) and the data line (30), and a control input coupled to an activation line (60), wherein a voltage storage element (CS2) is coupled to the control input of the second switch (S4), and wherein the controller (4) is arranged for in a line period (TL), in the order mentioned:

(i) activating the activation line (60), and controlling the data driver (3) for supplying a data signal (DA) being stored in the storage element (CS2) and determining a conductive state of the second switch (S4) to either connect or disconnect the data line (30) to or from the main current path of the first switch (Sl), (ii) deactivating the activation line (60),

(iii) activating the select line (20), and controlling the data driver (3) for supplying a data signal (DA) for influencing the optical state of the pixels (5) associated with the selected line of pixels (5) for which the conductive state of the second switch (S4) is set to connect and for not influencing the optical state of the pixels (5) associated with the selected line of pixels (5) for which the conductive state of the second switch (S2) is set to disconnect, and

(iv) deactivating the select line (20).

10. A driver (2, 3, 4) as claimed in claim 1, wherein the switch circuit (S) comprise a first switch (Sl) having a main current path arranged between the first electrode (40) and the data line (30), and a second switch (S6) having a main current path arranged between a control input of the first switch (Sl) and the data line (30), and a control input coupled to the select line (20), wherein a voltage storage element (CS3) is coupled to the control input of the first switch (Sl), and wherein the controller (4) is arranged for in a line period (TL), in the order mentioned:

(i) activating the select line (20) and controlling the data driver (3) for supplying a data signal (DA) being stored in the storage element (CS3) and determining a conductive state of the first switch (Sl) to either connect or disconnect the data line (30) to or from the main current path of the first switch (Sl), (ii) deactivating the select line (20),

(iii) controlling the data driver (3) for supplying a data signal (DA) for influencing the optical state of the pixels (5) associated with the selected line of pixels (5) for which the conductive state of the first switch (Sl) is set to connect and for not influencing the optical state of the pixels (5) associated with the selected line of pixels (5) for which the conductive state of the first switch (Sl) is set to disconnect, (iv) activating the select line (20),

(v) controlling the data driver (3) for supplying a data signal (DA) for setting the first switch (Sl) to disconnect, and

(vi) deactivating the select line (20).

11. A driver (2, 3, 4) as claimed in claim 4, wherein the switch circuit (S) comprises a switch (S7) having a main current path arranged at an output of the data driver (3) in series with the data line (30) and a control input coupled to an activating line (60).

12. A display device comprising an active matrix display (1) comprising pixels (5) positioned at intersections of select lines (20) and data lines (30), the pixels (5) comprise a bistable material arranged between first electrodes (40) and a second electrodes (50), a pixel voltage (VP) across the bi-stable material determines a change of an optical state of the pixels (5) towards either a first or a second limit optical state, and the driver as claimed in claim 1.

13. A display apparatus comprising the display device as claimed in claim 12, and a power supply (PS) for supplying a power supply voltage (VB) to the data driver (3), and an electrode voltage (EV) to the second electrodes (50).

14. A method of driving (2, 3, 4) an active matrix display (1) comprising pixels

(5) of a bi-stable material arranged at intersections of select lines (20) and data lines (30) between first electrodes (40) and second electrodes (50) for receiving a pixel voltage (VP), the method of driving (2, 3, 4) comprises supplying (2) select voltages (VS) to the select lines (20) for selecting a selected line of the pixels (5) during a line select period (TL), supplying (3) data signals (DA) to the selected line of pixels (5), selectively coupling (S) the data signals (DA) to the associated first electrodes (40) of the selected line of pixels (5), and controlling (4) the switch circuit (S): (i) during a first period in time (Tl) to select, of the selected line of pixels (5), first selected pixels which should receive the pixel voltage (VP) having a first voltage range for changing their optical state, and

(ii) during a second period in time (T2) to select, of the selected line of pixels (5), second selected pixels which should receive the pixel voltage (VP) having a second voltage range being different than the first voltage range for changing their optical state.

15. An active matrix display comprising pixels (5) of a bi-stable material arranged at intersections of select lines (20) and data lines (30) between first electrodes (40) and second electrodes (50) for receiving a pixel voltage (VP), a switch circuit (S) for selectively coupling data signals (DA) in the data lines (30) to the associated first electrodes (40) of a selected line of pixels (5), wherein in operation, the switch circuit (S) is controlled to select:

(i) during a first period in time (Tl), of the selected line of pixels (5), first selected pixels which should receive the pixel voltage (VP) having a first voltage range for changing their optical state, and

(ii) during a second period in time (T2), of the selected line of pixels (5), second selected pixels which should receive the pixel voltage (VP) having a second voltage range different than the first voltage range for changing their optical state.

16. An active matrix display as claimed in claim 15 where the bi-stable material is an electrophoretic material.

17. A data driver for use in the driver (2, 3, 4) as claimed in claim 11.

18. A controller (4) for use in the driver (2, 3, 4) as claimed in claim 1.