WO2006048849A1 - Bit detection for multitrack digital data storage - Google Patents
Bit detection for multitrack digital data storage Download PDFInfo
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- WO2006048849A1 WO2006048849A1 PCT/IB2005/053651 IB2005053651W WO2006048849A1 WO 2006048849 A1 WO2006048849 A1 WO 2006048849A1 IB 2005053651 W IB2005053651 W IB 2005053651W WO 2006048849 A1 WO2006048849 A1 WO 2006048849A1
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10268—Improvement or modification of read or write signals bit detection or demodulation methods
- G11B20/10287—Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/22—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing distortions
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
- G11B20/10268—Improvement or modification of read or write signals bit detection or demodulation methods
- G11B20/10287—Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors
- G11B20/10296—Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors using the Viterbi algorithm
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
- H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
- H03M13/4161—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing path management
Definitions
- This present invention relates generally to the reading of information from a storage medium such as a magnetic recording data storage apparatus or an optical storage apparatus.
- the need to increase the storage density and data transfer rate of information storage media is a well known goal in the art.
- the data is stored formatted as a track in which the data is encoded as orientation of the magnetization of the media as in magnetic recording or the presence or absence of an optical mark in the case of optical storage.
- the data is retrieved with a read transducer element that produces a signal that varies with the encoded data on the storage medium.
- This signal is processed by a device known as a read channel whose purpose is to recover the original data with high reliability taking account of the characteristics of the storage medium and the read transducer.
- ISI inter-symbol interference
- the tracks of encoded data are normally separated by a distance sufficient to ensure that interference from adjacent tracks is small enough to limit its effect on the data recovery process.
- the distance between the tracks can be reduced.
- the use of a multiple head transducer which consists of a number of read transducers (N R ) rigidly fixed together can be employed. In this case, a number of tracks can be written and/or read simultaneously thus resulting in an increase of data transfer rates by a factor N R .
- the resulting read signals then consist of interference in both the track direction as well as interference between tracks.
- the resulting read signals then consist of interference in both the track direction as well as interference between tracks.
- the present invention discloses a device for the recovery of data read from a medium consisting of multiple tracks which are read simultaneously and in which the read signal for each track consist of contributions from multiple data symbols both from that track as well as other tracks.
- the signals from each of the N R read transducers is individually processed with an automatic gain control process and then filtered with a low pass filter. Each signal is then sampled by an analogue to digital converter with a sampling frequency F SAMPLE to provide digital samples of each read signal.
- These N R groups of samples are then processed by a joint equalizer to produce N E digital samples. This is efficiently achieved by transforming groups of N samples from each row into a transform domain using a fast transform processor.
- a block of NxN R samples is then processed by multiplying each element of the block by one coefficient for each output row required resulting in N E groups of N samples. Each of these groups are transformed back into the original domain using a fast inverse transform processor. By overlapping the groups of N samples, overall equalization is efficiently achieved.
- the equalization coefficients are chosen to equalize the read samples to a predetermined or programmable two dimensional partial response.
- the N £ output samples from the joint equalizer are processed by N E sample rate converters which re-sample the signal to provide symbol rate samples. These symbol rate samples are used by a joint detector which uses these samples and the knowledge of the two dimensional partial response that they are equalized to, to recover the original N D data samples.
- the joint detection is efficiently achieved by viewing the two dimensional partial response as a time varying one dimensional partial response and using a reduced state detection algorithm to recover the data. By reducing the number of states maintained in the detector, efficient detection can be practically achieved yet maintaining high detection performance.
- the A method for retrieving bits from a record carrier having the bits stored in marks in a two-dimensional pattern having a width of multiple rows of marks along a reading or writing direction of the two dimensional pattern, where more marks are distributed along a length of the rows than there are marks distributed across the width of the multiple rows, and where sampling the marks results in a sample of the signal waveform for a mark being affected by two dimensional intersymbol interference from adjacent marks comprising the steps of: retrieving a sample; processing the sample using a trellis with a set of departure states and a set of arrival states, building up the trellis by converting each arrival state to a further departure state for use during a processing of the current sample, providing an output bit based on a backtracking operation or trace-back operation along the trellis over a certain backtracking depth, and is characterized in that the states of the trellis are constructed from the two-dimensional pattern by retrieving each subsequent sample corresponding to an adjacent mark from an adjacent row, that
- the detector input is converted from two-dimensional to one-dimensional and the subsequent trellis operation takes the original proximity of the samples into account when building up the trellis.
- the states of the trellis are constructed from the two-dimensional pattern by retrieving a subsequent sample corresponding to an adjacent mark bit from the same row once. This defines the behavior at the boundary row of the two dimensional array.
- the marks corresponding to the subsequent samples form a meandering pattern across the rows.
- the states of the trellis are constructed from the two-dimensional pattern by retrieving a subsequent sample corresponding to an adjacent mark bit from the same row once, the pattern that the retrieval forms when moving across the marks is a meandering pattern across the rows, the direction of the retrieval reversing at every boundary of the two dimensional array.
- the retrieval thus proceeds from the first row to the last row and subsequently inverts direction and starts from the last row again and proceeds to the first row again where the direction is inverted yet again and proceeds from the first row to the last row.
- the marks corresponding to the subsequent samples form a hatch pattern across the rows.
- the retrieval When reaching a boundary row of the two dimensional array the retrieval stops and continues at the other boundary row of the two dimensional array. The retrieval thus proceeds from the first row to the last row and subsequently starts from the first row again and proceeds to the last row again.
- the departure state of the one dimensional trellis comprises a first set of subsections of subsequent bits used when establishing a branch metric and a second a set of subsections of subsequent bits ignored when establishing a branch metric. Since the one dimensional trellis is deriving the input samples from the two dimensional array the samples that correspond to marks that were adjacent in the two dimensional array are no longer adjacent but form two or more groups of samples.
- the channel response determines which subsequent bits are comprised in the first set of subsections of subsequent bits.
- the channel response determines the relationship of the samples corresponding to adjacent marks with respect to the intersymbol interference and thus determines which set of subsections of subsequent bits is to be used when establishing a branch metric.
- the two dimensional array of marks is delineated by a boundary row comprising an a priory known boundary information and where the one dimensional trellis is a time variant one dimensional trellis. Because the samples corresponding to the marks of the boundary row of a priory known boundary information form a special condition when building up of the trellis, the trellis is required to be a time variant trellis.
- the a priory known boundary information is a forced zero. Using a forced zero as the a priory known boundary information allows an increase in the reliability of the detected data.
- the converting the arrival state to a further departure state for use during a processing of a next sample comprises performing a tree search operation and retaining only M states at each stage in the trellis.
- each state comprises two branches. By limiting each state to only two branches the complexity of the trellis is further reduced. In a further embodiment the trellis is extended with a single branch for each of the forced zeros.
- Figure 1 depicts a typical read channel architecture for a single track data storage device as is known in the prior art.
- Figure 2 depicts the disclosed read channel architecture for a multi track track data storage device.
- Figure 4 depicts a conventional Time Domain Equalizer (TDE) embodiment for one of the five individual equalizers of a 5 track joint equalizer.
- Figure 5 depicts the proposed Transform Domain Equalizer (TFDE) embodiment for one of the five individual equalizers of a 5 track joint equalizer.
- TDE Time Domain Equalizer
- TFDE Transform Domain Equalizer
- Figure 6 depicts a two dimensional ISI channel model for a multitrack system.
- Figure 7 depicts a time varying one dimensional ISI model of the two dimensional ISI channel.
- Figure 8 depicts an implementation of a reduced stated detector for the time varying one dimensional ISI model of the two dimensional ISI channel.
- the drawing in figure 1 shows a well known general architecture for the reliable detection of data from a single read transducer.
- the continuous time input signal 310 is passed through an analogue processing circuit 301 that provides variable gain, offset and linearity processing to compensate for the variability and non linearity of the read transducer. This processing is usually controlled with information based on a control and adaption block 307 which can be implemented in various ways that are well known.
- the output signal 320 is filtered with a continuous time filter 302 to produce an output signal 321 that can be sampled with an analog to digital converter 303 to produce digital samples 321. These are further filtered in the digital domain by an FIR filter 304, whose coefficients can be adapted to shape the read signal to a predetermined or programmable target response.
- the output 323 of the FIR filter is resampled with a sample rate converter 305 to produce baud rate synchronous samples 324 that can be used by a detector system 306 to recover the original data bits 311 with good reliability.
- a detector system 306 can be used by a detector system 306 to recover the original data bits 311 with good reliability.
- detectors are often based on the well known Viterbi algorithm and are required to be implemented to operate at high data rates yet achieve close to optimum detection performance.
- the control and adaption block 307 can use signals such as the baud rate synchronous samples 324 to produce control information to ensure the system starts correctly and can acquire the data and then track any slow varying changes in the characteristics of the read signal. The design and implementation of such systems are well understood.
- the drawing in figure 2 shows the disclosed invention system which is capable of handling a multi-track read transducer in which the tracks are so close together, that the read signal has interference from adjacent tracks as well as along the tracks.
- This is known as two dimensional intersymbol interference and it is well known that it is difficult to handle such two dimensional intersymbol interference efficiently.
- parallel inputs 230, 231, 232, 234 and 235 which represent the continuous input signal from 5 transducers. These are all processed independently by analogue processing circuits 201, 202, 203, 204 and 205 in an identical fashion to that known in the prior art.
- the continuous time filters 206, 207, 208, 209 and 210 produce output signals that can be sampled with an analog to digital converters 211, 212, 213, 214 and 215 to produce digital samples 236, 237, 238, 239 and 240.
- the disclosed invention in figure 2 uses a joint equalizer 216 to provide a two dimensional filtering function which shapes the two dimensional response of the read transducers to a predetermined or programmable target response. As the read transducers may vary slightly from one to another and the target responses may also be chosen differently from one track to another, the joint equalizer is required to support a different set of coefficients for each output 271, 272, 273, 274, 275 and 240.
- the read transducers do not necessarily have to be aligned in space, there can be a fractional delay between their output again necessitating a different set of coefficients for each output.
- the number of equalizer outputs may differ from the number of inputs (five shown in figure 2).
- the joint equalizer can also apply a response that shifts the input samples in the adjacent track direction. With sufficiently close read transducers, this permits the effective alignment of the read transducers via adjustment of the equalizer coefficients rather than the physical movement of the transducers, thus permitting increase tracking accuracy.
- This invention discloses an efficient method for achieving this equalizing and is described in detail in section 1.
- the outputs 271, 272, 273, 274, 275 and 240 of the joint equalizer 216 are then processed with a number (six in this example) of sample rate converters 217, 218, 219, 220, 221 and 222, which all operate independently but using a common resampling phase 261.
- the outputs 280, 281, 282, 283, 284 and 285 of these sample rate converters are baud rate samples of the equalized read signal and are used by the joint detector 223 as well as the control/adaption block 224.
- the functionality of the control/adaption block can be implemented in a similar manor to existing one dimensional read channels.
- the joint detector 223 takes the baud rate samples from the sample rate converters and uses these signal as well as knowledge of the target equalization response to provide reliable decisions 290, 291, 292, 293, and 294 of the stored data. It can be readily appreciated that the number of recovered data bits (five in this example) can be less than or equal to the number of equalizer outputs ( six in this example).
- the practical and efficient implementation of the joint detector 223 is disclosed in this invention and is described in detail in section 5.
- the drawing in figure 2 discloses a read channel architecture that is capable of reliable detection of data from an array of read transducers from a storage medium even in the presence of two dimensional intersymbol interference. It will be appreciated that the architecture disclosed relies on the efficient implementation of the joint equalizer 216 and the joint detector 223 in figure 2 and the following sections disclose how this can be achieved.
- FIG 3 shown therein is an exemplary embodiment of an equalizer for an joint equalizer with 5 tracks.
- Intrinsic to the read process is the introduction of two dimensional Inter-Symbol Interference (ISI).
- ISI Inter-Symbol Interference
- the joint equalizer forms part of the solution to the problem of recovering the original data and will be used to perform 2D equalization. Because of differences in the 5 laser spots used, five different 2D equalizers (different coefficients) are required. These 2D equalizers are numbered 1 to 5 in figure 3.
- the p th equalizer output is
- TDE is shown in figure 4 .
- a total of five of these are required to implement the complete joint equalizer of figure 3.
- the delay elements numbered 6 to 35 store delayed input samples.
- the multipliers numbered 36 to 70 produce the product terms in equation 1 and the adders numbered 71 to 104 compute the summation in equation 1.
- the number of multipliers needed is thirty five and the number of adders is thirty four.
- Other possible time domain embodiments include transpose form and multiply-accumulate architectures and do not effect the number of multiplications and additions required.
- Transform-based techniques provide an alternative approach to implementing convolution, which is at the center of digital filtering. Much work has been completed on efficient implementation of transforms, resulting in the family of algorithms under the heading of the Fast Fourier Transforms (FFTs).
- FFTs Fast Fourier Transforms
- Such efficient transforms can be utilized with 1 and 2 dimensional signals.
- each individual equalizer may appear as a 2-dimensional equalizer, due to the 2-dimensional nature of the data samples and filter coefficients.
- the 2-D input is filtered to obtain a 2-D output.
- the 2-D input input is filtered to obtain a 1-D output y p ⁇ n) for each of the 5 equalizers .
- a 2 dimensional transform can map the input into a 2-D transform domain with filtering done in the transformed 2D domain. Applying an inverse transform will involve using all points in 2-D domain.
- 1-D convolutions can be carried out using a transform technique.
- the summation of the convolutions in equation 2 can be carried out in the transform domain.
- This ID approach simplifies forward and inverse transform mappings. This has the significant advantages of requiring 5 one dimensional forward transforms, instead of 1 two dimensional forward transform. requiring 5 one dimensional inverse transforms, instead of 5 two dimensional inverse transforms. using less multiplications in the one dimensional transform domain than in the two dimensional transform domain when used to implement linear convolution.
- Figure 5 shows a single equalizer using the proposed ID transform approach using sixteen points.
- the one dimensional transforms are numbered 105 to 109 in the figure.
- the sixteen transform output values from each of the five transforms are then multiplied component wise by the transformed equalizer tap values H?( ⁇ ) .
- the term H?(n) represents the sixteen transformed coefficient values of the i' h row (five rows) for equalizer 1 of figure 5 at time n .
- Multiplication in the transform domain is performed by the components numbered 110 to 114 in figure 5 , which comprises of eighty (five by sixteen) multipliers for this particular embodiment.
- the five rows of sixteen multiplied values are then added by component 115 in figure 5 to produce one row of sixteen values, which is then inverse transformed using component 116 in figure 5 to produce the equalizer output.
- Using such techniques to implement linear convolution for a long sequence necessitates the use of either overlap-save or overlap-add sectioning.
- Employing the overlap-save method yields ten valid output values in this embodiment.
- the section outlined is repeated for each of the 5 equalizers in the joint equalizer.
- the forward transform of the input rows only occurs once. This offers the advantage that the ID forward transform is performed once on each row input, but the transformed values are used more than once by a number of equalizer, therefore reducing the overhead cost of the forward transform.
- the complexity analysis is described here for the general case here.
- the number of rows of the multi-track equalizer is P and the filter tap width is Q .
- Two cases are considered. Firstly the case of P ⁇ Q . Both P and Q are assumed odd and each equalizer is square, with ⁇ - rows above and below the i th row for the z th equalizer. Values for x(i, ⁇ ) outside the P rows are zero. Therefore the number of non-zero rows in the i th equalizer is
- R 1 if ⁇ - ⁇ i ⁇ P- ⁇ -S ⁇ (4) (6) ⁇ -1 - + P-I + 1 if i > P-l— ⁇ - (5)
- the second case is that of ⁇ - ⁇ P ⁇ Q .
- the number of rows in the / th equalizer is
- each row has Q coefficients.
- the total number of multiplications is therefore SQ .
- the total number of additions is SQ-P as each equalizer requires 1 less addition compared to the number of multiplications.
- N 2 K , which allows the use of an FFT structure for fast forward and inverse transforms.
- the arithmetic operations required include multiplication by constants, multiplications and additions.
- a ID forward transform requires ⁇ log 2 N multiplication by constants and
- NlOg 2 N additions The same number of operations are needed for a ID inverse transform.
- a total of P forward transforms are required and each of the P individual equalizers requires one ID inverse transform, making a total of P inverse transforms.
- each individual equalizer requires SN multiplications.
- the number of additions in the transform-domain for the i th equalizer is N(R,. - 1) , as only the columns are summed. The total number of additions is then V ._ N(i? ; - 1) .
- the number of constant multiplications is PN ⁇ og 2 N
- the number of additions is 2PN log, N + N2, ( ._ o (-K,- -l) and the number of multiplications is NS .
- 16-7 + 1 10 outputs are generated for each of the 5 equalizers with each block input, this gives the following complexity measure
- the transform domain embodiment Compared to the time-domain embodiment, the transform domain embodiment exhibits reduced complexity measures. It is noted that transform domain multiplications will be more complex in nature than time domain multiplications, though for low transform lengths ( ⁇ 256 ), Number Theoretic Transforms (NTTs) can be a practical solution, whereby the the complexity of the the transform domain multiplication is approximately twice that of the time domain multiplication. However, for certain values of N, the number of constant multiplications can be reduced to zero. It will also be readily appreciated that any transform that has the convolution property may be utilized. Joint Detection is required to account for the existence of intersymbol interference in two dimensions i.e. intersymbol interference along the track as well as intersymbol between adjacent tracks.
- the Joint Detector must have knowledge this two dimensional interference. As is well known, this can be achieved by choosing an intersymbol interference target. This can be either predetermined (known as a partial response), programmable or adaptive. The choice of partial response target depends on the density of recording as well as the sources of noise. For example, in the magnetic recording case, partial responses based on the PR4 and EPR4 targets can be considered and extended to two dimensions.
- Example two dimensional targets are a 0 -a
- Table 1 Some example 2D partial responses.
- the optimum detection of data in the presence of ISI can be achieved with maximum likelihood detection through the use of the Viterbi algorithm.
- the Viterbi algorithm can also be used but its implementation complexity can be prohibitive.
- the state of the channel can be represented as 3 columns of binary data with one column representing the channel input. This information is sufficient to generate one column ( N r + 2 samples) of channel outputs.
- Viterbi detector with 2 W ' states each with 2 Nr branches.
- this would result in excess of 10 7 states each with 256 branches.
- This is far too complex to implement at the type of data rates required. Hence a reduction in the complexity of the detector is required.
- a reduced state version of a multi-track detector is reported, though is only considered for a two track system. DETECTION WITH A TIME VARYING TRELLIS.
- the disclosed invention achieves practical detection complexity by first modeling the channel as a time varying finite state machine which generates a single output at a time.
- Fig. 7 shows the state information required. In this case the implicit zeros in the guard band are explicitly shown as they represent important state information.
- the channel state is represented with 3N r + 2 bits plus the 6 zero values.
- a full Viterbi detector for this channel requires 2 iNr+2 states which is still prohibitively large. However, each state has only 2 branches.
- the time varying nature can be handled by simply extending the trellis with a single branch for each of the forced zeros. This time varying property of the trellis is important as it represents key boundary information and failure to use this information will result in a loss in detection performance.
- Fig 8 shows the joint detection structure.
- the parallel input samples 801,802,803,804 are converted in to a serial stream by the parallel to serial converter 805.
- the output of this converter 809 is then passed to the branch metric units (BMU).
- 3 branch metric units 806,807 and 808 are shown.
- These units use the serialized sample 809 to compute a 2 branch metrics for each of the M paths that are retained.
- branch metric unit 806 uses the serialized sample 809 and the bits in the path memory 812 to compute a branch metric for the case of the current input bit being a logic 1 and the current input bit being a logic 0.
- branch metric unit 807 uses the serialized sample 809 and the bits in the path memory 814 to compute a branch metric for the case of the current input bit being a logic 1 and the current input bit being a logic 0 and finally branch metric unit 808 uses the serialized sample 809 and the bits in the path memory 816 to compute a branch metric for the case of the current input bit being a logic 1 and the current input bit being a logic 0.
- branch metric unit 807 uses the serialized sample 809 and the bits in the path memory 816 to compute a branch metric for the case of the current input bit being a logic 1 and the current input bit being a logic 0.
- the branch metrics from branch metric unit 806 are added to the corresponding path metric 811, while the branch metrics from branch metric unit 807 are added to the corresponding path metric 813 and the branch metrics from branch metric unit 808 are added to the corresponding path metric 815.
- the path metrics are updated such that a logic 1 is appended if the chosen path metric corresponds to a branch metric output calculated assuming the current input bit being a logic 1. Otherwise a logic 0 is appended if the chosen path metric corresponds to a branch metric output calculated assuming the current input bit being a logic 0.
- the time varying nature of the trellis is handled by the parallel to serial converter 805, inserting a sentinel into its output 809 at each boundary. These are recognized by the branch metrics units and acted on such as to produce a best branch metric for the current input bit being a logic 0 and the worst branch metric for the current input bit being a logic 1. In this way the selected M best branch metrics all correspond to path memories with logic 0 values at the boundary positions.
- the final decision is delivered as the last bit of the best path memory 812 and output on 822 to a serial to parallel converter. This converts the serial detected bits back to parallel format while ignoring the logic 0 boundary bits.
- the selection of the best M paths from IM candidates is well known and can be achieved by sorting or selection.
- the key disclosure of the present invention is the representation of the two dimensional interference as a time varying one dimensional interference and the application of the reduced complexity detection via the application of a detector which keeps a relatively small number of survivor paths thus resulting in practical complexity yet good detection performance.
- the data detection apparatus is capable of detecting data in the presence of two dimensional intersymbol interference using one or more parallel input channels and resulting in one or more parallel output data streams.
- the method disclosed has as an element one or more signal processing channels operating independently and in parallel and comprises a joint detection processor that uses the signal from one or more of the parallel channels to produce detected data for one or more parallel output data streams.
- one or more signal processing channels operate independently and in parallel and comprises a joint equalizer that uses the signal from one or more of the parallel channels to produce one or more parallel signals which can be further processed by independent processors and then applied to a joint detection processor that uses the signal from one or more of the parallel channels to produce detected data for one or more parallel output data streams.
- the joint equalizer is implemented by applying any one dimensional transform, which possesses the convolution property, to one or more channels of the equalizer input data and which the transformed data is used to apply equalization by multiplying the transformed data by a predetermined, programmed or adaptive coefficients to produce equalized or partially equalized data in the transform domain.
- the equalized or partially equalized data in the transform domain for one or more channels is summed together and then transformed back to the original signal domain.
- the joint detector is implemented by operating on one or more parallel detector inputs by tracking these inputs as if they resulted from a one dimensional model of a two dimensional intersymbol interference channel.
- the one dimensional model of a two dimensional intersymbol interference channel is time variant, with this time variance representing boundary information.
- the boundary information can represent known information.
- the detection of the data can be implemented with a reduced state detection method in which only a limited number of all the possible states are considered.
- the reduced state detection method can be based on a breadth first search of the time varying trellis.
- the one or more parallel detector input data is converted to serial data in which the boundary information is denoted by additional special symbols in the serial information and this serial data is processed in a detector to produce serial data decisions and one or more of these serial data decisions are converted back to parallel data.
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US11/718,407 US7900124B2 (en) | 2004-11-08 | 2005-11-07 | Bit detection for multitrack digital data storage |
CN2005800381498A CN101057293B (en) | 2004-11-08 | 2005-11-07 | Bit detection method form recording carrier and data detection device |
JP2007539705A JP2008532192A (en) | 2004-11-08 | 2005-11-07 | Bit detection in multitrack digital data storage |
EP05800620A EP1815474A1 (en) | 2004-11-08 | 2005-11-07 | Bit detection for multitrack digital data storage |
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US8199800B2 (en) * | 2008-08-04 | 2012-06-12 | Seagate Technology Llc | Off-track aware equalizer design for bit-patterned media |
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US7900124B2 (en) | 2011-03-01 |
CN101057293B (en) | 2010-05-26 |
JP2008532192A (en) | 2008-08-14 |
KR20070085770A (en) | 2007-08-27 |
EP1815474A1 (en) | 2007-08-08 |
US20090052293A1 (en) | 2009-02-26 |
CN101057293A (en) | 2007-10-17 |
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