WO2006034120A2 - Integrated bst microwave tunable devices using buffer layer transfer method - Google Patents

Integrated bst microwave tunable devices using buffer layer transfer method Download PDF

Info

Publication number
WO2006034120A2
WO2006034120A2 PCT/US2005/033339 US2005033339W WO2006034120A2 WO 2006034120 A2 WO2006034120 A2 WO 2006034120A2 US 2005033339 W US2005033339 W US 2005033339W WO 2006034120 A2 WO2006034120 A2 WO 2006034120A2
Authority
WO
WIPO (PCT)
Prior art keywords
bst
layer
silicon dioxide
single crystal
microwave device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2005/033339
Other languages
French (fr)
Other versions
WO2006034120A3 (en
Inventor
Ii-Doo Kim
Harry L. Tuller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Massachusetts Institute of Technology
Original Assignee
Massachusetts Institute of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Massachusetts Institute of Technology filed Critical Massachusetts Institute of Technology
Publication of WO2006034120A2 publication Critical patent/WO2006034120A2/en
Publication of WO2006034120A3 publication Critical patent/WO2006034120A3/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/18—Phase-shifters
    • H01P1/181—Phase-shifters using ferroelectric devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/20—Frequency-selective devices, e.g. filters
    • H01P1/201—Filters for transverse electromagnetic waves
    • H01P1/203—Strip line filters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00—Waveguides; Transmission lines of the waveguide type
    • H01P3/003—Coplanar lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Definitions

  • the invention relates to the field of BST microwave tunable devices, and in particular to an integrated BST microwave tunable device using a buffer layer transfer method.
  • BST (Ba 1 Sr)TiO 3 (BST), (Ba 5 Zr)TiO 3 (BZT) (Ba 5 Hf)TiO 3 (BHT), SrTiO 3 (ST), Bii.sZni.oNb L sO- / (BZN series, B : Bi, Ba) and related thin films are promising materials for tunable microwave devices application such as electronically tunable mixers, oscillators, and phase shifters and filters. It will be appreciated by those of skill in the art that BST is representative of one or more related perovskite-like tunable dielectric materials.
  • An objective of the invention is to integrate tunable components into monolithic microwave integrated circuits (MMICs).
  • MMICs monolithic microwave integrated circuits
  • microstrip planes are the most common transmission line component for microwave frequencies, the ground-plane is difficult to access for shunt connections necessary for active devices, when used in MMICs.
  • the CPW Coplanar Waveguide
  • the possibility of creating BST microwave tunable devices on oxide substrates has been demonstrated in recent years. There is a great incentive to replicate these achievements on silicon-based wafers for integrated microwave device applications.
  • a BST microwave device includes a single crystal oxide wafer.
  • a silicon dioxide layer is formed on the single crystal oxide layer.
  • a silicon substrate is bonded on the silicon dioxide layer.
  • a BST layer is formed on the single crystal oxide layer.
  • a method of forming BST microwave device includes providing a single crystal oxide wafer and forming a silicon dioxide layer on the single crystal oxide layer. A silicon substrate is bonded on the silicon dioxide layer. Also, the method includes forming a BST layer on the single crystal oxide layer.
  • FIGs. IA- IE are schematic diagrams illustrating wafer bonding and ion cutting of SiO 2 covered single crystals.
  • FIGs. 2A-2C are schematic diagrams illustrating wafer bonding of SiO 2 covered double side polished single crystals and Si-micromachining with/without ion implantation.
  • Single crystal (MgO, SrTiO 3 , LaAlO 3 , Al 2 O 3 , MgAl 2 O 4 , YSZ, CeO 2 ) buffer layers are first separated from the single crystal oxide wafers by a hydrogen or helium induced cutting method and then transferred to a Si wafer using wafer bonding technology.
  • FIGs. 1A-1E are schematic diagrams illustrating wafer bonding and ion cutting of
  • FIG. IA shows a SiO 2 thin or thick layer 2 that is deposited on a single crystal oxide wafer 4 (e.g. MgO, SrTiO 3 , LaAlO 3 , Al 2 O 3 , MgAl 2 O 4 , YSZ, CeO 2 ) using PECVD, LPCVD, and/or ALD for purposes of subsequent wafer bonding to the Si wafer 8.
  • a single crystal oxide wafer 4 e.g. MgO, SrTiO 3 , LaAlO 3 , Al 2 O 3 , MgAl 2 O 4 , YSZ, CeO 2
  • PECVD LPCVD
  • ALD atomic layer deposition
  • FIG. IB shows hydrogen being implanted into the SiO 2 covered single crystal 5 to a desired depth 6 (the hydrogen stopping range) at which cleavage is desired.
  • FIG. 1C shows a receiver Si (or SiO 2 /Si) substrate 8 being bonded to the SiO 2 deposited single crystal 5 through direct wafer bonding technology.
  • FIG. ID shows the bonded wafers 12 being separated along the hydrogen implantation stopping region 6 by heat treatment, resulting in the transfer of a thin pure single crystal oxide 10 to the Si substrate 8.
  • FIG. IE shows high quality BST thin films 13 being deposited onto the single crystal oxide layer 10 bonded to the Si substrate 8. This film 13 is suitable for the fabrication of microwave tunable components such as resonator, phase shifter, tunable bandpass filter, or the like.
  • FIGs. 2A-2C are schematic diagrams illustrating wafer bonding of SiO 2 covered double side polished single crystals and Si-micromachining with/without ion implantation.
  • FIG. 2A shows a thin or thick SiO 2 layer 14 being deposited onto various single crystal oxide wafers 16 (e.g. MgO, SrTiO 3 , LaAlO 3 , Al 2 O 3 , MgAl 2 O 4 , YSZ, CeO 2 ) using PECVD, LPCVD, and/or ALD.
  • FIG. 2B shows a receiver substrate 18, such as Si or thick SiO 2 /Si, being bonded to the SiO 2 deposited single crystal 14 through direct wafer bonding technology.
  • FIG. 2C shows high quality BST thin films 20 being deposited on the single crystal oxide layer 16.
  • This film 20 is suitable for the fabrication of microwave components such as resonator, phase shifter and tunable bandpass filters, or the like.
  • a portion of the Si substrate 18 below the microwave device is removed by micro-machining methods, for example, anisotropic KOH chemical etch.
  • Au electrodes 22 are formed on the BST layer 20 to complete microwave circuits.
  • the invention is an alternative to the buffer layer transfer technique by wafer bonding and ion cutting method.
  • the advantage of the invention is the provision of the same environment as with single crystal substrate growth, for example, low surface roughness and high quality material.

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Optical Modulation, Optical Deflection, Nonlinear Optics, Optical Demodulation, Optical Logic Elements (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

A BST microwave device includes a single crystal oxide wafer. A silicon dioxide layer is formed on the single crystal oxide layer. A silicon substrate is bonded on the silicon dioxide layer. A BST layer is formed on the single crystal oxide layer.

Description

INTEGRATED BST MICROWAVE TUNABLE DEVICES USING BUFFER LAYER
TRANSFER METHOD
PRIORITY INFORMATION
This application claims priority from provisional application Ser. No. 60/610,996 filed September 17, 2004, which is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION The invention relates to the field of BST microwave tunable devices, and in particular to an integrated BST microwave tunable device using a buffer layer transfer method.
(Ba1Sr)TiO3 (BST), (Ba5Zr)TiO3 (BZT) (Ba5Hf)TiO3 (BHT), SrTiO3 (ST), Bii.sZni.oNbLsO-/ (BZN series, B : Bi, Ba) and related thin films are promising materials for tunable microwave devices application such as electronically tunable mixers, oscillators, and phase shifters and filters. It will be appreciated by those of skill in the art that BST is representative of one or more related perovskite-like tunable dielectric materials.
An objective of the invention is to integrate tunable components into monolithic microwave integrated circuits (MMICs). Although microstrip planes are the most common transmission line component for microwave frequencies, the ground-plane is difficult to access for shunt connections necessary for active devices, when used in MMICs. The CPW (Coplanar Waveguide) is an attractive alternative, especially due to the ease of monolithic integration, as the ground plane runs adjacent to the transmission line. The possibility of creating BST microwave tunable devices on oxide substrates has been demonstrated in recent years. There is a great incentive to replicate these achievements on silicon-based wafers for integrated microwave device applications.
Much work has been done to obtain epitaxially grown ferroelectric thin films on Si substrates. Currently, chemical vapor deposition methods such as MBE (Molecular Beam Epitaxy) and ALD (Atomic Layer Deposition) and as well as physical vapor deposition methods such as pulsed laser deposition have been used. However, it has not been easy to obtain high quality buffer films without residual stress and defects resulting from a dimensional misfit between the crystal lattices.
SUMMARY OF THE INVENTION
According to one aspect of the invention, there is provided a BST microwave device. The BST microwave device includes a single crystal oxide wafer. A silicon dioxide layer is formed on the single crystal oxide layer. A silicon substrate is bonded on the silicon dioxide layer. A BST layer is formed on the single crystal oxide layer.
According to another aspect of the invention, there is provided a method of forming BST microwave device. The method includes providing a single crystal oxide wafer and forming a silicon dioxide layer on the single crystal oxide layer. A silicon substrate is bonded on the silicon dioxide layer. Also, the method includes forming a BST layer on the single crystal oxide layer.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGs. IA- IE are schematic diagrams illustrating wafer bonding and ion cutting of SiO2 covered single crystals; and
FIGs. 2A-2C are schematic diagrams illustrating wafer bonding of SiO2 covered double side polished single crystals and Si-micromachining with/without ion implantation.
DETAILED DESCRIPTION OF THE INVENTION
Single crystal (MgO, SrTiO3, LaAlO3, Al2O3, MgAl2O4, YSZ, CeO2) buffer layers, with low loss, are first separated from the single crystal oxide wafers by a hydrogen or helium induced cutting method and then transferred to a Si wafer using wafer bonding technology. The basic structure for BST or Bi1-5Zn1-0NbLsO7 (BZN series, B : Bi, Ba) microwave devices are developed in one of the two following methods: (1) wafer bonding and ion cutting of SiO2 covered single crystals, with ion implantation or (2) wafer bonding of SiO2 covered double side polished single crystals and Si-micromachining (with/without ion implantation). FIGs. 1A-1E are schematic diagrams illustrating wafer bonding and ion cutting of
SiO2 covered single crystals. FIG. IA shows a SiO2 thin or thick layer 2 that is deposited on a single crystal oxide wafer 4 (e.g. MgO, SrTiO3, LaAlO3, Al2O3, MgAl2O4, YSZ, CeO2) using PECVD, LPCVD, and/or ALD for purposes of subsequent wafer bonding to the Si wafer 8. Note Si-SiO2 or SiO2-SiO2 bonding is much easier, if one achieves very clean surfaces. FIG. IB shows hydrogen being implanted into the SiO2 covered single crystal 5 to a desired depth 6 (the hydrogen stopping range) at which cleavage is desired. Note that He can also be used for implantation. FIG. 1C shows a receiver Si (or SiO2/Si) substrate 8 being bonded to the SiO2 deposited single crystal 5 through direct wafer bonding technology. FIG. ID shows the bonded wafers 12 being separated along the hydrogen implantation stopping region 6 by heat treatment, resulting in the transfer of a thin pure single crystal oxide 10 to the Si substrate 8. FIG. IE shows high quality BST thin films 13 being deposited onto the single crystal oxide layer 10 bonded to the Si substrate 8. This film 13 is suitable for the fabrication of microwave tunable components such as resonator, phase shifter, tunable bandpass filter, or the like.
FIGs. 2A-2C are schematic diagrams illustrating wafer bonding of SiO2 covered double side polished single crystals and Si-micromachining with/without ion implantation. FIG. 2A shows a thin or thick SiO2 layer 14 being deposited onto various single crystal oxide wafers 16 (e.g. MgO, SrTiO3, LaAlO3, Al2O3, MgAl2O4, YSZ, CeO2) using PECVD, LPCVD, and/or ALD. FIG. 2B shows a receiver substrate 18, such as Si or thick SiO2/Si, being bonded to the SiO2 deposited single crystal 14 through direct wafer bonding technology. If a thin buffer layer is needed, one can polish back the oxide single crystal 14. FIG. 2C shows high quality BST thin films 20 being deposited on the single crystal oxide layer 16. This film 20 is suitable for the fabrication of microwave components such as resonator, phase shifter and tunable bandpass filters, or the like. To reduce loss through the Si substrate 18, a portion of the Si substrate 18 below the microwave device is removed by micro-machining methods, for example, anisotropic KOH chemical etch. Note that Au electrodes 22 are formed on the BST layer 20 to complete microwave circuits.
The invention is an alternative to the buffer layer transfer technique by wafer bonding and ion cutting method. The advantage of the invention is the provision of the same environment as with single crystal substrate growth, for example, low surface roughness and high quality material.
Although the present invention has been shown and described with respect to several preferred embodiments thereof, various changes, omissions and additions to the form and detail thereof, may be made therein, without departing from the spirit and scope of the invention.
What is claimed is:

Claims

CLAIMS 1. A BST microwave device comprising: a single crystal oxide wafer; a silicon dioxide layer that is formed on said single crystal oxide layer; a silicon substrate that is bonded on said silicon dioxide layer; and a BST layer that is formed on said single crystal oxide layer.
2. The BST microwave device of claim 1, wherein said single crystal oxide wafer comprises MgO, SrTiO3, LaAlO3, Al2O3, MgAl2O4, YSZ, or CeO2.
3. The BST microwave device of claim 1, wherein said silicon dioxide layer is formed by depositing silicon dioxide using CVD, PECVD, LPCVD, or ALD.
4. The BST microwave device of claim 1, wherein said silicon substrate is bonded to silicon dioxide layer using direct wafer bonding technology.
5. The BST microwave device of claim 1, wherein said BST layer suitable for the fabrication of an optical component.
6. The BST microwave device of claim 4, wherein said silicon dioxide layer is exposed to hydrogen or helium ion implantation.
7. The BST microwave device of claim 1, wherein said silicon substrate comprises a removed portion so as to reduce microwave loss in said BST microwave device.
8. The BST microwave device of claim 7, wherein said removed portion is formed using KOH chemical etch.
9. The BST microwave device of claim 5, wherein said optical component comprises a microwave tunable component.
10. The BST microwave device of claim 9, wherein said microwave tunable component comprises a resonator, phase shifter, or tunable bandpass filter.
11. A method of forming BST microwave device comprising: providing a single crystal oxide wafer; forming a silicon dioxide layer on said single crystal oxide layer; bonding a silicon substrate on said silicon dioxide layer; and forming a BST layer on said single crystal oxide layer.
12. The method of claim 11, wherein said single crystal oxide wafer comprises MgO, SrTiO3, LaAlO3, Al2O3, MgAl2O4, YSZ, or CeO2.
13. The method of claim 11 , wherein said silicon dioxide layer is formed by depositing silicon dioxide using CVD, PECVD, LPCVD, or ALD.
14. The method of claim 11, wherein said silicon substrate is bonded to silicon dioxide layer using direct wafer bonding technology.
15. The method of claim 11, wherein said BST layer suitable for the fabrication of an optical component.
16. The method of claim 14, wherein said silicon dioxide layer is exposed to hydrogen or helium ion implantation.
17. The method of claim 11, wherein said silicon substrate comprises a removed portion so as to reduce microwave loss in said BST microwave device.
18. The method of claim 17, wherein said removed portion is formed using KOH chemical etch.
19. The method of claim 15, wherein said optical component comprises a microwave tunable component.
20. The method of claim 19, wherein said microwave tunable component comprises a resonator, phase shifter, or tunable bandpass filter.
PCT/US2005/033339 2004-09-17 2005-09-19 Integrated bst microwave tunable devices using buffer layer transfer method Ceased WO2006034120A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US61099604P 2004-09-17 2004-09-17
US60/610,996 2004-09-17

Publications (2)

Publication Number Publication Date
WO2006034120A2 true WO2006034120A2 (en) 2006-03-30
WO2006034120A3 WO2006034120A3 (en) 2006-06-01

Family

ID=35453292

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/033339 Ceased WO2006034120A2 (en) 2004-09-17 2005-09-19 Integrated bst microwave tunable devices using buffer layer transfer method

Country Status (2)

Country Link
US (1) US7579621B2 (en)
WO (1) WO2006034120A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2926674B1 (en) * 2008-01-21 2010-03-26 Soitec Silicon On Insulator METHOD FOR MANUFACTURING COMPOSITE STRUCTURE WITH STABLE BONDING OXIDE LAYER
KR101440608B1 (en) * 2010-10-26 2014-09-15 가부시키가이샤 아이에이치아이 Spiral-grooved thrust bearing
CN110078017B (en) 2018-01-26 2021-11-05 沈阳硅基科技有限公司 A kind of processing method of silicon wafer through cavity structure
CN110952068B (en) * 2019-11-20 2021-07-06 电子科技大学 Patterned single crystal thin film preparation method, patterned single crystal thin film and resonator
CN111850692A (en) * 2020-07-07 2020-10-30 中国科学院上海微系统与信息技术研究所 A kind of lithium niobate self-supporting film and preparation method thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5994207A (en) * 1997-05-12 1999-11-30 Silicon Genesis Corporation Controlled cleavage process using pressurized fluid
US5877070A (en) * 1997-05-31 1999-03-02 Max-Planck Society Method for the transfer of thin layers of monocrystalline material to a desirable substrate
FR2774214B1 (en) * 1998-01-28 2002-02-08 Commissariat Energie Atomique PROCESS FOR PRODUCING A SEMICONDUCTOR TYPE STRUCTURE ON INSULATOR AND IN PARTICULAR SiCOI
US6500732B1 (en) * 1999-08-10 2002-12-31 Silicon Genesis Corporation Cleaving process to fabricate multilayered substrates using low implantation doses
US6436614B1 (en) * 2000-10-20 2002-08-20 Feng Zhou Method for the formation of a thin optical crystal layer overlying a low dielectric constant substrate
FR2817394B1 (en) 2000-11-27 2003-10-31 Soitec Silicon On Insulator METHOD FOR MANUFACTURING A SUBSTRATE, IN PARTICULAR FOR OPTICS, ELECTRONICS OR OPTOELECTRONICS AND SUBSTRATE OBTAINED THEREBY
US20030064535A1 (en) 2001-09-28 2003-04-03 Kub Francis J. Method of manufacturing a semiconductor device having a thin GaN material directly bonded to an optimized substrate
US20030186521A1 (en) 2002-03-29 2003-10-02 Kub Francis J. Method of transferring thin film functional material to a semiconductor substrate or optimized substrate using a hydrogen ion splitting technique
US6855643B2 (en) * 2002-07-12 2005-02-15 Padmapani C. Nallan Method for fabricating a gate structure
US6764864B1 (en) * 2003-04-17 2004-07-20 Freescale Semiconductor, Inc. BST on low-loss substrates for frequency agile applications
KR100596391B1 (en) * 2004-12-03 2006-07-04 한국전자통신연구원 Ferroelectric / Petraelectric multilayer thin film, method of manufacturing the same, and ultra-high frequency variable device using the same

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
COLE M W ET AL: "Evaluation of Ta2O5 as a buffer layer film for integration of microwave tunable Ba1-xSrxTiO3 based thin films with silicon substrates" JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, vol. 92, no. 7, 1 October 2002 (2002-10-01), pages 3967-3973, XP012057372 ISSN: 0021-8979 *
ITOTIA I Y ET AL: "DC bias effects on bulk silicon and porous silicon substrates" IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM. 2003 DIGEST. APS. COLUMBUS, OH, JUNE 22 - 27, 2003, NEW YORK, NY : IEEE, US, vol. VOL. 4 OF 4, 22 June 2003 (2003-06-22), pages 663-666, XP010649868 ISBN: 0-7803-7846-6 *
JUN SUNGJIN ET AL: "Dielectric properties of strained (Ba,Sr)TiO3 thin films epitaxially grown on Si with thin yttria-stabilized zirconia buffer layer" APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 78, no. 17, 23 April 2001 (2001-04-23), pages 2542-2544, XP012027833 ISSN: 0003-6951 *
KIM S ET AL: "GROWING BATIO3 THIN FILMS ON SI(100) WITH MGO-BUFFER LAYERS BY SPUTTERING" THIN SOLID FILMS, ELSEVIER-SEQUOIA S.A. LAUSANNE, CH, vol. 281/282, no. 1/2, 1 August 1996 (1996-08-01), pages 449-452, XP000643437 ISSN: 0040-6090 *
LIN J T S ET AL: "Nova cut <TM> process: fabrication of silicon on insulator materials" 2002 IEEE INTERNATIONAL SOI CONFERENCE PROCEEDINGS. WILLIAMSBURG, VA, OCT. 7 - 10, 2002, IEEE INTERNATIONAL SOI CONFERENCE, NEW YORK, NY : IEEE, US, 7 October 2002 (2002-10-07), pages 189-191, XP010611058 ISBN: 0-7803-7439-8 *
TRENT C R ET AL: "Design and tolerance analysis of a 21 Ghz CPW-fed, slot-coupled, microstrip antenna on etched silicon" IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM. 2002 DIGEST. APS. SAN ANTONIO, TX, JUNE 16 - 21, 2002, NEW YORK, NY : IEEE, US, vol. VOL. 1 OF 4, 16 June 2002 (2002-06-16), pages 402-405, XP010591938 ISBN: 0-7803-7330-8 *

Also Published As

Publication number Publication date
US20060060894A1 (en) 2006-03-23
WO2006034120A3 (en) 2006-06-01
US7579621B2 (en) 2009-08-25

Similar Documents

Publication Publication Date Title
US6555946B1 (en) Acoustic wave device and process for forming the same
EP0601950A2 (en) Method of producing a thin silicon-on-insulator layer
US7354840B1 (en) Method for opto-electronic integration on a SOI substrate
US20040151463A1 (en) Optical waveguide structure and method for fabricating the same
US6841490B2 (en) Semiconductor substrate, SOI substrate and manufacturing method therefor
WO1998020606A2 (en) Tunable dielectric flip chip varactors
US20030020565A1 (en) MEMS resonators and methods for manufacturing MEMS resonators
US7579621B2 (en) Integrated BST microwave tunable devices using buffer layer transfer method
US6638872B1 (en) Integration of monocrystalline oxide devices with fully depleted CMOS on non-silicon substrates
US11657314B1 (en) Microwave-to-optical quantum transducers
US11611001B2 (en) Localized strain fields in epitaxial layer over cREO
US12015185B2 (en) Quantum transducers with embedded optical resonators
US7479696B2 (en) Integrated BST microwave tunable devices fabricated on SOI substrate
US7402853B2 (en) BST integration using thin buffer layer grown directly onto SiO2/Si substrate
KR102323616B1 (en) Methods of fabricating structures for forming three-dimensional monolithic integrated circuits
US20020179931A1 (en) Structure and method for fabricating on chip radio frequency circulator/isolator structures and devices
Boikov et al. Epitaxial heterostructures YBa2Cu3O7− δ/KTaO3 for microwave applications
US6764864B1 (en) BST on low-loss substrates for frequency agile applications
WO2024027920A1 (en) Method for producing a surface acoustic wave resonator
Wessels Thin film ferroelectrics for guided wave devices
EP1338029A1 (en) Semiconductor structure having high dielectric constant material
EP0371849A1 (en) Method of forming a thin silicon layer on an insulator
US20030020068A1 (en) Structure and method for integrating compound semiconductor structures and devices utilizing the formation of a compliant substrate for materials used to form the same
KR20250097835A (en) Method for manufacturing a piezoelectric layer on a substrate
Yoshino et al. Transmission Electron Microscopy Stjudy of Initerface Microstrucure in ZnO Thin Films Grown on Various Substrates (Glass, Au, Sl, α-Al2O3)

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KP KR KZ LC LK LR LS LT LU LV LY MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase