WO2006025782A1 - Voltage source converter - Google Patents
Voltage source converter Download PDFInfo
- Publication number
- WO2006025782A1 WO2006025782A1 PCT/SE2005/001250 SE2005001250W WO2006025782A1 WO 2006025782 A1 WO2006025782 A1 WO 2006025782A1 SE 2005001250 W SE2005001250 W SE 2005001250W WO 2006025782 A1 WO2006025782 A1 WO 2006025782A1
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- WO
- WIPO (PCT)
- Prior art keywords
- switching
- pulse
- order
- fundamental frequency
- voltage
- Prior art date
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- 239000013256 coordination polymer Substances 0.000 claims abstract description 5
- 238000000034 method Methods 0.000 claims description 39
- 230000009471 action Effects 0.000 claims description 26
- 239000004065 semiconductor Substances 0.000 claims description 21
- 230000035484 reaction time Effects 0.000 claims description 13
- 238000005259 measurement Methods 0.000 claims description 8
- 238000004590 computer program Methods 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 7
- 230000006870 function Effects 0.000 description 7
- 230000006399 behavior Effects 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 5
- 230000003111 delayed effect Effects 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 230000003044 adaptive effect Effects 0.000 description 4
- 230000008859 change Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 239000013307 optical fiber Substances 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 238000012886 linear function Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
- H02M7/53873—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current with digital control
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
Definitions
- the present invention relates to a voltage source converter (VSC) containing a plurality of self-commutating semiconducting elements. More precisely the invention relates to a method and an apparatus for controlling a VSC by a modulation signal, such as a pulse width modulation (PWM) signal.
- a modulation signal such as a pulse width modulation (PWM) signal.
- PWM pulse width modulation
- the invention concerns a VSC comprising a plurality of series connected semiconducting elements and especially a converter station of a high voltage direct current (HVDC) transmission line comprising such a VSC.
- HVDC high voltage direct current
- the PWM controlled converter in this description includes an inverter as well as a rectifier. Such converter may be used in a low power applications such as motor drive systems, as well as in high power applications such as high voltage direct current (HVDC) transmission systems and static var compensation (STACOM) systems.
- HVDC high voltage direct current
- STACOM static var compensation
- a converter and more precisely a voltage source converter provides the electrical coupling between a DC voltage system and an AC voltage system comprising one or a plurality of phases.
- a converter has either the function of a rectifier, which delivers electric power from the AC system to the DC system, or an inverter, which delivers electric power from the DC system to the AC system.
- a converter may be used for variable-speed control of a synchronous or asynchronous rotating machine as well as transmission of high voltage direct current (HVDC) over long distances.
- HVDC high voltage direct current
- the simplest converter comprises a two level bridge composed of two valves.
- Each valve comprises a single or a plurality of switches.
- a three phase converter thus comprises a bridge with six valves where each valve comprises at least one switch.
- a switch comprises a turn-off device and a diode in antiparallel connection therewith. By this arrangement the current is controllable stopped in one direction but freely passing in the opposite direction.
- each valve comprises a plurality of series connected switches with such turn-off devices and antiparallel diodes.
- the amplitude, the phase angle and the frequency of the fundamental frequency as well as the harmonic distortion is controlled by alternatively switching on and off the two valves on the bridge connected to the same phase. Thereby, the AC current is controlled as desired.
- the pulse signals for controlling the switches are generated according to a selected Pulse Width Modulation (PWM) method.
- PWM Pulse Width Modulation
- PWM Pulse Width Modulation
- SPWM Sinusoidal Pulse Width Modulation
- OPWM Optimum Pulse Width Modulation
- the modulation techniques in the prior art are based on the assumption that the switching elements of the converter operate in an ideal manner, that is, they switch on or off exactly at the instants the control dictates. These are reckoned as ideal switching instants in the following text. In reality, however, the converter output voltage waveform deviates from what the control originally dictated.
- a switching device has a delayed reaction to its control signal at a turn-on and a turn-off switching respectively.
- the delayed reaction depends on the type of semiconductor, on its current and voltage rating, on the controlling waveforms at the gate electrode, on the device temperature, and in particularly on the actual current to be switched.
- a second reason is the blanking time, or "dead time", which must be inserted between an opening (turn-off) order of a first valve and a closing (turn-on) order of a second valve on the same bridge. The presence of a blanking time is causing the two valves of a converter bridge never to be closed at the same time in order to prevent a short- circuit.
- a third reason which contributes to the deformation of the output voltage is the difference in the rising and descending rate, dv/dt, of the voltage across the switch devices during turn-off and turn-on. This may be due to the existence of a snubber circuit or parasitic capacitance in the diodes. The deformation is noticeable in particular when the switching current is low.
- the action time of a valve is in the following text defined as the time difference between the actual switching order and its actual switching event.
- the action time comprises the delayed reaction of the switching device, the blanking time and the variation due to the low rising and descending rate of the voltage (dv/dt).
- dv/dt the low rising and descending rate of the voltage
- the object of the method is to reduce or eliminate the effect of the blanking time (referred as dead time) in an inverter or a controlled rectifier.
- the known inverter is controlled by a modulator and a discriminator.
- the role of the modulator is to create a set wave, whereas the discriminator makes it possible to split this wave into a plurality of waves which are intended for individually controlling the various switches.
- the purpose of the discriminator is to introduce a delay on the closing of the corresponding switches, so that it is always certain that, when the command to close one switch is given, the opposite switch is already open.
- the known method suggest the use of two corrected control set signals, one for the case when the current is an output current and one for the case when the current is an input current. It is the direction of the current in the load which will determine whether one or the other of the two corrected set signals is to be used. Thus the switching order is compensated for the blanking time.
- a primary object of the present invention is to provide a method and an apparatus for controlling a voltage source converter by which the precision of the switching control is raised and the influence of the errors discussed is minimized.
- a second object of the invention is to provide a method and an apparatus that eliminates the low order harmonics, for instance, 5 th and 7 th harmonics, and the instability problem in the system control.
- a further object is to determine the action time of a valve with high precision.
- Yet a further object is to provide a method suitable for converters with high current ripple, such as in high power application in a power system, as well as for converters with low current ripple, such as in drive systems and other applications.
- Still a further object is to provide a method that requires no additional hardware and which is independent on whether information from current measurement or voltage measurement is used.
- the actual switching event is detected and by a comparison of the ideal switching instant and the detected actual switching event the action time is adjusted.
- the time of the ideal switching instant is subtracted from the time of the actual switching event and added to the present action time to form an adjusted action time.
- the action time is increased and if the difference is negative the action time is decreased. If there is no difference between the ideal switching instant and the actual switching event no adjustment of the action time is needed.
- a difference in time between the ideal switching instant and the actual switching event from a first pulse may be used to correct the action time for the next pulse.
- two major considerations arises. Firstly the performance of the hardware to calculate the difference and the adjustment needed between two adjacent pulses is huge. Secondly the switching condition of the first pulse may not be the same as of the second pulse. Thus the action time could be different and the adjustment may be worse than by just calculating the instant to send the switching order.
- the adjusted action time for a selected pulse in a first period of the fundamental frequency is used to correct the actual switching order for the same pulse in a following period of the fundamental frequency.
- the information gained from the first period is used to determine the switching order in a following period.
- the action time for a pulse in a first period of a fundamental frequency there will be plenty of time to calculate the switching order adjustment for the next period of the fundamental frequency.
- the demand on the hardware performance is reduced.
- By adjusting the action time of the same pulse in adjacent periods the variation related to the delayed reaction of a component and its working condition is accounted for since the switching condition would be the same for a corresponding pulse in adjacent periods of the fundamental frequency.
- the objects are achieved by a method for controlling a VSC by a PWM pulse signal comprising an ideal switching instant for each switching pulse, the method including detecting an actual switching event for a selected switching pulse in a first period of the fundamental frequency, adjusting an action time for the selected switching pulse by comparison of the ideal switching instant and the actual switching event, correcting by the adjusted action time a switching order of a corresponding pulse in a following period of the fundamental frequency.
- the working condition For each corresponding pulse in adjacent periods of the fundamental frequency the working condition is principally the same.
- the current load is the same and the position in the period is the same.
- the reaction time for two corresponding pulses in different periods would also be the same.
- a mean value of the action time is calculated for each pulse in a period from action times of equivalent pulses in preceding periods.
- the memorized value is a mean value of the previous value and the new value.
- the calculation method is either a linear mean value or an exponentially mean value method.
- the determination of the switching event is evaluated by voltage measurement across the electrodes of the semiconducting element.
- a control apparatus providing a pulse width modulation (PWM) signal for controlling the valves of a converter bridge.
- the control apparatus comprises sensing means for detecting the actual switching event of the semiconductor devices and computer means including memory means for calculating and memorizing the action time for each pulse in a period of the fundamental frequency and for correcting the actual switching order of a corresponding pulse in a following period of the fundamental frequency.
- the apparatus further comprises signaling means for producing and transferring information between the computer means, detecting means and the semiconducting elements in the converter.
- the PWM is a carrierless PWM, for instance an optimum pulse width modulation, OPWM, or a carrier based PWM, for instance a sinusoidal pulse width modulation, SPWM.
- a computer program product comprising instructions for the apparatus to perform the method of correcting the actual order instant of a pulse in a period of the fundamental frequency by information from an equivalent pulse in a preceding period of the fundamental frequency.
- the computer program also calculates the action time of each switching pulse.
- FIG Ia is graphic representation of a converter
- FIG Ib is a general representation of a bridge of a two-level converter
- FIG 2 is a graph showing an ideal pulse, the corresponding pulse to the upper and lower valve and the resulting voltage
- FIG 3 is a diagram showing different switch off behaviors
- FIG 4 is a diagram showing current ripple
- FIG 5 shows a phase leg of a high voltage converter circuit
- FIG 6 is diagram showing the delay of the switching event as a function of the current
- FIG 7 is diagram of voltage detection of the switching event
- FIG 8 is diagram of current detection of delay of switching event
- FIG 9 is a block diagram of a first embodiment of a control method and an apparatus according the invention
- FIG 10 is a block diagram of a second embodiment of a control method and an apparatus according the invention.
- a bridge of a two-level converter is shown as an example in fig 1.
- Fig Ia represents the full three phase forced commutated bridge and fig Ib is a one phase part of the bridge.
- the bridge part comprises a first valve Vl and a second valve V2 and has a lower DC terminal Ud n and an upper DC terminal U dP .
- Each valve comprises at least one switching device containing a self-commutating semiconductor element and a diode element in anti-parallel connection therewith.
- the self-commutating semiconductor element comprises an IGBT.
- the bridge has an AC terminal U ac i with an AC current i.
- a blanking time or "dead time”
- the first waveform 1 is the ideal switching pulse.
- the second waveform 2 is the order pulse to the first valve Vl and the third waveform 3 is the order pulse to the second valve V2.
- the forth waveform 4 is the resulting voltage U ac .
- the blanking times are denoted t t> . It is shown in Fig 2 that both the phase position and voltage time area, which determines the amplitude, differ from the ideal pulse, that is the commanded output voltage.
- a positive current value is defined as an input current. If the current is positive, the IGBT in the second valve V2 and the diode in the first valve Vl will conduct the current. In this case, the current in and the voltage across the second valve V2 will change almost immediately when a turn off order is received by its gate unit. However, when a switching off order is sent to the first valve Vl, the current in and the voltage across the first valve Vl will not change. The change of current and voltage on the first valve Vl occurs only when the second valve V2 receives a turn on order. As a result, the voltage at the AC terminal differs from the voltage demanded by the control. This is shown by comparing the waveform of the ideal pulse 1 and the resulting voltage 4 of the AC terminal voltage.
- the current direction can be different from one switching event to a next switching event. Then, it is possible that the diodes in both the first valve Vl and the second valve V2 conduct the current during switching off, that is, the current is negative when switching off the first valve Vl and it is changed to positive when switching off the second valve V2.
- the AC terminal voltage will be as shown in the sixth waveform 6 in Fig 2 assuming that the switching devices has an ideal switching behavior. It is also possible that the IGBTs in both the first valve Vl and the second valve V2 conduct the current during switching off. In this condition, the AC terminal voltage will be as shown in the seventh waveform 7 in Fig 2 assuming that the switching devices had an ideal switching behavior.
- the switching is affected by a non-linear behavior of the semiconducting element depending on the switching current. For two adjacent pulses these conditions are seldom the same, in particular for high power applications where the switching frequency is low. Therefore the switching time of a semiconducting element will not be the same for two adjacent pulses.
- the action time which besides the switching time also include the blanking time is affected accordingly. This means that an adaptive calculation of the action time for a following pulse from information of the previous pulse will not contribute to increase the precision of an effected switching event.
- Fig 4 the current 5 and the pulse signal 6 to the upper valve are plotted against time. It is then obvious that the current direction is different from one switching event to a next switching event.
- a phase leg of a high voltage converter circuit, to which the present invention is applicable, is schematically shown in Fig 5.
- This comprises in a conventional way, a plurality of power semiconductor devices 11 connected in series, here in the form of IGBTs, and a so- called free-wheeling diode 12 connected in anti-parallel with each such device.
- the number of power semiconductor devices connected in series is, in practice, considerably higher than indicated in Fig 5.
- the series connection of power semiconductor devices is connected to a DC capacitor 13, while the phase terminal 14 between the power semiconductor devices is connected through a phase reactor 15, for example, a phase of an alternating voltage network.
- the power semiconductor devices with diodes arranged above the phase terminal 14 in Fig 5 form an IGBT valve and those located thereunder form another IGBT valve.
- All power semiconductor devices in the IGBT valve are turned on simultaneously through signals from a drive unit 16, each schematically indicated, so that the power semiconductor devices in the first IGBT valve are conducting when a positive potential is desired at the phase terminal 14 and the power semiconductor devices in the second IGBT valve are conducting when a negative potential is desired on the phase terminal 14.
- the direct voltage across the DC capacitor 13 may be used for generating a voltage at the phase terminal 14, the fundamental component of which is an alternating voltage having a desired amplitude, frequency and phase position.
- PWM pulse width modulation pattern
- Such controlling takes place by sending control pulses to the different drive units from a control apparatus 17, which normally takes place through fiber optics.
- a control apparatus 17 which normally takes place through fiber optics.
- Fig 5 there are a first optical fiber 9 and a second redundant optical fiber 10.
- the information exchange between the control unit 17 and a drive unit 16 is bi-direction communication via an optical fiber.
- the switching order is sent from control unit 17 to drive unit 16.
- the indication signal of the switching event may be sent back from drive unit 16 to control unit 17.
- the control unit 17, which is located on a low voltage potential, is separated galvanically from the drive unit 16, which is located on a high voltage potential.
- the indication signal of a switching event is generated in the drive control unit.
- the switching devices are not ideal and the switching behavior is highly dependent on the properties of the gate drive units.
- the switching devices react delay to their control signals at turn-on and turn-off.
- the delay time depends on the type of semiconductor, on its current and voltage rating, on the controlling waveforms at the gate electrode, on the device temperature, and in particularly on the actual current to be switched. In Fig 6 the switching delay is shown in dependency of the current.
- the current direction is the most important parameter. This is because different current directions will determine if the current is flowing in IGBTs or in diodes at the switching instant. As has been discussed previously, a "dead time" or blanking time must be inserted between the turn-off order of the first valve and the turn-on order of the second valve. The blanking time dominates the switching action delay depending on the current.
- the switching order must be sent in advance to make the actual switching event occur at the ideal switching instant. However if actual switching event does not occur precisely at the ideal switching instant there is a problem of imprecision.
- this switching imprecision is that it gives additional low order of harmonics, for instance, 5 th and 7 th harmonics.
- a second consequence is that an instability problem may arise in the system control. This is due to a non-linear error between the commanded voltage and the real converter output voltage. According to the invention this non-linear error is eliminated by detecting the actual switching event, evaluating the time difference between the actual switching order and the actual switching event on line and adjusting accordingly the actual switching order of the same pulse in the next period of the fundamental frequency. This functions properly independent of current direction and amplitude.
- a first way to detect the actual switching event is to use the measured voltage.
- a voltage divider By using a voltage divider, the magnitude of a voltage across the electrodes of one power semiconductor device in a valve is measured and compared with a pre-determined reference value during the switching off process. As shown in Fig. 7, the moment when measured voltage 32 passes the reference 33 is considered as the event of the actual switching.
- a signal 34 is generated in the gate control unit of a semiconductor device. The signal is sent back to the valve control to indicate the moment of the actual switching event. In case of the failure of some individual semiconductor device, several of such signals may be sent from different semiconductor devices to their corresponding valve control.
- the time from sending the switching off order 31 to receiving the indication of actual switching event 34 will be memorized and it will be used in adjusting the corresponding switching off order in the next period of the fundamental frequency.
- the reference voltage is equal to approximately half of the steady-state voltage during the switching off status.
- a second way of determining the actual switching event is to use the measured current.
- the AC current is measured and is already used in the system control and protection.
- the measured current is sent to the valve control as an input.
- the relationship between the switching current and the time delay which is from the switch off order to actual switching off event, can be obtained via switching testing.
- Fig. 6 shows as an example the function relationship between the switching current and the time delay.
- the obtained function is installed either as a table, or an equivalent non- linear function in the valve control process.
- a corresponding time delay can be evaluated by using a table or a non-linear function 41, as shown in Fig. 8.
- the evaluated time delay for each switching off order will be memorized and it will be used in adjusting the corresponding switching off order in the next period of fundamental frequency.
- a Pulse Control Processor PCP is compensating for the delays that occur at a switching of a valve by using adaptive control.
- a drive unit comprising a valve control unit VCU is detecting the effected switching event of a pulse tp 1 of a pulse train 19 for controlling a voltage source converter valve to form a fundamental frequency 18.
- a pulse signal 20 carrying this information is sent to a pulse control processor, PCP included in the control apparatus.
- the PCP also receives a control pulse CP representing the switching order that has been executed.
- the PCP calculates by comparison of the pulse signal 20 and the control pulse CP the reaction time for the pulse tn 1 , that is how long the delay was from the switch order that was sent to the effected switching event.
- the calculated reaction time 21 for every pulse in a period of the fundamental frequency is stored in a memory M.
- a pulse width modulation controller represented by the block OPWM sends a pulse signal 22 representing the switching order dictated by the system control, that is, the ideal switching order.
- a signal 23 representing the calculated reaction time for a pulse t n 2 is added by an adding means 24 to the order signal 22 to form a new order signal 25 that is aimed to effect the actual switching event at the instant of desire.
- the new order signal 25 is sent to a control pulse creator C for effecting a switching order for the next switching.
- the total control of a converter in HVDC application is divided in three major parts. Firstly there is the system control which controls the active power/DC voltage and reactive power/ AC voltage as well as the AC current. The desired or ideal pulse is generated from the system control. Secondly there is the valve control, which corresponds to member 17 in Fig 5. Thirdly there is the drive control unit, which corresponds to member 16 in Fig 5.
- a second embodiment of a control method and apparatus is shown in Fig 10.
- the reaction time, which is represented by signal 26, for the pulse tn 1 is evaluated by using the measured AC current and a function block 41, which has been described previously and shown in Fig 8.
- the calculated reaction time 21 for every pulse in a period of the fundamental frequency is stored in a memory M.
- a signal 23 representing the calculated reaction time for a pulse t n 2 is added by an adding means 24 to the order signal 22 to form a new order signal 25 that is aimed to affect the actual switching event at the instant of desire.
- the main idea behind the invention is the use of information from one switching pulse in a first period of a harmonic period of a fundamental frequency to control the switching of an equivalent pulse in the next period.
- the determination of the effected switching event can thus be evaluated from either voltage measurements or from current measurements.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
- Dc-Dc Converters (AREA)
Abstract
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007529773A JP4833983B2 (en) | 2004-08-31 | 2005-08-30 | Voltage source converter |
EP05776425.0A EP1794873A4 (en) | 2004-08-31 | 2005-08-30 | Voltage source converter |
HK08101189.1A HK1107451A1 (en) | 2004-08-31 | 2008-01-31 | Voltage source converter |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE0402106-9 | 2004-08-31 | ||
SE0402106A SE527687C2 (en) | 2004-08-31 | 2004-08-31 | Device and method for controlling a voltage-rigid inverter |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006025782A1 true WO2006025782A1 (en) | 2006-03-09 |
Family
ID=33096057
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/SE2005/001250 WO2006025782A1 (en) | 2004-08-31 | 2005-08-30 | Voltage source converter |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP1794873A4 (en) |
JP (1) | JP4833983B2 (en) |
CN (1) | CN100511935C (en) |
SE (1) | SE527687C2 (en) |
WO (1) | WO2006025782A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102948075A (en) * | 2010-06-23 | 2013-02-27 | Abb技术有限公司 | Voltage converting apparatus and method for converting a voltage |
WO2013126414A1 (en) * | 2012-02-24 | 2013-08-29 | Analog Devices, Inc. | System and method for oscillator frequency control |
US11677330B2 (en) | 2018-11-01 | 2023-06-13 | Kabushiki Kaisha Yaskawa Denki | Power conversion device, power conversion system, and power conversion method |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101392117B1 (en) * | 2008-01-08 | 2014-05-07 | 에이비비 테크놀로지 아게 | A method for controlling a voltage source converter and a voltage converting apparatus |
ES2519165T3 (en) * | 2010-01-14 | 2014-11-06 | Siemens Aktiengesellschaft | Method and control system to control the conversion of power into a power converter |
NL2015303B1 (en) * | 2015-08-13 | 2017-02-28 | Prodrive Tech Bv | Electric power converter and MRI system comprising such converter. |
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JPH05344741A (en) | 1992-06-10 | 1993-12-24 | Hitachi Ltd | Inverter unit, air-conditioner, electric washing machine, and electric cleaner equipped with inverter unit |
US5930132A (en) * | 1997-07-16 | 1999-07-27 | Kabushiki Kaisha Wacogiken | Semiconductor device, and method and apparatus for reducing a dead time in PWM inverter |
US6169670B1 (en) * | 1999-04-08 | 2001-01-02 | Hitachi, Ltd. | Inverter apparatus operatable over extended frequency range while suppressing output error |
US6381160B1 (en) * | 1999-06-04 | 2002-04-30 | U.S. Philips Corporation | Converter comprising resonant circuit elements |
US6535403B1 (en) * | 2001-08-17 | 2003-03-18 | Abb Technology Ag | Systems and methods for inverter waveform smoothing |
US20030206039A1 (en) | 2001-06-27 | 2003-11-06 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
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JPH0318290A (en) * | 1989-06-14 | 1991-01-25 | Nippon Seiko Kk | Transistor bridge circuit |
JPH0490617A (en) * | 1990-08-03 | 1992-03-24 | Toyota Autom Loom Works Ltd | Driving circuit |
JPH06120788A (en) * | 1992-10-06 | 1994-04-28 | Mitsubishi Electric Corp | Transistor protecting device |
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2004
- 2004-08-31 SE SE0402106A patent/SE527687C2/en not_active IP Right Cessation
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2005
- 2005-08-30 JP JP2007529773A patent/JP4833983B2/en not_active Expired - Fee Related
- 2005-08-30 WO PCT/SE2005/001250 patent/WO2006025782A1/en active Application Filing
- 2005-08-30 EP EP05776425.0A patent/EP1794873A4/en not_active Withdrawn
- 2005-08-30 CN CNB200580028854XA patent/CN100511935C/en not_active Expired - Fee Related
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US6381160B1 (en) * | 1999-06-04 | 2002-04-30 | U.S. Philips Corporation | Converter comprising resonant circuit elements |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102948075A (en) * | 2010-06-23 | 2013-02-27 | Abb技术有限公司 | Voltage converting apparatus and method for converting a voltage |
WO2013126414A1 (en) * | 2012-02-24 | 2013-08-29 | Analog Devices, Inc. | System and method for oscillator frequency control |
US8710888B2 (en) | 2012-02-24 | 2014-04-29 | Analog Devices, Inc. | System and method for oscillator frequency control |
TWI549480B (en) * | 2012-02-24 | 2016-09-11 | 美國亞德諾半導體公司 | System and method for oscillator frequency control |
US11677330B2 (en) | 2018-11-01 | 2023-06-13 | Kabushiki Kaisha Yaskawa Denki | Power conversion device, power conversion system, and power conversion method |
Also Published As
Publication number | Publication date |
---|---|
EP1794873A1 (en) | 2007-06-13 |
CN101010862A (en) | 2007-08-01 |
JP4833983B2 (en) | 2011-12-07 |
CN100511935C (en) | 2009-07-08 |
JP2008512079A (en) | 2008-04-17 |
SE527687C2 (en) | 2006-05-09 |
SE0402106L (en) | 2006-03-01 |
SE0402106D0 (en) | 2004-08-31 |
EP1794873A4 (en) | 2017-03-01 |
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