WO2006004843A2 - Microcodode specifique d'application pour la commande d'un emetteur-recepteur optique - Google Patents
Microcodode specifique d'application pour la commande d'un emetteur-recepteur optique Download PDFInfo
- Publication number
- WO2006004843A2 WO2006004843A2 PCT/US2005/023126 US2005023126W WO2006004843A2 WO 2006004843 A2 WO2006004843 A2 WO 2006004843A2 US 2005023126 W US2005023126 W US 2005023126W WO 2006004843 A2 WO2006004843 A2 WO 2006004843A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- functionality
- microcode
- persistent memory
- accordance
- act
- Prior art date
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K11/00—Measuring temperature based upon physical or chemical changes not covered by groups G01K3/00, G01K5/00, G01K7/00 or G01K9/00
- G01K11/32—Measuring temperature based upon physical or chemical changes not covered by groups G01K3/00, G01K5/00, G01K7/00 or G01K9/00 using changes in transmittance, scattering or luminescence in optical fibres
Definitions
- the Field of the Invention relates generally to optical transmitters and receivers.
- the present invention relates to optical transmitter and receivers that are capable of running different versions of microcode to manage its operation.
- Optical networks are thus found in a wide variety of high speed applications ranging from as modest as a small Local Area Network (LAN) to as grandiose as the backbone of the Internet.
- LAN Local Area Network
- an optical transmitter also referred to as an electro-optic transducer
- an electro-optic transducer such as a laser or Light Emitting Diode (LED).
- the electro-optic transducer emits light when current is passed through it, the intensity of the emitted light being a function of the current magnitude.
- Data reception is generally implemented by way of an optical receiver (also referred to as an optoelectronic transducer), an example of which is a photodiode.
- the optoelectronic transducer receives light and generates a current, the magnitude of the generated current being a function of the intensity of the received light.
- optical transceivers typically include a driver (e.g., referred to as a "laser driver” when used to drive a laser) configured to control the operation of the optical transmitter in response to various control inputs.
- the optical transceiver also generally includes an amplifier (e.g., often referred to as a "post-amplifier”) configured to amplify the channel-attenuated received signal prior to further processing.
- a controller circuit (hereinafter referred to the "controller”) controls the operation of the laser driver and post- amplifier.
- Controllers are typically implemented in hardware as state machines. Their operation is fast, but inflexible. Being primarily state machines, the functionality of the controller is limited to the hardware structure of the controller. What would be advantageous are controllers that have more flexible functionality.
- optical transceiver or optical transmitter or optical receiver
- the optical transceiver has access to a persistent memory, which may be an on- transceiver persistent memory or may be an off-transceiver persistent memory.
- the persistent memory includes microcode (also referred to as "first microcode) that when loaded into system memory and executed by the at least one processor, causes the optical transceiver to have access to a first set of functionality.
- microcode also referred to as "first microcode
- the principles of the present invention relate to a method for the optical transceiver to change from the first set of functionality to a second set of functionality that is different than the first set of functionality.
- second microcode in the persistent memory is made accessible to the optical transceiver.
- the second microcode includes one or more functions in the second set of functionality that are not included in the first set of functionality. Then, the second microcode is loaded in the system memory from the persistent memory. The second microcode is then executed to allow the optical transceiver to implement the second set of functionality.
- the hardware of the optical transceiver need not change at all. Instead, different microcode is written to the persistent memory to implement the change in functionality. Loading different microcode into persistent memory is significantly more straightforward for a user than purchasing and setting up a different optical transceiver. Therefore, the principles of the present invention allow for more flexible operation for the optical transceiver at a greater convenience for the user. Additional features and advantages of the invention will be set forth in the description that follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The features and advantages of the invention may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.
- Figure 1 schematically illustrates an example of an optical transceiver that may implement features of the present invention
- Figure 2 schematically illustrates an example of the control module of Figure 1 ; and Figure 3 illustrates a flowchart of a method for changing the functionality of the optical transceiver of Figure 1 in accordance with the principles of the present invention.
- optical transceiver or optical transmitter or optical receiver
- processor or optical transmitter or optical receiver
- the optical transceiver has access to a persistent memory, which may be an on- transceiver persistent memory or may be an off-transceiver persistent memory.
- the persistent memory includes microcode (also referred to as "first microcode") that when loaded into system memory and executed by the at least one processor, causes the optical transceiver to have access to a first set of functionality.
- first microcode also referred to as "first microcode”
- the principles of the present invention relate to a method for the optical transceiver to change from the first set of functionality to a second set of functionality that is different than the first set of functionality.
- second microcode in the persistent memory is made accessible to the optical transceiver.
- the second microcode includes one or more functions in the second set of functionality that are not included in the first set of functionality.
- the second microcode is loaded in the system memory from the persistent memory.
- the second microcode is then executed to allow the optical transceiver to implement the second set of functionality.
- Figure 1 illustrates an optical transceiver 100 in which the principles of the present invention may be employed. While the optical transceiver 100 will be described in some detail, the optical transceiver 100 is described by way of illustration only, and not by way of restricting the scope of the invention.
- the principles of the present invention are suitable for IG, 2G, 4G, 8G, 1OG and higher bandwidth fiber optic links.
- the principles of the present invention may be implemented in optical (e.g., laser) transmitter/receivers of any form factor such as XFP, SFP and SFF, without restriction. Having said this, the principles of the present invention are not limited to an optical transceiver environment at all.
- the optical transceiver 100 receives an optical signal from fiber HOA using receiver 101.
- the receiver 101 acts as an opto-electric transducer by transforming the optical signal into an electrical signal.
- the receiver 101 provides the resulting electrical signal to a post-amplifier 102.
- the post-amplifier 102 amplifies the signal and provides the amplified signal to an external host 111 as represented by arrow 102 A.
- the external host 111 may be any computing system capable of communicating with the optical transceiver 100.
- the external host 111 may contain a host memory 112 that may be a volatile or non-volatile memory source.
- the optical transceiver 100 may be a printed circuit board or other components/chips within the host 111, although this is not required.
- the optical transceiver 100 may also receive electrical signals from the host 111 for transmission onto the fiber HOB.
- the laser driver 103 receives the electrical signal as represented by the arrow 103 A, and drives the transmitter 104 (e.g., a laser or Light Emitting Diode (LED)) with signals that cause the transmitter 104 to emit onto the fiber HOB optical signals representative of the information in the electrical signal provided by the host 111.
- the transmitter 104 serves as an electro-optic transducer.
- the optical transceiver 100 includes a control module 105, which may evaluate temperature and voltage conditions and other operational circumstances, and receive information from the post-amplifier 102 (as represented by arrow 105A) and from the laser driver 103 (as represented by arrow 105B). This allows the control module 105 to optimize the dynamically varying performance, and additionally detect when there is a loss of signal.
- control module 105 may counteract these changes by adjusting settings on the post-amplifier 102 and/or the laser driver 103 as also represented by the arrows 105 A and 105B. These settings adjustments are quite intermittent since they are only made when temperature or voltage or other low frequency changes so warrant. Receive power is an example of such a low frequency change.
- the control module 105 may have access to a persistent memory 106, which in one embodiment, is an Electrically Erasable and Programmable Read Only Memory (EEPROM).
- EEPROM Electrically Erasable and Programmable Read Only Memory
- the persistent memory 106 and the control module 105 may be packaged together in the same package or in different packages without restriction.
- Persistent memory 106 may also be any other non- volatile memory source.
- the control module 105 includes both an analog portion 108 and a digital portion 109. Together, they allow the control module to implement logic digitally, while still largely interfacing with the rest of the optical transceiver 100 using analog signals.
- Figure 2 schematically illustrates an example 200 of the control module 105 in further detail.
- the control module 200 includes an analog portion 200A that represents an example of the analog portion 108 of Figure 1, and a digital portion 200B that represents an example of the digital portion 109 of Figure 1.
- the analog portion 200A may contain digital to analog converters, analog to digital converters, high speed comparators (e.g., for event detection), voltage based reset generators, voltage regulators, voltage references, clock generator, and other analog components.
- the analog portion 200A includes sensors 21 IA, 21 IB, 211C amongst potentially others as represented by the horizontal ellipses 21 ID. Each of these sensors may be responsible for measuring operational parameters that may be measured from the control module 200 such as, for example, supply voltage and transceiver temperature.
- the control module may also receive external analog or digital signals from other components within the optical transceiver that indicate other measured parameters such as, for example, laser bias current, transmit power, receive power, laser wavelength, laser temperature, and Thermo Electric Cooler (TEC) current.
- Two external lines 212A and 212B are illustrated for receiving such external analog signals although there may be many of such lines.
- the internal sensors may generate analog signals that represent the measured values
- the externally provided signals may also be analog signals.
- the analog signals are converted to digital signals so as to be available to the digital portion 200B of the control module 200 for further processing.
- each analog parameter value may have its own Analog to Digital Converter (ADC).
- ADC Analog to Digital Converter
- each signal may be periodically sampled in a round robin fashion using a single ADC such as the illustrated ADC 214.
- each analog value may be provided to a multiplexer 213, which selects in a round robin fashion, one of the analog signals at a time for sampling by the ADC 214.
- multiplexer 213 may be programmed to allow any order of analog signals to be sampled by ADC 214.
- the analog portion 200A of the control module 200 may also include other analog components 215 such as, for example, digital to analog converters, other analog to digital converters, high speed comparators (e.g., for event detection), voltage based reset generators, voltage regulators, voltage references, clock generator, and other analog components.
- the digital portion 200B of the control module 200 may include a timer module 202 that provides various timing signals used by the digital portion 200B. Such timing signals may include, for example, programmable processor clock signals.
- the timer module 202 may also act as a watchdog timer.
- Two general-purpose processors 203A and 203B are also included.
- the processors recognize instructions that follow a particular instruction set, and may perform normal general-purpose operation such as shifting, branching, adding, subtracting, multiplying, dividing, Boolean operations, comparison operations, and the like.
- the general-purpose processors 203A and 203B are each a 16- bit processor and may be identically structured.
- the precise structure of the instruction set is not important to the principles of the present invention as the instruction set may be optimized around a particular hardware environment, and as the precise hardware environment is not important to the principles of the present invention.
- a host communications interface 204 is used to communicate with the host 111 possibly implemented using a two-wire interface such as I 2 C shown in Figure 1 as the serial data (SDA) and serial clock (SCL) lines on the optical transceiver 100. Other host communication interfaces may also be implemented as well. Data may be provided from the control module 105 to the host 111 using this host communications interface to allow for digital diagnostics and readings of temperature levels, transmit/receiver power levels, and the like.
- the external device interface 205 is used to communicate with, for example, other modules within the optical transceiver 100 such as, for example, the post-amplifier 102, the laser driver 103, or the persistent memory 106.
- the internal controller system memory 206 may be Random Access Memory (RAM) or non- volatile memory.
- the memory controller 207 shares access to the controller system memory 206 amongst each of the processors 203 A and 203B and with the host communication interface 204 and the external device interface 205.
- the host communication interface 204 includes a serial interface controller 20 IA
- the external device interface 205 includes a serial interface controller 201B.
- the two serial interface controllers 201 A and 20 IB may communicate using a two-wire interface such as I 2 C or may be another interface so long as the interface is recognized by both communicating modules.
- serial interface controller 201B One serial interface controller (e.g., serial interface controller 201B) is a master component, while the other serial interface controller (e.g., serial interface controller 201A) is a slave component.
- An input/output multiplexer 208 multiplexes the various input/output pins of the control module 200 to the various components within the control module 200. This enables different components to dynamically assign pins in accordance with the then- existing operational circumstances of the control module 200. Accordingly, there may be more inputVmtput nodes within the control module 200 than there are pins available on the control module 200, thereby reducing the footprint of the control module 200.
- the persistent memory 106 may include first microcode that when loaded in controller system memory 206 and executed by one or both of the processors 203 causes the optical transceiver to have access to a first set of functionality.
- the optical transceiver 100 need not include a persistent memory 106 for the principles of the present invention to be enabled.
- the optical transceiver 100 may instead have access to other persistent memory sources such a host computing system persistent memory or a remote persistent memory coupled to transceiver 100 over a network such as the Internet. It may even be possible for transceiver 100 to access both an on-transceiver persistent memory such as memory 106 and another persistent memory.
- persistent memory is defined to mean any persistent memory that the optical transceiver may access, including both on-transceiver and off-transceiver persistent memories.
- the optical transceiver may change from the first set of functionality to a second set of functionality that is different than the first set of functionality.
- second microcode 122 may be configured for the second set of functionality.
- FIG. 3 illustrates a flowchart of a method 300 for changing functionality in accordance with the principles of the present invention.
- the method 300 begins in a state in which only the first microcode 121 in the persistent memory 106 or other accessible persistent memory source is accessible for execution. Then, referring to the method 300, second microcode in the persistent memory is made accessible for execution (act 301).
- the second microcode 122 is made accessible for execution by either writing it to the persistent memory or by making microcode already stored in the persistent memory accessible.
- the second microcode 122 includes one or more functions in a second set of functionality that are not included in the first set of functionality enabled by the first microcode 121.
- the second microcode is the loaded from persistent memory to system memory (act 302) for execution by the processor(s) (act 303).
- the second microcode 122 may be loaded from the persistent memory 106 into the controller system memory 206 for execution by the one or more processors 203.
- the second microcode 122 may be loaded from an off-transceiver persistent memory into the controller system memory 206 for execution by the one or more processors 203.
- the microcode may be loaded one fragment at a time (e.g., one instruction at a time) into a smaller system memory such as for example a processor register, flip-flops, or the like. Accordingly, the loading and executing operations may be repeatedly performed for each fragment as represented by arrow 304.
- the entire first microcode 121 may be overwritten.
- the second microcode includes all the microcode needed to cause the optical transceiver to implement the second set of functionality when executed by the processor(s).
- the second microcode 122 may overwrite only some of the first microcode 121, but leave a remaining portion of the first microcode 121.
- the second microcode in combination with the remaining portion of the first microcode contains sufficient microcode to cause the optical transceiver to implement the second set of functionality when executed by the processor(s).
- the entire first microcode 121 may be preserved when writing the second microcode 122 into the persistent memory 106.
- the second microcode 122 in combination with the first microcode 121 contains sufficient microcode to cause the optical transceiver to implement the second set of functionality when executed by the processor(s).
- the second microcode may be drafted in any manner so as to implement the second set of functionality.
- the second set of functionality may facilitate data transfer at higher data rates than enabled by the first set of functionality, may add the ability to perform digital diagnostics, may follow a protocol not followed by the first set of functionality, may supports a protocol for communicating with a host that is not supported by the first set of functionality, may support off-module logging whereas the first set of functionality does not, may support calibration whereas the first set of functionality does not, may support temperature compensation for a different range of temperatures as compared to the first set of functionality, may support operations for a different range of receive power as compared to the first set of functionality, may support end-of-life operation whereas the first set of functionality does not, may support custom logging operations whereas the first set of functionality does not, may log different parameters than the first set of functionality, may supports trimming whereas the first set of functionality does not.
- the principles of the present invention allow for the entire behavioral characteristics to be conveniently changed for the entire transceiver without replacing the transceiver, and without requiring excessive human intervention.
- Simple access to the second microcode and the ability to load the second microcode into the persistent memory is enough.
- the microcode may be changed a number of times over the lifetime of the optical transceiver as is appropriate given changing circumstances.
- the second microcode 122 may have been obtained by the optical transceiver
- the second microcode 122 may be obtained from the host computing system 111.
- the host computing system 111 may obtain the second microcode over a network such as a local area network or the Internet, for example.
- the host computing system 111 may contain a library of microcode that may be provided to the optical transceiver 100.
- the principles of the present invention allows for a convenient way to change the functionality of an optical transceiver through the use of microcode.
- microcode the functionality of the optical transceiver may be changed without having to change the hardware structure of the transceiver.
- the principles of the present invention may also be applied to an optical receiver without an optical transmitter, or to an optical transmitter without an optical receiver. Accordingly, the principles of the present invention are not limited to the optical transceiver environment and represent a significant advancement in the arts of optical transceivers, transmitters, and receivers.
Abstract
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US58474704P | 2004-06-30 | 2004-06-30 | |
US60/584,747 | 2004-06-30 | ||
US11/114,984 US20060002710A1 (en) | 2004-06-30 | 2005-04-26 | Application-specific microcode for controlling an optical transceiver |
US11/114,984 | 2005-04-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2006004843A2 true WO2006004843A2 (fr) | 2006-01-12 |
WO2006004843A3 WO2006004843A3 (fr) | 2007-02-15 |
Family
ID=35514045
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/US2005/023126 WO2006004843A2 (fr) | 2004-06-30 | 2005-06-30 | Microcodode specifique d'application pour la commande d'un emetteur-recepteur optique |
Country Status (2)
Country | Link |
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US (1) | US20060002710A1 (fr) |
WO (1) | WO2006004843A2 (fr) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8705973B2 (en) * | 2004-09-07 | 2014-04-22 | Finisar Corporation | Optical transceiver with off-transceiver logging mechanism |
US7610494B2 (en) * | 2004-12-30 | 2009-10-27 | Finisar Corporation | Encrypted microcode update of an optical transceiver |
US8175460B2 (en) * | 2007-08-13 | 2012-05-08 | Finisar Corporation | Asymmetric scheduling of multiple analog inputs using a single A/D converter for fiber-optic transceivers |
EP2071861B1 (fr) * | 2007-12-12 | 2014-10-22 | ADVA Optical Networking SE | Procédé et réseau pour le transport bidirectionnel de données |
US8582978B2 (en) * | 2008-01-16 | 2013-11-12 | Finisar Corporation | Logging mechanism for an intelligent transmitter module |
US9342303B2 (en) | 2013-03-15 | 2016-05-17 | Intel Corporation | Modified execution using context sensitive auxiliary code |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1164742A2 (fr) * | 2000-06-12 | 2001-12-19 | Broadcom Corporation | Communication de données sans fil avec un FIFO ( mémoire élastique ) pour synchronisation |
US20030113118A1 (en) * | 2001-11-28 | 2003-06-19 | Meir Bartur | Smart single fiber optic transceiver |
-
2005
- 2005-04-26 US US11/114,984 patent/US20060002710A1/en not_active Abandoned
- 2005-06-30 WO PCT/US2005/023126 patent/WO2006004843A2/fr active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1164742A2 (fr) * | 2000-06-12 | 2001-12-19 | Broadcom Corporation | Communication de données sans fil avec un FIFO ( mémoire élastique ) pour synchronisation |
US20030113118A1 (en) * | 2001-11-28 | 2003-06-19 | Meir Bartur | Smart single fiber optic transceiver |
Also Published As
Publication number | Publication date |
---|---|
US20060002710A1 (en) | 2006-01-05 |
WO2006004843A3 (fr) | 2007-02-15 |
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