WO2005099397A2 - Method and apparatus for routing graphics processing signals to a stand-alone module - Google Patents
Method and apparatus for routing graphics processing signals to a stand-alone module Download PDFInfo
- Publication number
- WO2005099397A2 WO2005099397A2 PCT/US2005/011870 US2005011870W WO2005099397A2 WO 2005099397 A2 WO2005099397 A2 WO 2005099397A2 US 2005011870 W US2005011870 W US 2005011870W WO 2005099397 A2 WO2005099397 A2 WO 2005099397A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- connector
- computing device
- stand
- alone module
- alone
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
Definitions
- This invention relates generally to computer hardware and relates more particularly to a connector for coupling a stand-alone graphics module to a computing device.
- Contemporary computing devices typically incorporate a graphics card that enables a computing device to rapidly process graphics related data for graphics intensive applications, such as gaming applications.
- a graphics card generally comprises a printed circuit board (PCB) upon which a plurality of circuit components (such as memory chips and the like) and a graphics processing unit (GPU) are mounted.
- PCB printed circuit board
- GPU graphics processing unit
- “closed platform” computing devices such as laptop computers, cellular telephones and personal digital assistants (PDAs) (i.e., devices that use processors and are not easily changed by a user)
- PDAs personal digital assistants
- a drawback to mounting the graphics card directly to the motherboard is that this fixed configuration impedes a user's ability to upgrade the computing device's graphics system. Specifically, in order to take advantage of an improved graphics system, the user typically must purchase an entirely new computing device, which is much more costly than a simple replacement of the graphics system in the existing computing device. [0005]
- a second drawback is that the pace of graphics innovations that can be conveniently delivered to computing device users is hindered, because the implementation of on-board devices is typically limited by a design cycle of approximately nine to twelve months and because of the form factor power delivery, thermal management and physical size.
- One embodiment of a connector for a stand-alone graphics module is adapted for coupling a computing device to the stand-alone graphics module, which is external to the computing device.
- the connector is adapted for receiving PCI express signal from the computing device and for delivering the PCI express signal to the stand-alone graphics module.
- the connector is further adapted for receiving display output signals from the stand-alone graphics module and delivering the display output signals to the computing system, e.g., for use in accordance with one or more output display panels coupled to said computing device.
- One embodiment of a method for routing graphics processing signals from a computing device to an external, stand-alone module includes detecting a connection between the computing device and the stand-alone module and outputting a PCI express signal from the computing device to the stand-alone module, e.g., via the connector described above.
- FIG. 1 is a schematic diagram illustrating a computing system incorporating stand-alone graphics, according to one embodiment of the present invention
- FIG. 2 is a side view of one embodiment of a connector interfaced to a portion of a computing device's motherboard;
- FIG 3. is a flow diagram of one embodiment of a method for routing graphics signals from a computing device to an external, stand-alone graphics module.
- FIG. 1 is a schematic diagram illustrating an exemplary computing system 100 incorporating stand-alone graphics, according to one embodiment of the present invention.
- the computing system 100 comprises a computing device 102 and a stand-alone graphics module 104 coupled by a connector 106.
- Stand-alone graphics module 104 is adaptable for use with any type of computing device, including, without limitation, a desktop computer, server, laptop computer, palm-sized computer, personal digital assistant, tablet computer, game console, cellular telephone, computer-based simulator and the like.
- computing device 102 generally comprises a plurality of internal components, including, without limitation, a central processing unit (CPU) 110, memory 116, one or more input/output (I/O) devices 118, a Northbridge chip set 112, a Southbridge chip set 114, a standard integrated graphics processor (IGP) 108 that is a sub-component of the Northbridge chip set 112, and a discrete, fixed rendering including a graphics processing unit (GPU) 120.
- CPU central processing unit
- I/O input/output
- Northbridge chip set 112 a Southbridge chip set 114
- IGP integrated graphics processor
- GPU graphics processing unit
- Northbridge chip set 112 outputs a PCI express signal to IGP 108, which in turn generates a plurality of display output signals for various output display panels (not shown), such as video graphics array (VGA), television (TV), low voltage differential signaling (LVDS) and digital video interface (DVI) signals.
- VGA video graphics array
- TV television
- LVDS low voltage differential signaling
- DVI digital video interface
- Stand-alone graphics module 104 is an external (e.g., external to computing device 102) device configured to be coupled to computing device 102 in order to provide graphics processing power to computing device 102.
- stand-alone graphics module 104 is positioned a user-defined distance away from computing device 102 and has its own power supply, thermal budget and mechanical budget.
- stand-alone graphics module 104 is configured to exchangeably receive one or more graphics cards (not shown) for external interface to computing device 102.
- stand-alone graphics module 104 is adapted to receive one or more field-changeable graphics cards.
- system 100 enables a user to maximize the graphics capabilities of an existing computing device (e.g., computing device 102), regardless of the computing device's inherent thermal, form factor or other power limitations.
- system 100 thus allows a user to upgrade the graphics processing power of computing device 102 with little or no modification to the fixed architecture of computing device 102.
- a user may simply purchase one or more individual graphics cards, connect stand-alone graphics module 104 to computing device 102 (e.g., via connector 106J, and insert the graphics cards into stand-alone graphics module 104, thereby externally interfacing computing device 102 to the graphics cards.
- graphics cards are easily removed from stand-alone graphics module 104; further graphics system upgrades are therefore simply a matter of purchasing a new graphics card for use in addition to or in place of an existing graphics card.
- FIG. 2 is a side view of one embodiment of a connector 200 interfaced to a portion of a computing device's motherboard 202. Similar to connector 106 illustrated in FIG. 1 , connector 200 is adapted to couple computing device 204 to a stand-alone graphics module. Specifically, connector 200 is adapted to receive a PCI Express signal from a computing device (e.g., from a Northbridge chip set) and deliver the PCI Express signal to a stand-along graphics module for the generation of one or more display output signals, as described in further detail below. Connector 200 therefore functions as a bridge or bus from computing device 102 to stand-alone graphics module 104.
- a computing device e.g., from a Northbridge chip set
- connector 200 is a removable, card-shaped connector having physical and mechanical dimensions that are compatible with the computing device's internal mechanical constraints.
- connector 200 has dimensions similar to any of the field-changeable graphics cards described in co- pending, commonly assign United States Patent Application No. xx xxx,xxx, filed xx/xx/xxxx (Attorney Docket No. NVDA/P001196), which is herein incorporated by reference.
- Connector 200 generally comprises a printed circuit board (PCB) 208 (having a plurality of circuit components disposed thereon), a card connector 210 (e.g., comprising a plurality of plated contacts) and an external interface 212.
- PCB printed circuit board
- Card connector 210 is disposed along a first edge 201 of PCB 208 and is adapted to interface with an edge connector mounted to the computing device's motherboard 202, as described in further detail below.
- External interface 212 is disposed along another edge of PCB 208 (e.g., in one embodiment a second edge 203 opposite first edge 201 ) and is adapted for coupling to, for example, a serial cable 218 that connects connector 200 to a stand-alone graphics module.
- other means of connection including, but not limited to, an FR4 strip connector or a connector-to- connector docking station, may be used to connect connector 200 to a stand-alone graphics module.
- edge connector 214 is configured in a manner similar to the edge connector described in United States Patent Application No. 10/822,015.
- Edge connector 214 includes a slot 216 that is adapted to receive card connector 210 of connector 200.
- slot 216 includes a plurality of connector pins (not shown) that directly contact card connector 210, including at least one connector pin that is configured to detect the presence of connector 200.
- computing device 204 operates in a standard IGP or on-board discrete graphics mode as described above. Once connector 200 is detected (e.g., at start-up or with a hot-plug), stand-alone graphics module 104 is mapped into the system 100 and graphics sub-system, bypassing the IGP or on-board discrete graphics system.
- FIG 3. is a flow diagram of one embodiment of a method 300 for routing graphics signals from a computing device (e.g., computing device 204) to an external, stand-alone graphics module.
- the method 300 is initialized at step 302 and proceeds to step 304, where the method 300 detects a connection to a stand-alone graphics module.
- the connection is indicated when the at least one connector pin on edge connector 214 detects the presence of connector 200.
- the method 300 proceeds to step 306 and outputs PCI express signals to connector 200.
- this is accomplished by sending a signal, via edge connector 214, to the Northbridge chip set (e.g., Northbridge chip set 112 of FIG. 1) indicating that connector 200 is present in computing device 204. Consequently, the Northbridge chip set outputs PCI express signals to connector 200 (e.g., rather than to an IGP or other fixed rendering device), in one embodiment connecting the PCI express signals through one or more connector pins on edge connector 114.
- Connector 200 completes the circuit paths between the PCI express signals and the stand-alone graphics module, e.g., over serial cabling.
- the method 300 terminates in step 308.
- connector 200 in conjunction with edge connector 214, enables a computing device user to implement an alternative (e.g., non-fixed) graphics system without the need to replace computing device 204.
- connector 200 has been described in the context of a standardized, field changeable card, the present invention may be deployed in other form factors such as credit card polymer substrates with embedded chips, and postage stamp-sized, self-contained devices, among others.
- display output signals may be sent from the stand-alone graphics module back to the computing device, in order to use integrated display options, e.g., in accordance with Application No. 10/822,015.
- a connector for coupling a computing device to an external, stand-alone graphics module is a fixed external port built into the computing device.
- the port functions in substantially the same way as the removable connector 200, e.g., in accordance with method 300.
- the port detects a connection to a stand-alone graphics module over a connection via a serial cable, an FR4 connector strip, a connector-to-connector docking station, bundled wire cable, flexible Mylar® substrates printed with metal (e.g., copper) traces, shielding and protective plastic coating or other serial coupling means connected to the port.
- connection means having the bandwidth necessary to transmit PCI express signals from the computing device to the stand-alone graphics module may be deployed, including FR4 strip connections, bundled wire cable and flexible Mylar® substrates printed with metal (e.g., copper) traces, shielding and protective plastic coating.
- the connection means is a standard sixteen-lane connection.
- the length and dimensions of the connection means is adjusted in accordance with power optimization concerns for the particular computing device platform (e.g., laptop computer, desktop computer, etc.) being coupled to the stand-alone graphics module.
- a connector according to the present invention may thus be configured to enable a computing device user to upgrade or maximize an existing device's graphics system with minimal expense and minimal modification to the existing device's architecture (e.g., regardless of the existing device's inherent thermal, form factor or other power limitations). Because the connector is adapted to couple the computing device to an external, stand-alone graphics module (e.g., comprising one or more field-changeable graphics cards), the user is not forced to purchase an entirely new computing device in order to take advantage of graphics innovations. This advantage is particularly significant for users of portable computing devices, such as laptop computers and PDAs, in which graphics systems are frequently difficult or impossible to alter.
- an external, stand-alone graphics module e.g., comprising one or more field-changeable graphics cards
- a further advantage of the disclosed edge connector is that it enables graphics innovations to be delivered to end-users at a much faster pace. Rather than wait for graphics innovations to be incorporated into next-generation computing platforms (the commercial availability of which may not reflect the pace of innovation, e.g., an approximately nine to twelve month design cycle for on-board implementations is typical), suppliers of graphics innovations can commercially release products as they are developed, and users can incorporate these products into existing platforms as described above.
- the present invention also enables the build-to-order, stock-to-order and field repair of any of the systems disclosed, which is a significant advancement for a global economy having needs for just-in-time manufacturing and inventory management.
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Digital Computer Display Output (AREA)
- Power Sources (AREA)
- Combinations Of Printed Boards (AREA)
- Bus Control (AREA)
Abstract
Description
Claims
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007507519A JP2007537508A (en) | 2004-04-09 | 2005-04-08 | Method and apparatus for routing graphics processing signals to a stand-alone module |
| CN2005800163991A CN1957340B (en) | 2004-04-09 | 2005-04-08 | Method and apparatus for routing graphics processing signals to independent modules |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/822,015 US7265759B2 (en) | 2004-04-09 | 2004-04-09 | Field changeable rendering system for a computing device |
| US10/822,015 | 2004-04-09 | ||
| US10/879,877 US7324111B2 (en) | 2004-04-09 | 2004-06-28 | Method and apparatus for routing graphics processing signals to a stand-alone module |
| US10/879,877 | 2004-06-28 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| WO2005099397A2 true WO2005099397A2 (en) | 2005-10-27 |
| WO2005099397A3 WO2005099397A3 (en) | 2006-04-13 |
| WO2005099397A8 WO2005099397A8 (en) | 2006-06-29 |
Family
ID=35150441
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/US2005/011870 Ceased WO2005099397A2 (en) | 2004-04-09 | 2005-04-08 | Method and apparatus for routing graphics processing signals to a stand-alone module |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2007537508A (en) |
| KR (1) | KR20060135944A (en) |
| WO (1) | WO2005099397A2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007179225A (en) * | 2005-12-27 | 2007-07-12 | Sony Corp | Information processing apparatus, information processing method, and program thereof |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0363343U (en) * | 1989-10-24 | 1991-06-20 | ||
| SE468533B (en) * | 1991-06-28 | 1993-02-01 | Login Europ Ab | ADDITIONAL DEVICE, COMPUTER PROVIDED WITH DOCKING CONNECTOR AND DOCKING STATION FOR CONNECTING A PORTABLE COMPUTER IN A STATIONARY ENVIRONMENT |
| JPH11186771A (en) * | 1997-12-17 | 1999-07-09 | Hitachi Ltd | Circuit module and information processing device |
| JP2001075546A (en) * | 1999-08-31 | 2001-03-23 | Sony Corp | Display device and display attitude control method |
| JP2003052060A (en) * | 2001-05-31 | 2003-02-21 | Sony Corp | Information processing apparatus and method, recording medium, and program |
| US20030131172A1 (en) * | 2002-01-09 | 2003-07-10 | Johnson Lin | Method for switching a control source of a computer display automatically and a main board using the method |
| JP2003274326A (en) * | 2002-03-12 | 2003-09-26 | Sony Corp | Information processing apparatus and information processing method |
| US20030221041A1 (en) * | 2002-04-25 | 2003-11-27 | August Technology Corp. | Sensor with switched fabric interface |
| JP2004013687A (en) * | 2002-06-10 | 2004-01-15 | Sharp Corp | Data processing device |
| JP2004013689A (en) * | 2002-06-10 | 2004-01-15 | Sharp Corp | Data processing device |
| US20040153778A1 (en) * | 2002-06-12 | 2004-08-05 | Ati Technologies, Inc. | Method, system and software for configuring a graphics processing communication mode |
| US20040003154A1 (en) * | 2002-06-28 | 2004-01-01 | Harris Jeffrey M. | Computer system and method of communicating |
| WO2004015554A1 (en) * | 2002-08-12 | 2004-02-19 | Jones John R Jr | Modular computer system and components therefor |
| CA2498578C (en) * | 2002-09-13 | 2011-11-22 | Karl Storz Imaging, Inc. | Video recording and image capture device |
-
2005
- 2005-04-08 KR KR1020067023425A patent/KR20060135944A/en not_active Ceased
- 2005-04-08 WO PCT/US2005/011870 patent/WO2005099397A2/en not_active Ceased
- 2005-04-08 JP JP2007507519A patent/JP2007537508A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007179225A (en) * | 2005-12-27 | 2007-07-12 | Sony Corp | Information processing apparatus, information processing method, and program thereof |
| US8599207B2 (en) | 2005-12-27 | 2013-12-03 | Sony Corporation | Information processing apparatus, information processing method and program |
| US8970606B2 (en) | 2005-12-27 | 2015-03-03 | Sony Corporation | Facilitating use of multiple graphics chips |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2005099397A3 (en) | 2006-04-13 |
| KR20060135944A (en) | 2006-12-29 |
| WO2005099397A8 (en) | 2006-06-29 |
| JP2007537508A (en) | 2007-12-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20050228928A1 (en) | Method and apparatus for routing graphics processing signals to a stand-alone module | |
| US7621769B1 (en) | Edge connector for field changeable graphics system | |
| EP1134669A1 (en) | Incremental bus structure for modular electronic equipment | |
| US6477603B1 (en) | Multiple PCI adapters within single PCI slot on an matax planar | |
| US7362589B2 (en) | Circuit board adapted to couple to different types of add-in cards | |
| JP2011507192A (en) | Electrical connector, cable and device using the same | |
| US20080244141A1 (en) | High bandwidth cable extensions | |
| US7420819B2 (en) | Expanding high speed transport interface hardware method for motherboard | |
| US7272017B2 (en) | Method and apparatus for coupling a plurality of cards to an information handling system | |
| US20070076005A1 (en) | Robust hot plug detection for analog displays using EDID | |
| US6906929B2 (en) | Computer backplane with an accelerated graphics port | |
| US20070139898A1 (en) | System motherboard having expansibility and variability | |
| WO2005099397A2 (en) | Method and apparatus for routing graphics processing signals to a stand-alone module | |
| US20070133188A1 (en) | Adapting Apparatus, Method Thereof, and Computer System Thereof | |
| CN100377135C (en) | Double-bus adapter card | |
| US7159104B2 (en) | Simplified memory detection | |
| US20110110024A1 (en) | Computer system | |
| US6646862B1 (en) | Dynamic circuit interface | |
| CN1866156A (en) | The interface circuit of the central processing unit can be set | |
| CN205983293U (en) | Mainboard of adapter and applied said adapter | |
| CN113110709A (en) | Server | |
| Brown | PC/104-ISA to PCI |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KM KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
| AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
| CFP | Corrected version of a pamphlet front page |
Free format text: UNDER (54) PUBLISHED TITLE REPLACED BY CORRECT TITLE |
|
| NENP | Non-entry into the national phase |
Ref country code: DE |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 2007507519 Country of ref document: JP |
|
| WWW | Wipo information: withdrawn in national office |
Country of ref document: DE |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 1020067023425 Country of ref document: KR |
|
| WWE | Wipo information: entry into national phase |
Ref document number: 200580016399.1 Country of ref document: CN |
|
| WWP | Wipo information: published in national office |
Ref document number: 1020067023425 Country of ref document: KR |
|
| 121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
| 122 | Ep: pct application non-entry in european phase |