WO2005094427A3 - Crosstalk equalizer - Google Patents

Crosstalk equalizer Download PDF

Info

Publication number
WO2005094427A3
WO2005094427A3 PCT/US2005/006953 US2005006953W WO2005094427A3 WO 2005094427 A3 WO2005094427 A3 WO 2005094427A3 US 2005006953 W US2005006953 W US 2005006953W WO 2005094427 A3 WO2005094427 A3 WO 2005094427A3
Authority
WO
WIPO (PCT)
Prior art keywords
equalizer
delay
serial data
previously received
jitter
Prior art date
Application number
PCT/US2005/006953
Other languages
French (fr)
Other versions
WO2005094427A2 (en
Inventor
James Buckwalter
Seyed Ali Hajimiri
Original Assignee
California Inst Of Techn
James Buckwalter
Seyed Ali Hajimiri
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/012,857 external-priority patent/US7463680B2/en
Application filed by California Inst Of Techn, James Buckwalter, Seyed Ali Hajimiri filed Critical California Inst Of Techn
Publication of WO2005094427A2 publication Critical patent/WO2005094427A2/en
Publication of WO2005094427A3 publication Critical patent/WO2005094427A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/493—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems by transition coding, i.e. the time-position or direction of a transition being encoded before transmission
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/32—Reducing cross-talk, e.g. by compensating
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/46—Monitoring; Testing
    • H04B3/462—Testing group delay or phase shift, e.g. timing jitter
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03878—Line equalisers; line build-out devices
    • H04L25/03885—Line equalisers; line build-out devices adaptive

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

An equalizer (140) for serial data communications can be configured to compensate for the effects of deterministic jitter. The equalizer can be configured to compensate a received serial data stream for the effects of data-dependent jitter as well as duty cycle distortion jitter. The equalizer can be configured to determine the value of one or more previously received symbols and compare them to a recorvered symbol. The equalizer can adjust a variable delay positioned in the serial data path to introduce a delay into the data path that is based in part on the received data stream. The equalizer can be configured to vary the delay whwn any of the one or more previously received symbols is different from the recovered symbol, and can be configured to maintain a constant delay if the one or more previously received symbols is the same as the recovered symbol.
PCT/US2005/006953 2004-03-22 2005-03-02 Crosstalk equalizer WO2005094427A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US55564804P 2004-03-22 2004-03-22
US60/555,648 2004-03-22
US11/012,857 US7463680B2 (en) 2003-12-16 2004-12-14 Deterministic jitter equalizer
US11/012,857 2004-12-14

Publications (2)

Publication Number Publication Date
WO2005094427A2 WO2005094427A2 (en) 2005-10-13
WO2005094427A3 true WO2005094427A3 (en) 2006-09-08

Family

ID=35064360

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2005/006953 WO2005094427A2 (en) 2004-03-22 2005-03-02 Crosstalk equalizer

Country Status (1)

Country Link
WO (1) WO2005094427A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020094043A1 (en) * 2001-01-17 2002-07-18 Fred Chu Apparatus, method and system for correlated noise reduction in a trellis coded environment
US6580770B2 (en) * 2000-06-12 2003-06-17 Mitsubishi Denki Kabushiki Kaisha Information regenerating apparatus and information regenerating method
US20030165207A1 (en) * 2002-03-01 2003-09-04 Nec Corporation Jitter-detecting circuit, receiving circuit including the jitter-detecting circuit, and communication system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6580770B2 (en) * 2000-06-12 2003-06-17 Mitsubishi Denki Kabushiki Kaisha Information regenerating apparatus and information regenerating method
US20020094043A1 (en) * 2001-01-17 2002-07-18 Fred Chu Apparatus, method and system for correlated noise reduction in a trellis coded environment
US20030165207A1 (en) * 2002-03-01 2003-09-04 Nec Corporation Jitter-detecting circuit, receiving circuit including the jitter-detecting circuit, and communication system

Also Published As

Publication number Publication date
WO2005094427A2 (en) 2005-10-13

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