WO2005091371A2 - Field-effect device having a metal-insulator-semiconductor high-voltage structure and method of making the same - Google Patents
Field-effect device having a metal-insulator-semiconductor high-voltage structure and method of making the same Download PDFInfo
- Publication number
- WO2005091371A2 WO2005091371A2 PCT/IB2005/050887 IB2005050887W WO2005091371A2 WO 2005091371 A2 WO2005091371 A2 WO 2005091371A2 IB 2005050887 W IB2005050887 W IB 2005050887W WO 2005091371 A2 WO2005091371 A2 WO 2005091371A2
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- drift region
- field effect
- semiconductor layer
- recited
- effect device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 42
- 230000005669 field effect Effects 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 230000005684 electric field Effects 0.000 claims abstract description 31
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 28
- 229910052710 silicon Inorganic materials 0.000 claims description 28
- 239000010703 silicon Substances 0.000 claims description 28
- 230000015556 catabolic process Effects 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 6
- 229910002601 GaN Inorganic materials 0.000 claims 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims 2
- 239000003989 dielectric material Substances 0.000 abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 108091006146 Channels Proteins 0.000 description 8
- 239000000377 silicon dioxide Substances 0.000 description 6
- 229910052681 coesite Inorganic materials 0.000 description 5
- 229910052906 cristobalite Inorganic materials 0.000 description 5
- 230000003247 decreasing effect Effects 0.000 description 5
- 239000002019 doping agent Substances 0.000 description 5
- 229910052682 stishovite Inorganic materials 0.000 description 5
- 229910052905 tridymite Inorganic materials 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 239000008186 active pharmaceutical agent Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 108010075750 P-Type Calcium Channels Proteins 0.000 description 1
- 229910008310 Si—Ge Inorganic materials 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000001010 compromised effect Effects 0.000 description 1
- 238000004883 computer application Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000000593 degrading effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000000779 depleting effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 238000000427 thin-film deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
- H01L29/7824—Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
- H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
Definitions
- MOS Metal-oxide-semiconductor
- FETs are used extensively in electronic circuits, especially integrated circuits (ICs). These devices are often used in computer applications, in circuits for switches, and in high-voltage and power applications, which are ubiquitous in application.
- MOSFETs act as current valves, with the current in a drift region (channel) between a drain and a source being controlled by selectively depleting the drift region of carriers.
- the channel is an enhancement mode channel and the reverse voltage handling is obtained by depletion-mode type operation obtained by depletion of drift region charge by MOS field plate structures.
- These devices are often enhancement mode channels with reverse blocking voltage attained by depletion of charge from the drift region of the device.
- these devices often have an enhancement mode channel with the drift region depleted by action of MOS field plate structures.
- it is useful to increase the breakdown voltage of the device (the breakdown voltage between the drain and source BV ds or simply BV), while maintaining the on-resistance of the device, as well as other parameters.
- the specific resistance R DS (on)
- R DS on
- the resistance in the drift region of the MOSFET limits the lateral field strength when the transistor is off (i.e., when there is maximum applied voltage across the device) to a value that is below the avalanche breakdown threshold of the epitaxially-grown silicon.
- the drift region should have a relatively large length, or be lightly doped, or both. However, both of these conditions contribute to a relatively high resistance to the overall R D s (on) value. Moreover, the increased device size required tends to increase the overall cost fabricating high-voltage devices. Additionally, in order to decrease the R DS (on) it is useful to increase the doping of the drift region.
- a field effect electronic device includes a field plate disposed over a dielectric layer, which is disposed over a semiconductor layer, wherein a drift region of the device is in the semiconductor layer.
- a doping level varies substantially non-linearly across the drift region, and the device exhibits a substantially constant reduced surface electric field.
- a method of fabricating a field effect device includes providing a non-linear non-uniform doping density in a drift region of a semiconductor layer of the device wherein both the semiconductor layer and the dielectric layer have non-constant thickness.
- Fig. 2 is a graphical representation of the cross-sectional thickness of a semiconductor layer and a dielectric layer over the semiconductor layer of a half- cell in accordance with an example embodiment.
- Fig. 3 is a graphical representation of dopant concentrations versus lateral distance for various lateral electric fields for field-effect transistors of an example embodiment, which have the layer structure of Fig. 2.
- Fig. 4 is a graphical representation of the cross-sectional thickness of a semiconductor layer and a dielectric layer over the semiconductor layer of a half- cell in accordance with an example embodiment.
- Fig. 5 is a graphical representation of a dopant concentration versus lateral distance for various lateral electric fields for field-effect transistors of an example embodiment, which has the layer structure of Fig. 4.
- Fig. 3 is a graphical representation of dopant concentrations versus lateral distance for various lateral electric fields for field-effect transistors of an example embodiment, which have the layer structure of Fig. 4.
- Fig. 5 is a
- FIG. 6 is a cross-sectional view of a longitudinal (vertical) field-effect transistor in accordance with an example embodiment.
- Fig. 7 is a graphical representation of the cross-sectional thickness of a semiconductor layer and a dielectric layer over the semiconductor layer of a half- cell in accordance with an example embodiment.
- ⁇ field effect devices having a relatively high voltage, substantially constant longitudinal electric field, which fosters a relatively reduced specific on- resistance, RD S (on), and a relatively high BV S in the drift region of the device.
- this substantially constant electric field sometimes referred to as the RESURF condition, is lateral or horizontal in horizontal devices, and longitudinal or vertical in vertical devices.
- the thicknesses and profiles of the semiconductor and dielectric layers in the drift region, as well as the doping concentration as a function of distance across the drift are determined from Poisson's Equation in one-dimension for a constant electric field component in the desired direction.
- the example embodiments described herein are drawn generally to metal-oxide-silicon (MOS) high voltage field-effect transistors (FETs).
- the FETs are silicon lateral double-diffused MOS (LDMOS) devices or vertical diffused MOS (VDMOS) devices.
- the oxide used as the depletion region dielectric is an oxide of silicon, usefully SiO 2 .
- the gate material may be a suitable metal or doped polysilicon.
- the high voltage devices may be based on other materials and technologies.
- the devices may include Si-Ge, SiC or GaN as the semiconductor in the depletion region.
- the fabrication techniques for layer formation, component formation and doping for forming the devices of the example embodiments are well-known to one having ordinary skill in the art.
- the exponential doping concentrations in horizontal devices of example embodiments may be formed by providing non-uniform spacing and openings of varying area.
- epitaxial doping techniques may be used to provide the doping variation.
- the doping of the silicon pillar(s) could be achieved by epitaxial growth or multiple high energy implant and diffusion.
- the shaping of the pillar could be achieved by controlled reactive ion etch.
- Fig. 1 is a cross-sectional view of a MOSFET (device) 100 in accordance with an example embodiment.
- the device 100 is illustratively a silicon-on- insulator (SOI) device, although, as mentioned above could be based on of a variety of semiconductor technologies.
- the device 100 includes a substrate 101, over which a dielectric layer 102 is disposed.
- a tapered layer 103 of silicon is disposed over the dielectric layer 102, and includes the drift region or channel of the device 101 disposed between a source 106 and a drain 107.
- a dielectric layer 104 is disposed over the tapered layer 103, and the field plate 105 is disposed over the dielectric layer 104, completing the structure.
- the dielectric layers 102 and 104 are illustratively an oxide of silicon, although other dielectric materials adapted for high voltage applications may be used.
- low-dielectric constant (low-k) materials such as SILK or benzocylobutene (BCB), or other suitable low-k material may be used as dielectric layers 102, 104.
- low-k layers is particularly beneficial in reducing the pitch from device to device in vertical MOSFET devices of example embodiments described herein.
- low-k materials are useful in lateral devices as they improve surface planarity by using thinner dielectric layers for the same silicon or drift region thickness. They also have higher breakdown field strength. It is clearly a second order effect in lateral devices, whereas in vertical devices the pitch reduction with low-k is more substantial.
- the field plate (gate) 105 may be a suitable metal or doped polysilicon, well- known in the semiconductor processing arts.
- the source and drain may each include lightly doped regions (not shown) to reduce hot-carrier effects as is known in the art.
- the substrate 101 is silicon and is n-doped to a suitable doping level.
- the drain 107 and the source are also n-doped and the tapered region 103 is p-doped with suitable dopants.
- the doping profile of the tapered layer 103 is determined to provide a substantially constant and relatively high lateral electric field, and a relatively low on-resistance and relatively high breakdown voltage. It is noted that the thickness profiles of the tapered layer 103 and the dielectric layers 102, 104 are determined in keeping with the desired characteristics of the lateral electric field. Finally, while the thickness profiles of these layers may change for a given electric field, their total thickness remains substantially constant.
- the high magnitude, substantially constant lateral electric field is useful in providing the desired low on-resistance for a desired breakdown voltage in field effect transistors of the example embodiments.
- having a high lateral electric field requires a certain level of charge (dopants) in the drift region to support the high field level. This relatively high doping level fosters the lower on-resistance.
- the profile of the doping level in the drift region of the device is tailored to meet a desired lateral electric field and breakdown voltage.
- Fig. 2 is a cross-sectional graph of a lateral cell showing the thickness of the SOI layer 201 decreasing linearly across the lateral (x-direction in Fig. 1) extent of the drift region.
- the dielectric or oxide layer 202 increases laterally so that the combined thickness (in ⁇ m) of the layers is constant.
- the doping profile is determined across the length of the SOI layer 201 for a given breakdown voltage, the solution Poisson's equation are in the vertical or transverse direction at two arbitrarily close lateral positions. The definition of the derivative is then used to get a solution for the relationship of doping and layer thicknesses for a desired lateral (longitudinal) electric field.
- the thickness of the silicon and the oxide may be varied as desired, and the doping concentration with distance calculated. : To this end, using the dimensionally correct equation:
- the lateral electrical field is a known value for the desired breakdown voltage and on-resistance, and the SOI functional dependence is determined.
- the equations are solved for the doping as a function of lateral position N D (x), and for the thickness of the dielectric layer as a function of lateral distance.
- the doping profile, N D (x), and the oxide thickness as a function of lateral distance can be readily determined.
- the solutions to the above equation are useful in determining the relevant profiles of the doping and layers are for the self-terminated device lateral or vertical stripe device layout in Cartesian coordinates, and not a device of another array, such as a circular or hexagonal array.
- a similar equation must be solved for each desired coordinate system in which the device is to be implemented.
- the longitudinal field should be constant and as high as possible.
- the longintudal direction is the lateral one in the +x-direction (see coordinate system of Fig. 1).
- Fig. 3 is a graphical representation of the doping level as a function of lateral distance determined from the above-described calculations for various chosen lateral electric fields, where the thickness of the SOI layer and the oxide layer are as shown in Fig. 2.
- the doping level is depicted by curve 301
- the doping level is depicted by curve 302.
- the curves 303 intervening curve 301 and 302 are the doping functions for lateral electric field values between 10 V/ ⁇ m and 20 V/ ⁇ m.
- the determination of the profile of the silicon (SOI) layer illustratively is effected by calculating the two-dimensional ionization integral within the silicon for a particular breakdown voltage.
- the ionization integral in x, y must be solved.
- the ionization integral is exponentially dependent on the lateral electric field (E x ); thus any non-uniformity in the electric field will significantly increase the impact ionization, and thus reduce the breakdown voltage. Accordingly, the high constant lateral electric field in the lateral device embodiments fosters a comparatively reduced on-resistance and increased breakdown voltage.
- the ionization integrals in the orthogonal x and y directions are solved with relevant physical and electrical parameters, and avalanche breakdown of the device is defined at which the sum of the orthogonal ionization integrals is equal to one.
- the vertical or transverse ionization integral can be written as:
- a and b are the ionization coefficients for silicon
- Ld is the drift length of the device
- all other parameters related to thickness of the layers and the doping level of the silicon are valid for an orthogonal ionization path through the silicon layer; calculation of these integrals along any other path from source-to-drain simply entails finding the vector product of the total electric field along the desired path.
- a device is desired to have a breakdown voltage of 700 V.
- Fig. 1 Solutions to the ionization integral in two dimensions for a lateral device providing the lowest on-resistance for a given lateral electric field require the silicon layer to have an exponentially decreasing thickness from source to drain.
- the device of Fig. 1 could have such a profile.
- the silicon could have a thickness to the one-half-power with lateral distance.
- Such an SOI/oxide profile is shown in Fig. 4.
- an oxide layer 402 increases exponentially with an exponent that is the positive of the exponent of the silicon function.
- a lateral device having the thickness profile in the drift shown in Fig. 4 and the doping concentration of Fig. 5 provides a breakdown voltage of 710 V and an on- resistance of 2.4 ⁇ mm 2 . This represents a 20% decrease in the on-resistance . compared to a planar device having an SOI thickness of 0.25 ⁇ m and an oxide thickness of 3.0 ⁇ m.
- the example embodiments include vertical high- voltage field effect devices, such as the VDMOS.
- Such a device is shown in Fig. 6.
- the device structure 600 includes a plurality of devices 601 having a desired pitch. Each device has a drift region of a silicon pillar 602, which is p-type.
- the drift region 602 is disposed between an n-type source region 603, which is adjacent the p-type channel 604, and a drain region 605.
- a gate 607 illustratively doped polysilicon, is disposed over the channel 604 and sources 603.
- the gate is coupled to a field plate 607, which controls conduction in the drift region as is well known.
- the field plate 607 is disposed between adjacent layers of dielectric material 608, which is useful in controlling carrier depletion in the respective channels 604 and in the drift region 602.
- the drain region provides an avenue for depletion from the bottom of the device, while the field plate 607 is grounded for depletion from the surface.
- the dielectric layers 608 may be low-k materials, which is useful in decreasing the pitch of the devices 601. Of course this is advantageous from the perspective of price and performance.
- the devices 601 of the structure 600 are vertical devices, and desirably provide a longitudinal electric field (y-direction) that is substantially constant across the driftregion 602 and comparatively large in magnitude.
- the analysis of the desirable parameters of breakdown voltage and on-resistance is similar to that of the lateral (x-direction) device, excepting of course that the analyses and computations are carried out in the y-dimension as needed. For example, rather than solving the one-dimension Poisson equation for a constant E x , this equation is solved in the y-direction for a constant E y .
- these and other similar calculations are readily understood to one of ordinary skill in the art, these are not described in further detail so as to not obscure the description of the embodiments.
- FIG. 7 A graphical representation of the silicon and low-k layers of a vertical device in accordance with an example embodiment is shown in Fig. 7.
- the silicon layer 701 has a negative exponential curvature, while the low-k layer 702 is of an increasing exponential curvature.
- This structure is similar to that of the devices of Fig. 6, with the silicon layer 701 and low-k layer 702 being a half-cell of the drift and dielectric layers.
- the silicon layer 701 has a decreasing thickness with longitudinal distance (y-direction) from the source (e.g., the source 603) to the drain region (e.g., the drain 605), while the dielectric layer increases exponentially from source to drain.
- the devices of the example embodiments of Fig. 6 may have a geometry in the plane of the surface that is hexagonal, square, circular or stripe, without loss of generality. It is noted that [o]this analysis and performance pertains to stripe geometries.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
- Formation Of Insulating Films (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP05709000A EP1735839A2 (en) | 2004-03-15 | 2005-03-11 | Field-effect device having a metal-insulator-semiconductor high-voltage structure and method of making the same |
JP2007503478A JP2007529892A (en) | 2004-03-15 | 2005-03-11 | Tapered unit cell metal oxide semiconductor high voltage device structure |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US55331004P | 2004-03-15 | 2004-03-15 | |
US60/553,310 | 2004-03-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2005091371A2 true WO2005091371A2 (en) | 2005-09-29 |
WO2005091371A3 WO2005091371A3 (en) | 2006-03-30 |
Family
ID=34961262
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2005/050887 WO2005091371A2 (en) | 2004-03-15 | 2005-03-11 | Field-effect device having a metal-insulator-semiconductor high-voltage structure and method of making the same |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP1735839A2 (en) |
JP (1) | JP2007529892A (en) |
CN (1) | CN100576564C (en) |
WO (1) | WO2005091371A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006018820A2 (en) * | 2004-08-20 | 2006-02-23 | Koninklijke Philips Electronics N.V. | Semiconductor devices and the manufacture thereof |
US9748368B2 (en) | 2013-07-03 | 2017-08-29 | University Of Calcutta | Tunnel field-effect transistor (TFET) with supersteep sub-threshold swing |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7692263B2 (en) * | 2006-11-21 | 2010-04-06 | Cree, Inc. | High voltage GaN transistors |
CN102299163B (en) * | 2011-09-13 | 2014-01-08 | 中国科学院上海高等研究院 | Image sensor |
CN103633136B (en) * | 2012-08-20 | 2016-02-10 | 上海华虹宏力半导体制造有限公司 | LDMOS device and manufacture method thereof |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0549042A2 (en) * | 1991-12-20 | 1993-06-30 | Koninklijke Philips Electronics N.V. | Improved high voltage thin film transistor having a drift region with a linear doping profile and a field plate |
US20030006458A1 (en) * | 2001-07-03 | 2003-01-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
EP1291926A2 (en) * | 2001-09-07 | 2003-03-12 | Power Integrations, Inc. | High-voltage semiconductor devices |
WO2003050883A2 (en) * | 2001-12-10 | 2003-06-19 | Koninklijke Philips Electronics N.V. | Silicon on insulator device and method of making the same |
-
2005
- 2005-03-11 CN CN200580008214A patent/CN100576564C/en not_active Expired - Fee Related
- 2005-03-11 EP EP05709000A patent/EP1735839A2/en not_active Withdrawn
- 2005-03-11 WO PCT/IB2005/050887 patent/WO2005091371A2/en not_active Application Discontinuation
- 2005-03-11 JP JP2007503478A patent/JP2007529892A/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0549042A2 (en) * | 1991-12-20 | 1993-06-30 | Koninklijke Philips Electronics N.V. | Improved high voltage thin film transistor having a drift region with a linear doping profile and a field plate |
US20030006458A1 (en) * | 2001-07-03 | 2003-01-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device |
EP1291926A2 (en) * | 2001-09-07 | 2003-03-12 | Power Integrations, Inc. | High-voltage semiconductor devices |
WO2003050883A2 (en) * | 2001-12-10 | 2003-06-19 | Koninklijke Philips Electronics N.V. | Silicon on insulator device and method of making the same |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006018820A2 (en) * | 2004-08-20 | 2006-02-23 | Koninklijke Philips Electronics N.V. | Semiconductor devices and the manufacture thereof |
WO2006018820A3 (en) * | 2004-08-20 | 2006-08-17 | Koninkl Philips Electronics Nv | Semiconductor devices and the manufacture thereof |
US9748368B2 (en) | 2013-07-03 | 2017-08-29 | University Of Calcutta | Tunnel field-effect transistor (TFET) with supersteep sub-threshold swing |
Also Published As
Publication number | Publication date |
---|---|
CN1930690A (en) | 2007-03-14 |
JP2007529892A (en) | 2007-10-25 |
CN100576564C (en) | 2009-12-30 |
EP1735839A2 (en) | 2006-12-27 |
WO2005091371A3 (en) | 2006-03-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7332770B2 (en) | Semiconductor device | |
US8890280B2 (en) | Trench-type semiconductor power devices | |
US8237195B2 (en) | Power MOSFET having a strained channel in a semiconductor heterostructure on metal substrate | |
US10355087B2 (en) | Semiconductor device including a transistor with a gate dielectric having a variable thickness | |
US6218228B1 (en) | DMOS device structure, and related manufacturing process | |
US20040065919A1 (en) | Trench gate laterally diffused MOSFET devices and methods for making such devices | |
US7476932B2 (en) | U-shape metal-oxide-semiconductor (UMOS) gate structure for high power MOS-based semiconductor devices | |
US9299788B2 (en) | Multi-gate VDMOS transistor | |
KR101755718B1 (en) | Lateral Double diffusion Metal-Oxide_Semiconductor device and method for manufacturing the same | |
US7253459B2 (en) | Semiconductor devices and methods of manufacture thereof | |
Jovanović et al. | Ultra-high aspect-ratio FinFET technology | |
CN100505308C (en) | High-voltage device structure | |
WO2005091371A2 (en) | Field-effect device having a metal-insulator-semiconductor high-voltage structure and method of making the same | |
Nautiyal et al. | Application of workfunction engineering in vertical superjunction devices | |
US10026835B2 (en) | Field boosted metal-oxide-semiconductor field effect transistor | |
US20020017682A1 (en) | Semiconductor device | |
Wang et al. | Reducing the specific on-resistance for a trench-gate-integrated SOI LDMOS by using the double silicon drift layers | |
US8704296B2 (en) | Trench junction field-effect transistor | |
CN106384747B (en) | A kind of field-effect tube | |
Kaur et al. | A review on power MOSFET device structures | |
US9590093B2 (en) | Semiconductor device | |
US20070126057A1 (en) | Lateral DMOS device insensitive to oxide corner loss | |
US20090020832A1 (en) | Semiconductor Devices and the Manufacture Thereof | |
US20230352520A1 (en) | Wide band gap semiconductor device | |
Pawel et al. | Theoretical evaluation of maximum doping concentration, breakdown voltage and on-state resistance of field-plate compensated devices |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A2 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A2 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 2005709000 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2007503478 Country of ref document: JP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 200580008214.2 Country of ref document: CN |
|
NENP | Non-entry into the national phase in: |
Ref country code: DE |
|
WWW | Wipo information: withdrawn in national office |
Country of ref document: DE |
|
WWP | Wipo information: published in national office |
Ref document number: 2005709000 Country of ref document: EP |