WO2005013348A3 - Formation of ultra-thin oxide and oxynitride layers by self-limiting interfacial oxidation - Google Patents

Formation of ultra-thin oxide and oxynitride layers by self-limiting interfacial oxidation Download PDF

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Publication number
WO2005013348A3
WO2005013348A3 PCT/US2004/024595 US2004024595W WO2005013348A3 WO 2005013348 A3 WO2005013348 A3 WO 2005013348A3 US 2004024595 W US2004024595 W US 2004024595W WO 2005013348 A3 WO2005013348 A3 WO 2005013348A3
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WO
WIPO (PCT)
Prior art keywords
ultra
thin oxide
substrates
layer
self
Prior art date
Application number
PCT/US2004/024595
Other languages
French (fr)
Other versions
WO2005013348A2 (en
Inventor
David L O'meara
Cory Wajda
Anthony Dip
Michael Toeller
Toshihara Furukawa
Kristen Scheer
Alessandro Callegari
Fred Buehrer
Sufi Zafar
Evgeni Gousev
Anthony Chou
Paul Higgins
Original Assignee
Tokyo Electron Ltd
Ibm
David L O'meara
Cory Wajda
Anthony Dip
Michael Toeller
Toshihara Furukawa
Kristen Scheer
Alessandro Callegari
Fred Buehrer
Sufi Zafar
Evgeni Gousev
Anthony Chou
Paul Higgins
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/630,969 external-priority patent/US7235440B2/en
Priority claimed from US10/630,970 external-priority patent/US7202186B2/en
Application filed by Tokyo Electron Ltd, Ibm, David L O'meara, Cory Wajda, Anthony Dip, Michael Toeller, Toshihara Furukawa, Kristen Scheer, Alessandro Callegari, Fred Buehrer, Sufi Zafar, Evgeni Gousev, Anthony Chou, Paul Higgins filed Critical Tokyo Electron Ltd
Priority to JP2006522087A priority Critical patent/JP4933256B2/en
Publication of WO2005013348A2 publication Critical patent/WO2005013348A2/en
Publication of WO2005013348A3 publication Critical patent/WO2005013348A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

Ultra-thin oxide and oxynitride layers are formed utilizing low pressure processing to achieve self-limiting oxidation of substrates and provide ultra-thin oxide and oxynitride. The substrates to be processed can contain an initial dielectric layer such as an oxide layer, an oxynitride layer, a nitride layer, a high-k layer, or alternatively can lack an initial dielectric layer. The processing can be carried out using a batch type process chamber or, alternatively, using a single-wafer process chamber. One embodiment of the invention provides self-limiting oxidation of Si-substrates that results in Si02 layers with a thickness of about 15Å, where the thickness of the Si02 layers varies less than about 1 Åover the substrates.
PCT/US2004/024595 2003-07-31 2004-07-30 Formation of ultra-thin oxide and oxynitride layers by self-limiting interfacial oxidation WO2005013348A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006522087A JP4933256B2 (en) 2003-07-31 2004-07-30 Method for forming a semiconductor microstructure

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US10/630,969 US7235440B2 (en) 2003-07-31 2003-07-31 Formation of ultra-thin oxide layers by self-limiting interfacial oxidation
US10/630,970 2003-07-31
US10/630,970 US7202186B2 (en) 2003-07-31 2003-07-31 Method of forming uniform ultra-thin oxynitride layers
US10/630,969 2003-07-31

Publications (2)

Publication Number Publication Date
WO2005013348A2 WO2005013348A2 (en) 2005-02-10
WO2005013348A3 true WO2005013348A3 (en) 2005-09-22

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2004/024595 WO2005013348A2 (en) 2003-07-31 2004-07-30 Formation of ultra-thin oxide and oxynitride layers by self-limiting interfacial oxidation

Country Status (2)

Country Link
JP (1) JP4933256B2 (en)
WO (1) WO2005013348A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060151846A1 (en) * 2005-01-13 2006-07-13 International Business Machines Corporation Method of forming HfSiN metal for n-FET applications
US7402472B2 (en) * 2005-02-25 2008-07-22 Freescale Semiconductor, Inc. Method of making a nitrided gate dielectric
US7534731B2 (en) * 2007-03-30 2009-05-19 Tokyo Electron Limited Method for growing a thin oxynitride film on a substrate

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296412A (en) * 1992-06-26 1994-03-22 Tokyo Electron Limited Method of heat treating semiconductor wafers by varying the pressure and temperature
US6258731B1 (en) * 1998-04-24 2001-07-10 Nec Corporation Method for fabricating oxide film
US20020102859A1 (en) * 2001-01-31 2002-08-01 Yoo Woo Sik Method for ultra thin film formation
US20020111001A1 (en) * 2001-02-09 2002-08-15 Micron Technology, Inc. Formation of metal oxide gate dielectric

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3493371B2 (en) * 1999-12-17 2004-02-03 独立行政法人産業技術総合研究所 Method for forming silicon oxide film
JP2003069011A (en) * 2001-08-27 2003-03-07 Hitachi Ltd Semiconductor device and method of manufacturing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296412A (en) * 1992-06-26 1994-03-22 Tokyo Electron Limited Method of heat treating semiconductor wafers by varying the pressure and temperature
US6258731B1 (en) * 1998-04-24 2001-07-10 Nec Corporation Method for fabricating oxide film
US20020102859A1 (en) * 2001-01-31 2002-08-01 Yoo Woo Sik Method for ultra thin film formation
US20020111001A1 (en) * 2001-02-09 2002-08-15 Micron Technology, Inc. Formation of metal oxide gate dielectric

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
DERRIEN J., COMMANDRÉ M.: "SiO2 ultra thin film growth kinetics as investigated by surface techniques", SURFACE SCIENCE, vol. 118, June 1982 (1982-06-01), pages 32 - 46, XP002318317 *
KUNDU MANISHA ET AL: "Effect of oxygen pressure on the structure and thermal stability of ultrathin Al2O3 films on Si(001)", JOURNAL OF APPLIED PHYSICS, AMERICAN INSTITUTE OF PHYSICS. NEW YORK, US, vol. 91, no. 1, 1 January 2002 (2002-01-01), pages 492 - 500, XP012054528, ISSN: 0021-8979 *
RAISIN C., VIEUJOT E. ET AL.: "Work function measurements during growth of ultra thin films of SiO2 on characterized silicon surfaces", SOLID-STATE ELECTRONICS, vol. 27, no. 5, May 1984 (1984-05-01), pages 413 - 417, XP002318318 *

Also Published As

Publication number Publication date
JP4933256B2 (en) 2012-05-16
JP2007500946A (en) 2007-01-18
WO2005013348A2 (en) 2005-02-10

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