WO2005013328A2

WO2005013328A2 - Lan grid array interconnect methods for z-axis power delivery

Info

Publication number: WO2005013328A2
Application number: PCT/US2004/024124
Authority: WO
Inventors: Edward J. Derian; J. Ted Dibene Ii
Original assignee: Incep Technologies, Inc.
Priority date: 2003-07-28
Filing date: 2004-07-27
Publication date: 2005-02-10
Also published as: WO2005013328A3

Abstract

A land grid retention and interconnection system for high power low impedance delivery for microprocessors and other devices are used for Z-axis power delivery packaging architectures. The system includes a substrate (120) with LGA pads on its bottom and surface power delivery pads on its top. A subassembly includes an LGA socket subassembly (150) with a cage (108) for retaining the substrate (120) and contact with the land grid array beams of the LGA socket subassembly (150).

Description

LAN GRID ARRAY INTERCONNECT METHODS FOR Z-AXIS POWER DELIVERY

CROSS REFERENCE TO RELATED APPLICATIONS

[01] The application claims the benefit of U.S. Provisional Application Serial No. 60/490,672 filed July 28, 2003, titled "LGA Interconnect methods for Z-axis power delivery" which is hereby incorporated by reference. This application is related to, and incorporates by reference in its entirety, U.S. Patent Application No. 10/036,957: Ultra- Low Impedance Power Interconnection System for Electronic Packages.

FIELD OF THE INVENTION

[02] This invention relates to methods for securing and interconnecting a Z-axis power delivery architecture using an LGA interconnection system for the connections between the device and the motherboard.

BACKGROUND OF THE INVENTION

[03] LGA interconnection systems are used extensively in many applications including microprocessors. LGA interconnects provide low package assembly costs, relatively high signal performance, and small form factor. However, virtually all LGA interconnection systems are designed such that all of the power and signal interconnection is made through the bottom of the package. This has the disadvantage of having to use up many of the LGA connections on the bottom of package where the resistance of such connections is high and not relatively conducive to bussing high currents from the motherboard planes. Moreover, the more LGA interconnects on the bottom side of the package the higher the forces needed to compress and make reliable electrical contact. This necessitates the need for a method which combines the benefits of LGA type interconnects with the ability to reduce the connections or eliminate the power connections in this manner altogether.

[04] Microprocessors and other high performance devices require very low impedance interconnection systems for delivery of high current at high slew-rates from voltage regulator technologies. Often, this interconnection system necessitates that the power source is located very close to the substrate of the device and delivery of power from the interconnection system is accomplished by directly interconnecting to the substrate itself. Though placing a mating connector on either side of the substrate is feasible, it is undesirable due to the cost and complexity of integrating a connector system into the device substrate itself. Thus, it is seen that there is a need to interconnect directly to the surface of the substrate itself, opposite the side where the interconnections of the signals are made. This allows one to segment power delivery from signal interconnect. A method that connects to the top surface of the package which eliminates or reduces the number of power connections to the LGA connection side would be very advantageous.

SUMMARY OF THE INVENTION

[05] One aspect of the invention relates to an assembly which is suitable for use as a mating socket for a substrate having Ian grid array contacts on one side and surface pad contacts on the opposite side. The assembly can include a frame. A cage with the first end rotatably coupled to the frame and a second end with at least one catch hook. The cage cooperates with a locking bar, which is also coupled to the frame, to hold a processor carrier or substrate in place. The locking bar can include at least one catch bar.

[06] In another aspect, a processor can have a first side and a second side. Surface contacts for receiving power and ground are located on the first side and Ian grid array pads are located on the opposite side. The cage is configured so as to leave the surface pads exposed when the processor carrier is locked into the subassembly.

[07] Another aspect relates to a circuit board with a power conditioning circuit. The circuit board includes springs or contacts arranged to contact the surface contacts of the processor carrier.

[08] These and other aspects of the invention will become apparent to those of ordinary skill in the art upon a review of the following detailed description in connection with the appended drawings.

BRIEF DESCRIPTION OF DRAWINGS

[09] FIG 1 A is an isometric view of the surface power delivery LGA package with the mating socket in an exploded view. [10] FIG IB is an isometric view of the surface power delivery LGA package with mating socket in as assembled view.

[11] FIG 2 is an isometric exploded view of the entire surface power delivery packaging showing the relevant components in the assembly.

[12] FIG 3A is an assembled isometric view without the heatsink assembly but showing the Z-axis mounted on top of the surface power delivery LGA package with a section taken out to reveal the salient components.

[13] FIG 3B is an expanded view of FIG 3 A.

[14] FIG 4 is an isometric exploded view of the 'snap' socket arrangement for the LGA.

[15] FIG 5 A is an isometric exploded view of FIG 4 without the Z-axis and heatsink shown for clarity.

[16] FIG 5B is an isometric assembled view of FIG 5 A.

[17] FIG 5C is a side section view of the snap socket showing the salient features in the stackup.

[18] FIG 6 is an exploded isometric view of another instantiation of the Z-axis LGA surface power delivery utilizing an alignment pin feature which aligns all the components in the stackup with pin features and which utilizes an interposer type LGA socket.

[19] FIG 7 is an isometric assembled expanded view of the stackup in FIG 6.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[20] FIG 1 A shows an embodiment of the surface power delivery Ian grid array (LGA) package with mating socket in an exploded view. Substrate 120 (such as a processor carrier) of package 100 has LGA pads (not shown) on its bottom side for interconnecting with LGA beams 114 on the socket subassembly 150. On the top side of the package, lid 102 encloses a die. The die may be, for example, a microprocessor die, an Application Specific Integrated Circuit (ASIC) die, or a plurality of dies and components which may or may not include a microprocessor or ASIC die. Lid 102 is typically used for heat spreading and device die protection. Surface power delivery pads 104 are shown circumscribing the device package. However, they may also be on less than all four sides and may not take up the entire edge of the device package. Also, one skilled in the art can envision that the pads may be of different shapes than rectangular and may be moved towards or away from the die, for example, if the lid is smaller or removed. Alignment slots 106 are shown adjacent to one side of the package for alignment with the alignment pins 110 of the socket subassembly 150.

[21] Subassembly 150 comprises cage 108 where catch hooks 109 are intended for locking with the catch of locking bar 112. In this embodiment the capture mechanism includes the cage 108 and locking bar 112. When package 100 is placed into socket subassembly 150, slots 106 cooperate with pins 110 to align the package so that the socket beams 114 are aligned with the corresponding pads on the bottom side of substrate 120. In one embodiment, the substrate 120 is an interposer board or substrate on which a processor or ASIC package is attached. Subassembly 100 is cradled by frame section 118. Area 116 is typically vacant of beams to allow for placement of components on the underside of subassembly 100 or for other objects which may reside on the printed circuit board to which socket subassembly 150 is attached. Cage 108 is brought over on top of package 100 and catch locking bar 112 is actuated over by lever end 115, cooperating with hinge portions 136, where catch bars 113 lock with catch hooks 109.

[22] FIG IB shows the package of FIG 1 A in an isometric assembly view. Assembly 170 comprises package 100 and socket subassembly 150. When in the 'closed' position, locking bar 112 is latched with catch 130. The bar 112 preferably has sufficient compliancy to allow it to actuate over catch 130. Cage 108 resides on contact portion 132 of substrate 120 which forces subassembly 100 to compress against beams 114 of socket subassembly 150. A mechanical plate or other mechanism may be placed in contact portion 132 to prevent damage of substrate 120 from forces acted upon by cage 108. Note that cage 108 is retained at one end by openings 134 and by catch bars 113 at the opposite end.

[23] FIG 2 shows an isometric exploded view of the entire surface power delivery packaging with the LGA catch mechanism as shown in FIG 1. Assembly 200 includes heatsink 210, retention screws 220, Z-axis voltage regulation module (VRM) 230, LGA- socket subassembly 170, and retention feature 250. Note that retention feature 250 protrudes through printed circuit board 270. Retention feature 250 is typically a plate with standoffs but may also be another construction for retaining the heatsink and Z-axis VRM to the printed circuit board.

[24] FIG 3 A shows the assembly from FIG 2 in an assembled view but without the heatsink shown for clarity. A portion of the assembly is depicted as rutaway for ease in explanation. Also not shown is the retention feature 250 which typically protrudes into holes (302) in printed circuit 270. FIG 3B is an enlarged isometric view of a portion of FIG 3 A. Z-axis VRM 230 is aligned to pins 110 in socket subassembly 150 via openings 235 in VRM 230. Also shown are springs 332 (FIG 3B), which contact pads 104 of substrate 120. In one embodiment, the springs 332 provide electrical connection between the VRM 230 and the pads 104 of the substrate 120. The pads 104 may, for example, be surface power delivery pads, including power, power return, common, and ground. Alternatively, the pads 104 may be signal connection pads. Note that the cage feature creates retention for the package while simultaneously allowing access to the surface pads for power delivery.

[25] FIG 4 shows an exploded isometric view of another embodiment of the LGA socket which does not use a cage for holding the package in place. Assembly 400 includes heatsink assembly 410, Z-axis VRM 420, package 170, and snap socket 440. Retention feature 450 and retention screws 460 are similar to those previously described.

[26] FIG 5 A shows assembly 500 in an exploded view with the snap socket 440 and package 100 without the other components where snap socket 440 is mounted to printed circuit board 520. Printed circuit board 520 can be, for example, a motherboard or adapter board. FIG 5B shows the assembled view of assembly 500 with subassembly 530, which comprises package 100 and snap socket 440 in a mated fashion. FIG 5C shows a side section view of assembly 500 showing the stackup of the package and socket. When package 100 is inserted into snap socket 440 retention features 504 (the capture mechanism) retain the socket prior to assembly of the Z-axis VRM and the heatsink. The features 504 may either 'give' mechanically or may have a spring mechanism which actuates when the substrate package engages over the feature 504. The feature may be released using a lever or push button (not shown). Many instantiations of releasing the snap feature 504 may be envisioned without departing from the scope of the invention.

Additionally, instead of compressing the springs 506 using a cage such as described in

FIG 1 , the heatsink retention mechanism is utilized to compress the springs which eliminates the need for the extra hardware. It should be noted that one of the main purposes of the snap feature is prevent the device from springing away from the socket possibly dis-engaging it from the alignment features 502 or the socket and possibly damaging it when the heatsink and VRM are mated with it. Note that under full compression the base of package 100 may be compressed against base 508 of snap socket

440.

[27] FIG 6 shows another instantiation of the invention. Assembly 600 is shown in an exploded view and including VRM 610 (note the heatsink is not shown for clarity), package 620, interposer LGA 630, and printed circuit board 640. In this embodiment pads (not shown) reside on printed circuit board 640 allowing for mating of springs on the bottom side of interposer LGA 630. Pins 606 in interposer LGA 630 connect and align each assembly in the stackup including the interposer LGA 630 to printed circuit board 640 through holes 602, interposer LGA 630 to package 620 with slots, and interposer LGA 630 to Z-axis VRM 610 to holes also. Also note holes 604 in printed circuit board 640 which are intended for a retention feature for the heatsink as previously described in FIG 5.

[28] FIG 7 shows an enlarged assembly view of FIG 6 illustrating some of the salient features. Note how pin 606 is used to align printed circuit board 640, interposer LGA 630, and VRM 610 together in the stackup as shown in FIG 6.

[29] The foregoing description details certain embodiments of the invention. It would be appreciated, however, that no matter how detailed the foregoing appears the invention may be embodied by other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is indicated by the appended claims rather then by the foregoing description. All changes which come within the meaning and range of equivalence of the claims are to be embraced within their scope.

Claims

WHAT IS CLAIMED IS: 1. An assembly comprising: a processor carrier having a first side, a second side substantially opposite the first substrate side, surface contacts for receiving power and ground on the first side and Ian grid array contacts on the second side; and a circuit board having a socket subassembly with Ian grid array beams, a capture mechanism configured to capture and retain the processor carrier such that the Ian grid array contacts on the processor carrier are aligned with and in contact with the Ian grid array beams while leaving the surface contacts on the processor carrier exposed.

2. The assembly of claim 1 further comprising a processor located on the first side of the processor carrier and a heat sink thermally coupled to the processor.

3. The assembly of claim 1 further comprising a circuit board having a power conditioning circuit, a first side and a second side substantially opposite the first side, spring contacts arranged to contact the surface contacts of the processor carrier, the circuit board located adjacent the processor carrier and at substantially a right angle to the circuit board.

4. The assembly of claim 1 wherein the capture mechanism comprises a cage with catch hooks and a locking bar configured to engage the catch hooks.

5. The assembly of claim 1 wherein the capture mechanism comprises a snap socket having retention features.

6. An assembly comprising: a frame; a cage having a first end rotatably coupled to the frame and a second end with at least one catch hook; a locking bar coupled to the frame and having at least one catch bar at an end of the frame opposite the first end of the cage, the at least one catch bar configured to lock with the at least one catch hook; and a plurality socket beams coupled to the frame.

7. The assembly of claim 6 further comprising a processor carrier having a first side, a second side substantially opposite the first substrate side, surface contacts for receiving power and ground on the first side, said surface contacts being arranged to remain exposed when the cage is locked with the locking bar.

8. The assembly of claim 7 further comprising a circuit board having a power conditioning circuit, a first side and a second side substantially opposite the first side, the circuit board located adjacent the processor carrier and having springs on the first side arranged to contact the surface contacts of the processor carrier.

9. The assembly of claim 6 further comprising alignment pins.

10. The assembly of claim 6 wherein the locking bar further comprises at least one lever end opposite the catch bar.