WO2004104823A2 - Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime enviroments - Google Patents
Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime enviroments Download PDFInfo
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- WO2004104823A2 WO2004104823A2 PCT/US2004/008589 US2004008589W WO2004104823A2 WO 2004104823 A2 WO2004104823 A2 WO 2004104823A2 US 2004008589 W US2004008589 W US 2004008589W WO 2004104823 A2 WO2004104823 A2 WO 2004104823A2
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- program code
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- unlock
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/40—Transformation of program code
- G06F8/41—Compilation
- G06F8/44—Encoding
- G06F8/443—Optimisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
- G06F9/45504—Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
- G06F9/45516—Runtime code conversion or optimisation
- G06F9/45525—Optimisation or modification within the same instruction set architecture, e.g. HP Dynamo
Definitions
- Dynamic program language instructions are not statically compiled and linked directly into native or machine code for execution by the target platform (i.e., the operating system and hardware of the target processing system or platform). Instead, dynamic program language instructions are statically compiled into an intermediate language (e.g., bytecodes) and the intermediate language may interpreted or subsequently compiled by a just-in-time (JIT) compiler into native or machine code that can be executed by the target processing system or platform.
- the JIT compiler is provided by a runtime environment that is hosted by the operating system of a target processing platform such as, for example, a computer system.
- Known escape analysis techniques are based on a statically linked code model that assumes that no new classes of objects will be loaded during runtime.
- some popular programming languages such as, for example, Java and CLI, provide a dynamic class loading feature that allows dynamic linking of methods or functions that are about to be called within a runtime context.
- loading a class dynamically into a runtime environment that is executing a previously optimized program e.g., a program from which synchronization has been removed in whole or in part
- can cause the program to behave in an unsafe manner e.g., data contention
- Fig. 3 illustrates example Java-based code for another class that invalidates the synchronization removal for call site A if loaded dynamically.
- the JIT compiler 114 may store native code (i.e., machine code compatible with and, thus executable by, the computer system 108) in a JIT in-memory cache (JIT IMC) 116.
- JIT IMC JIT in-memory cache
- the runtime environment 112 can re-use native code associated with a previously compiled method that is invoked or called more than once.
- intermediate language instructions compiled into native code and stored in the JIT IMC 116 can be re-used and executed multiple times by the runtime environment 112.
- the JIT IMC 116 is depicted as being implemented within the runtime environment 112, other configurations for the JIT IMC 116 are possible.
- the keyword "synchronized” is used at the language level (i.e., high level) to declare a block or method to be protected by synchronization.
- the low level or managed runtime primitives corresponding to the language level keyword “synchronized” are "monitorenter” and “monitorexit.”
- low level synchronization primitives will be referred to as “lock” and “unlock” and the high level or language level synchronization statements will be referred to using the keyword "synchronized.”
- the initial optimization may be based on a conventional or known escape analysis that performs a closed-world type analysis resulting in the removal of synchronization operations associated with, for example, global objects without contention or non-global objects.
- the synchronization restoration apparatus and methods described herein can be used in a dynamic class loading context.
- the resynchronization apparatus and methods described herein enable a JIT compiler (e.g., the JIT compiler 114) to determine if a newly loaded class changes the behavior of a program currently being executed in a manner that invalidates the optimization decisions (e.g., synchronization operation removals) made during an initial closed- world type escape analysis.
- the synchronization restoration apparatus and methods described herein can restore synchronization to (patch synchronization back into) call sites that have previously been desynchronized as a result of an initial closed- world escape analysis.
- the synchronization restoration apparatus and methods described herein also analyze runtime contexts and generate compensation code such as, for example, lock and unlock operations to maintain proper synchronization semantics.
- Fig. 3 depicts example Java-based code that includes a new class "Class2" that is derived from “Class 1.” If, while the program containing the code shown in Fig. 2 is being executed, the object "Class2" is dynamically loaded, the public static field "global" defined in Class 1 may also be an instance of Class2. Thus, because the virtual method
- Fig. 4 is flow diagram of an example manner in which the just-in-time compiler 114 shown in Fig. 1 may be configured to restore synchronization to or resynchronize call sites impacted by a dynamically loaded class such as, for example, the Class2 as described above in connection with Figs. 2 and 3.
- the runtime environment 112 determines if some open world features (e.g., a new class is loaded (block 400)) occur and will potentially undermine or invalidate the previously made desynchronization decision. If the JIT compiler 114 determines that there is not a newly loaded class at block 400, the JIT compiler remains at block 400. On the other hand, if the JIT compiler 114 determines that a new class has been loaded (block 400), the JIT compiler 114 executes an escape analysis of the whole program currently being executed, including the newly loaded class (block 402). The escape analysis may be implemented using any desired technique to identify objects that escape a thread (i.e., objects that are simultaneously accessible by more than one execution thread).
- the desynchronization performed during the earlier escape analysis is usually based on an assumption that one or more objects would remain thread safe. For example, assumptions made during an initial escape analysis performed on the code shown in Fig. 2 would be invalidated upon loading of the new class (i.e., Class2) defined within the code shown in Fig. 3. [0032] In any event, if the JIT compiler 114 determines that the assumption(s) made during a previous escape analysis are no longer valid (e.g., one or more objects are no longer thread safe and may require resynchronization), the JIT compiler 114 identifies the call sites that are impacted or affected as a result of the now incorrect assumptions (block 406).
- Fig. 5 is a more detailed flow diagram depicting an example manner in which the JIT compiler 114 may be configured to restore synchronization to impacted call sites (block 408 of Fig. 4).
- the JIT compiler 114 suspends all currently active execution threads (block 500). Suspending execution threads in this manner guarantees that the patching and lock/unlock compensation performed as described below can be carried out in a safe manner (i.e., without corrupting a currently executing process).
- Lock/unlock compensation is required in cases where one or more threads have been suspended subsequent to a call to unsynchronized code made prior to the patching (block 502) and before returning to the calling program.
- lifting the thread activity suspension immediately following patching (block 502) permits the JIT compiler 114 to call a synchronized version of a method while the already started (i.e., started prior to the suspension at block 500) unsynchronized version of that same method continues to execute.
- the object(s) associated with that method may be accessed by two execution threads at one time, which could result in an unsafe condition for one or more resources.
- lock/unlock compensation is used may be understood with reference to the example code shown in Figs. 2 and 3. For instance, if the JIT compiler 114 determines that, after Class2 has been loaded, the removal of synchronization at call site A is no longer valid (i.e., the escape analysis at block 402 of Fig. 4 has identified one or more objects that escape their execution threads), the JIT compiler 114 performs a resynchronization (i.e., restores synchronization to) call site A (block 408 of Fig. 4). If when performing lock/unlock compensation (block 504 of Fig.
- the JIT compiler 114 determines that a first execution thread is currently associated with an active call to an unsynchronized version of "foo," lock/unlock compensation is required.
- the first thread begins to execute "global.do_nothing(this)” at the same time at the same time that "global” becomes an instance of Class2, which assigns "obj" to "global” via the "do_nothing” method
- the second thread can simultaneously execute "global.foo().”
- the JIT compiler 114 may be attempting to execute both the synchronized and unsynchronized versions of "foo" on the same "obj,” thereby violating synchronization semantics and creating an unsafe shared resource condition.
- Fig. 6 is example pseudo-code depicting one manner in which the JIT compiler 114 shown in Fig. 1 may be configured to perform lock/unlock compensation for each thread associated with an impacted call site (block 504 of Fig. 5).
- the example method depicted in Fig. 6 walks all the stack frames (i.e., the frames associated with currently active threads) from the stack top to the stack bottom. More specifically, the example method depicted in Fig.
- the function "compensate_lock_unlock()" may be used to perform a lock operation to maintain a proper lock sequence. Additionally, this function also ensures that the proper unlock sequence is executed. For example, in the case where the code being processed by the JIT compiler 114 is Java-based, the lock and unlock operations must be paired correctly to carry out a synchronized method. In particular, there are two places where unlocking objects must be executed, upon exit of a synchronized method and during destructive unwinding of a synchronized method during exception handling. [0039] The example method depicted in Fig. 6 enables the JIT compiler 114 to compensate only those portions of code that are affected by the newly added class and leaves those portions of code that are unaffected by the newly loaded class alone.
- Figs. 8 and 9 depict an example manner in which the compensate_lock_unlock method shown in the example pseudo code of Fig. 6 may be performed.
- the compensate_lock_unlock function enables the JIT compiler 114 to redirect or "hijack" the return address at the bottom of a stack frame associated with an unsynchronized method currently being executed to stub code that executes a proper unlock operation.
- the JIT compiler 114 identifies the location of the return address of an unsynchronized method "foo"' for which an unlock operation needs to be performed.
- the JIT compiler 114 replaces the return address in the stack frame of the unsynchronized method foo' with the address of the stub code.
- the pseudo code shown in Fig. 10 includes the cookie COMP_UNLOCK_TAG, which indicates that the code adjacent to this tag is the compensation unlock stub code.
- the real return address and the COMP_UNLOCK_TAG are bundled together immediately prior to the stub code.
- the JIT compiler 114 checks if the word adjacent to it is the cookie COMP_UNLOCK_TAG. If the cookie is found, the JIT complier 114 returns the real return address, which immediately precedes the cookie.
- the cookie COMP_UNLOCK_TAG is defined to be an illegal code sequence so that the JIT compiler 114 does not confuse the cookie with compiled code.
- the JIT compiler 114 compensates for the missing unlock operation by identifying the currently active stack frame via the COMP_UNLOCK_TAG cookie as described in connection with Fig. 10 above, extracting the real object reference from the handle address contained in the stub code and performing the unlock operation on the object.
- Fig. 11 is a block diagram of an example processor system 1120 that may be used to implement the apparatus and methods described herein.
- the methods described herein may be implemented as instructions stored on a memory and executed by a processor coupled to the memory.
- the processor system 1120 includes a processor 1122 that is coupled to an interconnection bus or network 1124.
- the processor 1122 may be any suitable processor, processing unit or microprocessor such as, for example, a processor from the Intel Itanium ® family, Intel X-Scale ® family, the Intel Pentium ® family, etc.
- the system 1120 may be a multiprocessor system and, thus, may include one or more additional processors that are identical or similar to the processor 1122 and which are coupled to the interconnection bus or network 1124.
- the processor 1122 of Fig. 11 is coupled to a chipset 1128, which includes a memory controller 1130 and an input/output (I/O) controller 1132.
- a chipset typically provides I/O and memory management functions as well as a plurality of general purpose and/or special purpose registers, timers, etc. that are accessible or used by one or more processors coupled to the chipset.
- the memory controller 1130 performs functions that enable the processor 1122 (or processors if there are multiple processors) to access a system memory 1134, which may include any desired type of volatile memory such as, for example, static random access memory (SRAM), dynamic random access memory (DRAM), etc.
- SRAM static random access memory
- DRAM dynamic random access memory
- the I/O controller 1132 performs functions that enable the processor 1122 to communicate with peripheral input/output (I/O) devices 1136 and 1138 via an I/O bus 1140.
- the I/O devices 1136 and 1138 may be any desired type of I/O device such as, for example, a keyboard, a video display or monitor, a mouse, etc. While the memory controller 1130 and the I/O controller 1132 are depicted in Fig. 11 as separate functional blocks within the chipset 1128, the functions performed by these blocks may be integrated within a single semiconductor circuit or may be implemented using two or more separate integrated circuits.
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- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
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Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE602004006253T DE602004006253T2 (en) | 2003-05-20 | 2004-03-19 | DEVICES AND METHODS OF RESTORING SYNCHRONIZATION FOR OBJECT-ORIENTED SOFTWARE APPLICATIONS IN MANAGED TIME ENVIRONMENTS |
EP04785453A EP1625497B1 (en) | 2003-05-20 | 2004-03-19 | Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime enviroments |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/441,357 | 2003-05-20 | ||
US10/441,357 US7603663B2 (en) | 2003-05-20 | 2003-05-20 | Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime environments |
Publications (2)
Publication Number | Publication Date |
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WO2004104823A2 true WO2004104823A2 (en) | 2004-12-02 |
WO2004104823A3 WO2004104823A3 (en) | 2005-01-27 |
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Family Applications (1)
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PCT/US2004/008589 WO2004104823A2 (en) | 2003-05-20 | 2004-03-19 | Apparatus and methods for restoring synchronization to object-oriented software applications in managed runtime enviroments |
Country Status (6)
Country | Link |
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US (1) | US7603663B2 (en) |
EP (1) | EP1625497B1 (en) |
CN (1) | CN100414503C (en) |
AT (1) | ATE361494T1 (en) |
DE (1) | DE602004006253T2 (en) |
WO (1) | WO2004104823A2 (en) |
Families Citing this family (26)
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US7395382B1 (en) * | 2004-08-10 | 2008-07-01 | Sun Microsystems, Inc. | Hybrid software/hardware transactional memory |
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US8108844B2 (en) * | 2006-06-20 | 2012-01-31 | Google Inc. | Systems and methods for dynamically choosing a processing element for a compute kernel |
US8146066B2 (en) | 2006-06-20 | 2012-03-27 | Google Inc. | Systems and methods for caching compute kernels for an application running on a parallel-processing computer system |
US8381202B2 (en) * | 2006-06-20 | 2013-02-19 | Google Inc. | Runtime system for executing an application in a parallel-processing computer system |
US8261270B2 (en) | 2006-06-20 | 2012-09-04 | Google Inc. | Systems and methods for generating reference results using a parallel-processing computer system |
US8375368B2 (en) * | 2006-06-20 | 2013-02-12 | Google Inc. | Systems and methods for profiling an application running on a parallel-processing computer system |
US8443348B2 (en) * | 2006-06-20 | 2013-05-14 | Google Inc. | Application program interface of a parallel-processing computer system that supports multiple programming languages |
US8136102B2 (en) * | 2006-06-20 | 2012-03-13 | Google Inc. | Systems and methods for compiling an application for a parallel-processing computer system |
US7814486B2 (en) * | 2006-06-20 | 2010-10-12 | Google Inc. | Multi-thread runtime system |
US8024708B2 (en) * | 2006-06-20 | 2011-09-20 | Google Inc. | Systems and methods for debugging an application running on a parallel-processing computer system |
US8136104B2 (en) | 2006-06-20 | 2012-03-13 | Google Inc. | Systems and methods for determining compute kernels for an application in a parallel-processing computer system |
US7908259B2 (en) * | 2006-08-25 | 2011-03-15 | Teradata Us, Inc. | Hardware accelerated reconfigurable processor for accelerating database operations and queries |
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US8438554B1 (en) * | 2008-12-11 | 2013-05-07 | Nvidia Corporation | System, method, and computer program product for removing a synchronization statement |
US8849780B2 (en) * | 2009-11-02 | 2014-09-30 | Sap Ag | System and method for automation of consistent lock management |
US8972994B2 (en) * | 2009-12-23 | 2015-03-03 | Intel Corporation | Method and apparatus to bypass object lock by speculative execution of generated bypass code shell based on bypass failure threshold in managed runtime environment |
US8789026B2 (en) * | 2011-08-02 | 2014-07-22 | International Business Machines Corporation | Technique for compiling and running high-level programs on heterogeneous computers |
US8694961B2 (en) | 2012-04-03 | 2014-04-08 | Microsoft Corporation | Thread-agile execution of dynamic programming language programs |
JP5630671B2 (en) * | 2012-09-18 | 2014-11-26 | 横河電機株式会社 | Fault tolerant system |
JP5660097B2 (en) * | 2012-09-18 | 2015-01-28 | 横河電機株式会社 | Fault tolerant system |
CN109117277B (en) * | 2017-06-23 | 2020-11-27 | 上海木鸡网络科技有限公司 | Method and device for simulating synchronous blocking in asynchronous environment, storage medium, server and terminal |
CN107391381A (en) * | 2017-07-31 | 2017-11-24 | 东南大学 | A kind of concurrent program method of testing and its test system that strategy is split based on lock object |
CN113238800B (en) * | 2021-05-25 | 2022-06-28 | 上海安路信息科技股份有限公司 | Stack frame structure and function calling method and system |
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GB9825102D0 (en) * | 1998-11-16 | 1999-01-13 | Insignia Solutions Plc | Computer system |
US6671707B1 (en) * | 1999-10-19 | 2003-12-30 | Intel Corporation | Method for practical concurrent copying garbage collection offering minimal thread block times |
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2003
- 2003-05-20 US US10/441,357 patent/US7603663B2/en not_active Expired - Fee Related
-
2004
- 2004-03-19 AT AT04785453T patent/ATE361494T1/en not_active IP Right Cessation
- 2004-03-19 WO PCT/US2004/008589 patent/WO2004104823A2/en active IP Right Grant
- 2004-03-19 CN CNB2004800139894A patent/CN100414503C/en not_active Expired - Fee Related
- 2004-03-19 DE DE602004006253T patent/DE602004006253T2/en not_active Expired - Lifetime
- 2004-03-19 EP EP04785453A patent/EP1625497B1/en not_active Expired - Lifetime
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Also Published As
Publication number | Publication date |
---|---|
DE602004006253T2 (en) | 2008-01-10 |
US7603663B2 (en) | 2009-10-13 |
ATE361494T1 (en) | 2007-05-15 |
WO2004104823A3 (en) | 2005-01-27 |
EP1625497A2 (en) | 2006-02-15 |
EP1625497B1 (en) | 2007-05-02 |
CN1791860A (en) | 2006-06-21 |
CN100414503C (en) | 2008-08-27 |
DE602004006253D1 (en) | 2007-06-14 |
US20040237073A1 (en) | 2004-11-25 |
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