WO2004086509A1 - Electronic device comprising a percolated structure film - Google Patents

Electronic device comprising a percolated structure film Download PDF

Info

Publication number
WO2004086509A1
WO2004086509A1 PCT/IB2003/006370 IB0306370W WO2004086509A1 WO 2004086509 A1 WO2004086509 A1 WO 2004086509A1 IB 0306370 W IB0306370 W IB 0306370W WO 2004086509 A1 WO2004086509 A1 WO 2004086509A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
percolated
layer
drain
source
Prior art date
Application number
PCT/IB2003/006370
Other languages
French (fr)
Inventor
Nello Li Pira
Piero Perlo
Piermario Repetto
Mauro Brignone
Rossella Monferino
Daniele Pullini
Vito Lambertini
Original Assignee
C.R.F. Società Consortile Per Azioni
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by C.R.F. Società Consortile Per Azioni filed Critical C.R.F. Società Consortile Per Azioni
Priority to AU2003288478A priority Critical patent/AU2003288478A1/en
Publication of WO2004086509A1 publication Critical patent/WO2004086509A1/en

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/7613—Single electron transistors; Coulomb blockade devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N99/00—Subject matter not provided for in other groups of this subclass
    • H10N99/05—Devices based on quantum mechanical effects, e.g. quantum interference devices or metal single-electron transistors

Definitions

  • the present invention relates to an electronic de- vice comprising a first electrode and a second electrode in electric contact through a conductive channel, the two electrodes being designed to apply a voltage to said conductive channel, the latter comprising a percolated structure film made of a metal or semiconductor material.
  • said percolated structures When in the form of thin films, said percolated structures have properties of electron transport differing from the properties that would occur for a massive structure, and in particular a type of transport that can be related to conduction by percolation.
  • Said percolated structure films can also be laid by means of different deposition techniques, such as thermal evaporation, electron beam, sputtering, cluster beam deposition (PMC-Pulsed Microplasma Cluster) onto substrates made of glass, silicon with ⁇ 100> orientation or other dielectric, and can be made of a metal, dielectric or semiconductor material.
  • deposition techniques such as thermal evaporation, electron beam, sputtering, cluster beam deposition (PMC-Pulsed Microplasma Cluster) onto substrates made of glass, silicon with ⁇ 100> orientation or other dielectric, and can be made of a metal, dielectric or semiconductor material.
  • Percolation level is defined as the point at which, during the deposition process, the material shifts from an insulating to a conductive behavior. This occurs since during the deposition process metal clusters are built, which grow and aggregate by thermal stirring and Coulomb attraction, thus forming an irregular structure consisting of conductive nanowires. Going on with deposition, a continuous film with metal properties is obtained. Thicknesses that are concerned by percolation effect are between 2 and 10 nanometers, depending on substrate temperature, deposition parameters and selected metal, which can be in case of metals copper, silver, gold or aluminum.
  • the preparation of metal films at percolation level can also occur by cluster deposition: in particular through PMCS sources ("Pulsed Microplasma Cluster Source”) metal/semiconductor matrixes consisting of a regular or chaotic cluster distribution are obtained.
  • PMCS sources Pulsed Microplasma Cluster Source
  • Said technique generates clusters by condensing, within a vacuum chamber known as pre-expansion chamber, vapors of atoms previously "stripped” off through a plasma pulse from a target; said clusters are then accelerated by means of a nozzle with ultrasonic acceleration, and then deposited onto glass or quartz substrates within a deposition chamber.
  • Electron mobility and therefore electric conductance within the material differ from a normal metal conduction. Indeed, the resistance of a percolated structure depends on the behavior of the network of
  • conductive nanowires which behave like electron waveguides and form a bi-dimensional set of nanometric channels or nanoelectrodes through which electrons can stream.
  • the structure looks like a fractal system in which local distances between said nanoelectrodes are of a few angstroms.
  • the application of a voltage through planar electrodes onto a percolated structure film results in an electric field with local values of 10 6 -10 7 V/cm, which is sufficient to induce electron tunneling phenomena between the metal nanoelectrodes separated by dielectric islands.
  • a metal In a metal the behavior of electrons is the same as in a gas in which charges can freely move within en- ergy bands. If the system is spatially limited, electrons are arranged on energy levels and charge exchange takes place in a discrete way.
  • the conductance of a percolated layer is proportional above all to quantum conductance, i.e. G 0 , since said film has conductive nanowires in which electron motion is limited.
  • Said conductance is further proportional to the width of the percolated layer subtended by the electrodes, and to the ratio of a characteristic length Lc to a distance between measuring electrodes d.
  • the characteristic length Lc is the length representing the distance between two electrodes locally concerned by the tunneling phenomenon. Said characteristic length Lc is obtained experimentally and depends on material, deposition method and substrate type.
  • said conductance has a strong non-linearity for given values of applied voltage. See Figure 1, where VA refers to applied voltage and G to the conductance of the percolated film.
  • the electronic device comprises a first electrode and a second electrode in electric contact through a conductive channel, the two electrodes being designed to apply a voltage to the conductive channel, the latter comprising a percolated structure film made of a metal or semiconductor material, said device including a further electrode, known as gate electrode, designed to apply a field within the structure consisting of the percolated film.
  • - Figure 2 is a schematic sectioned view of a first embodiment of an electronic device according to the invention
  • - Figure 3 is a schematic plan view of a second embodiment of the electronic device according to the invention.
  • Figure 2 shows an electronic device according to the invention, which has a vertical structure.
  • Said electronic device is basically a transistor and comprises a silicon substrate 11, onto which a thin silicon oxide layer 12 is laid, deposited by evaporation or oxidation of the substrate 11. Onto said silicon oxide layer 11 a percolated film 13 is laid. The percolated film 13 is laid in the area between two metal electrodes, a drain electrode 14 and a source electrode 15, thus basically carrying out the channel of the electronic device 10.
  • a dielectric layer 16 is deposited above the percolated film 13, so as to insulate the latter and prevent a short circuit. Above the dielectric layer 16 a gate electrode 17 is laid.
  • a voltage VDS is applied between the drain elec- trode 14 and the source electrode 15, whereas a gate voltage VG is applied to the gate electrode 17.
  • the invention exploits charge transfer occurring in the percolated metal film.
  • C being cluster capacity, higher than thermal energy kT, k being Boltzmann constant and T temperature
  • the electron can charge the cluster.
  • Cluster charge opposed by Coulomb repulsion of electrons already in the cluster known as Quantum Coulomb Blockade, enables charge transition through the system.
  • Charge migration between the two electrodes VD and VS is allowed by gate voltage VG, which balances electron repulsion and "pumps" electrons through the chain into the percolated structure.
  • the structure can be described as a chain of n clusters within the percolated film, connected to one another through tunnel junctions: the convenient variation of VG with respect to V enables cyclically an electron to be pumped and to migrate through conductive islands.
  • a voltage VDS builds up between drain electrode 14 and source electrode 15, which voltage results in an electron stream depending on the conduc- tance of the percolated film 13.
  • Voltage-current characteristic has a non-linearity, i.e. an abrupt transition, due to the transition controlled by the electronic device 10 according to the invention by applying a suitable gate voltage VG.
  • Gate voltage VG acts as switch and enables electron cascade transport from cluster to cluster within the percolated film 13.
  • the charge status of the clusters belonging to the percolated film 13 is used as transistor leading voltage.
  • the electronic device 10 can have the drain 14 and source 15 electrode spaced only of few nanometers, so as to be electrically con- nected to one another also by means of only one cluster of the percolated film 13.
  • the gate electrode 17 is deposited above said cluster of the percolated film 13.
  • Figure 3 shows a plan view of a second embodiment of the electronic device according to the invention, globally referred to with number 20, which basically carries out a transistor having a horizontal or planar structure.
  • the electronic device 20 comprises a percolated film 23 deposited within an area lying between four metal electrodes coupled two by two on two orthogonal axes: a pair of gate electrodes 27, to which gate voltage VG is applied, and a pair including a drain electrode 24 and a source electrode 25, to which drain- source voltage VDS is applied.
  • the percolated film 23 is laid onto a dielectric substrate 21, in particular glass or quartz.
  • the electronic device according to the • invention allows to efficiently exploit conductance non-linearity of percolated films, thanks to a transistor structure, by varying gate voltage, so as to balance Quantum Electron Blockade phenomenon.
  • the structure of the electronic device according to the invention can be carried out on few or even on only one cluster of the percolated film, so that said structure has almost an infinite number of nanoelectrodes, which confer a high potentiality and functionality to the electronic device according to the invention.
  • the percolated film can be a material consisting of metal clusters made of copper, silver, gold or aluminum. It can also comprise nanowires made of a semiconductor material, such as nanowires of SiGe on Si ⁇ 100>, or semiconductor nanocrystals aggregated in an organic matrix.
  • the arrangement of the nanoelectrodes on the surface of the percolated film can be a complex network of disordered nanoelectrodes.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

Electronic device (10) comprising a source electrode (14) and a drain electrode in electric contact with a conductive channel (13) above which a gate electrode (17) is arranged, in which the conductive channel (13) comprises a percolated structure film. The conductive channel (13) comprises one or more conductive clusters of the percolated structure film. The electronic device (10) can have a vertical or horizontal structure.

Description

"Electronic device comprising a percolated structured film"
The present invention relates to an electronic de- vice comprising a first electrode and a second electrode in electric contact through a conductive channel, the two electrodes being designed to apply a voltage to said conductive channel, the latter comprising a percolated structure film made of a metal or semiconductor material.
Systems consisting of a chaotic distribution of dielectric and metal are known as discontinuous or percolated structures.
When in the form of thin films, said percolated structures have properties of electron transport differing from the properties that would occur for a massive structure, and in particular a type of transport that can be related to conduction by percolation.
Said percolated structure films can also be laid by means of different deposition techniques, such as thermal evaporation, electron beam, sputtering, cluster beam deposition (PMC-Pulsed Microplasma Cluster) onto substrates made of glass, silicon with <100> orientation or other dielectric, and can be made of a metal, dielectric or semiconductor material.
Percolation level is defined as the point at which, during the deposition process, the material shifts from an insulating to a conductive behavior. This occurs since during the deposition process metal clusters are built, which grow and aggregate by thermal stirring and Coulomb attraction, thus forming an irregular structure consisting of conductive nanowires. Going on with deposition, a continuous film with metal properties is obtained. Thicknesses that are concerned by percolation effect are between 2 and 10 nanometers, depending on substrate temperature, deposition parameters and selected metal, which can be in case of metals copper, silver, gold or aluminum.
The preparation of metal films at percolation level can also occur by cluster deposition: in particular through PMCS sources ("Pulsed Microplasma Cluster Source") metal/semiconductor matrixes consisting of a regular or chaotic cluster distribution are obtained. Said technique generates clusters by condensing, within a vacuum chamber known as pre-expansion chamber, vapors of atoms previously "stripped" off through a plasma pulse from a target; said clusters are then accelerated by means of a nozzle with ultrasonic acceleration, and then deposited onto glass or quartz substrates within a deposition chamber. The simultaneous use within the deposition chamber of thermal evaporation, e-beam, sputtering or CVD techniques, enables to obtain 3D films and matrixes with inclusions of different clusters therein. Moreover, the application of convenient masks onto the substrate allows to deposit regular matrixes of clusters spaced according to the pitch of said mask.
Electron mobility and therefore electric conductance within the material differ from a normal metal conduction. Indeed, the resistance of a percolated structure depends on the behavior of the network of
• conductive nanowires, which behave like electron waveguides and form a bi-dimensional set of nanometric channels or nanoelectrodes through which electrons can stream. The structure looks like a fractal system in which local distances between said nanoelectrodes are of a few angstroms. The application of a voltage through planar electrodes onto a percolated structure film results in an electric field with local values of 106-107 V/cm, which is sufficient to induce electron tunneling phenomena between the metal nanoelectrodes separated by dielectric islands.
In a metal the behavior of electrons is the same as in a gas in which charges can freely move within en- ergy bands. If the system is spatially limited, electrons are arranged on energy levels and charge exchange takes place in a discrete way. The time for charging a metal cluster having a capacity C and a resistance R can be obtained from the charge/discharge time RC of the system τ = CR = C/G, where G is the conductance of the system corresponding to the inverse of resistance.
The energy associated to said time is obtained from δE - h/τ, from which the quantum conductance of the cluster is obtained, i.e. G0 = e2/2h . The conductance of a percolated layer is proportional above all to quantum conductance, i.e. G0, since said film has conductive nanowires in which electron motion is limited. Said conductance is further proportional to the width of the percolated layer subtended by the electrodes, and to the ratio of a characteristic length Lc to a distance between measuring electrodes d. The characteristic length Lc is the length representing the distance between two electrodes locally concerned by the tunneling phenomenon. Said characteristic length Lc is obtained experimentally and depends on material, deposition method and substrate type.
Depending on the voltage applied to said planar electrodes, said conductance has a strong non-linearity for given values of applied voltage. See Figure 1, where VA refers to applied voltage and G to the conductance of the percolated film.
Under the influence of a particular electric field charges can shift from a nanoelectrode to another one within the percolated film. If the absolute value of the charges in the system is above a critical value, a charge can cross the junction, i.e. the potential barrier that limits said charge. The energy difference between final and initial status determines the critical charge value . Conductance non-linearity looks interesting for use in devices performing a function of non-linear transfer; however, the small range of applied voltage in which non-linearity effect occurs makes its use difficult . The present invention aims at conceiving a solution that can easily exploit conductance non-linearity of percolated films in electronic devices.
According to the present invention said aim is achieved thanks to an electronic device having the characteristics specifically referred to in the appended claims .
As will be evident, in the preferred embodiment of the invention the electronic device comprises a first electrode and a second electrode in electric contact through a conductive channel, the two electrodes being designed to apply a voltage to the conductive channel, the latter comprising a percolated structure film made of a metal or semiconductor material, said device including a further electrode, known as gate electrode, designed to apply a field within the structure consisting of the percolated film.
The invention will now be described with reference to the accompanying drawings, given by mere way of non- limiting example, in which: - Figure 1 is a chart of physical properties of a material used in the electronic device according to the invention;
- Figure 2 is a schematic sectioned view of a first embodiment of an electronic device according to the invention; - Figure 3 is a schematic plan view of a second embodiment of the electronic device according to the invention.
Figure 2 shows an electronic device according to the invention, which has a vertical structure.
Said electronic device, referred to with number 10, is basically a transistor and comprises a silicon substrate 11, onto which a thin silicon oxide layer 12 is laid, deposited by evaporation or oxidation of the substrate 11. Onto said silicon oxide layer 11 a percolated film 13 is laid. The percolated film 13 is laid in the area between two metal electrodes, a drain electrode 14 and a source electrode 15, thus basically carrying out the channel of the electronic device 10. A dielectric layer 16 is deposited above the percolated film 13, so as to insulate the latter and prevent a short circuit. Above the dielectric layer 16 a gate electrode 17 is laid.
A voltage VDS is applied between the drain elec- trode 14 and the source electrode 15, whereas a gate voltage VG is applied to the gate electrode 17.
The invention exploits charge transfer occurring in the percolated metal film. For energy values of the elementary charge e of e2/C, C being cluster capacity, higher than thermal energy kT, k being Boltzmann constant and T temperature, the electron can charge the cluster. Cluster charge opposed by Coulomb repulsion of electrons already in the cluster, known as Quantum Coulomb Blockade, enables charge transition through the system. Charge migration between the two electrodes VD and VS is allowed by gate voltage VG, which balances electron repulsion and "pumps" electrons through the chain into the percolated structure. Thus, conductance oscillates depending on gate voltage VG. If simplified, the structure can be described as a chain of n clusters within the percolated film, connected to one another through tunnel junctions: the convenient variation of VG with respect to V enables cyclically an electron to be pumped and to migrate through conductive islands. Charge transfer through tunnel junctions within the percolated film depends on the cyclical variation of applied VG and is therefore a phenomenon regulated by a frequency f. Associated transferred current depends on said frequency and is I = ef.
In other words, in the electronic device according to the invention a voltage VDS builds up between drain electrode 14 and source electrode 15, which voltage results in an electron stream depending on the conduc- tance of the percolated film 13. Voltage-current characteristic has a non-linearity, i.e. an abrupt transition, due to the transition controlled by the electronic device 10 according to the invention by applying a suitable gate voltage VG. Gate voltage VG acts as switch and enables electron cascade transport from cluster to cluster within the percolated film 13. Finally, the charge status of the clusters belonging to the percolated film 13 is used as transistor leading voltage. Since the typical size of the clusters belonging to the percolated film 13, for instance gold on silicon, is of 10 to 50 nanometers, the electronic device 10 can have the drain 14 and source 15 electrode spaced only of few nanometers, so as to be electrically con- nected to one another also by means of only one cluster of the percolated film 13. The gate electrode 17 is deposited above said cluster of the percolated film 13.
Therefore, as is quite evident, it is possible to deposit onto a percolated film rows, matrixes and dis- ordered groups of transistor devices 10, each acting on few or even only one metal or semiconductor cluster belonging to the percolated film 13.
Figure 3 shows a plan view of a second embodiment of the electronic device according to the invention, globally referred to with number 20, which basically carries out a transistor having a horizontal or planar structure.
The electronic device 20 comprises a percolated film 23 deposited within an area lying between four metal electrodes coupled two by two on two orthogonal axes: a pair of gate electrodes 27, to which gate voltage VG is applied, and a pair including a drain electrode 24 and a source electrode 25, to which drain- source voltage VDS is applied. The percolated film 23 is laid onto a dielectric substrate 21, in particular glass or quartz.
The solution described above enables to obtain great advantages with respect to known solutions.
The electronic device according to the • invention allows to efficiently exploit conductance non-linearity of percolated films, thanks to a transistor structure, by varying gate voltage, so as to balance Quantum Electron Blockade phenomenon.
Advantageously, the structure of the electronic device according to the invention can be carried out on few or even on only one cluster of the percolated film, so that said structure has almost an infinite number of nanoelectrodes, which confer a high potentiality and functionality to the electronic device according to the invention.
Obviously, though the basic idea of the invention remains the same, construction details and embodiments can widely vary with respect to what has been described and shown by mere way of example, however without leav- ing the framework of the present invention. The percolated film can be a material consisting of metal clusters made of copper, silver, gold or aluminum. It can also comprise nanowires made of a semiconductor material, such as nanowires of SiGe on Si<100>, or semiconductor nanocrystals aggregated in an organic matrix.
The arrangement of the nanoelectrodes on the surface of the percolated film can be a complex network of disordered nanoelectrodes.

Claims

1. Electronic device comprising a first electrode (14; 24) and a second electrode (15; 25) in electric contact with a conductive channel (13; 23), said first and second electrode (14, 24; 15, 25) being designed to apply a first voltage (VDS) to said conductive channel (13; 23), the latter comprising a percolated layer, characterized in that said conductive channel (13; 23) is further in electric contact with a gate electrode (17; 27) designed to apply a second voltage (VG) to said conductive channel (13; 23).
2. Device according to claim 1, characterized in that said percolated layer is a metal-dielectric, metal-semiconductor or semiconductor-dielectric layer.
3. Device according to claim 1, characterized in that said first electrode (14; 24) and said second electrode (15; 25) are a drain electrode and a source electrode, respectively, and build together with said gate electrode (17; 27) and with said conductive channel (13; 23) a transistor structure.
4. Device according to claim 3, characterized in that said percolated layer (13; 23) comprises conductive clusters and in that drain (14; 24), source (15; 25) and gate (17; 27) electrodes are in electric contact with one or more of said conductive clusters.
5. Device according to claim 4, characterized in that drain (14; 24), source (15; 25) and gate (17; 27) electrodes are in electric contact with only one of said conductive clusters.
6. Device according to claim 4 or 5, characterized in that said percolated layer (13; 23) is deposited onto a dielectric layer (11, 12; 20, 21).
7. Device according to claim 6, characterized in that it has a vertical structure comprising a first di- electric substrate layer (11) , a second dielectric layer (12) onto which the source electrode (15) and the drain electrode (14) are laid, a percolated layer (13) deposited within an area identified by said source electrode (15) and drain electrode (14) , an insulating dielectric layer (16) laid above said drain (14) and source (15) electrodes, and a gate electrode (17) laid in the area of the percolated layer (13) .
8. Device according to claim 6, characterized in that it has a horizontal structure comprising a dielectric substrate layer (21) onto which the source (24) electrode and the drain (25) electrode are laid spaced on a first axis and two gate electrodes (27) are laid spaced on a second axis substantially perpendicular to the first one, a percolated layer (23) deposited within an area identified by said source electrode (24) , drain electrode (25) and gate electrodes (27) .
9. Device according to one or more preceding claims, characterized in that said percolated layer comprises clusters made of a metal selected from the group comprising copper, silver, gold, aluminum.
10. Device according to one or more preceding claims, characterized in that said percolated layer comprises clusters made of a semiconductor material, in particular Si, Ge, Gaas .
PCT/IB2003/006370 2003-03-25 2003-12-23 Electronic device comprising a percolated structure film WO2004086509A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003288478A AU2003288478A1 (en) 2003-03-25 2003-12-23 Electronic device comprising a percolated structure film

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
ITTO2003A000217 2003-03-25
IT000217A ITTO20030217A1 (en) 2003-03-25 2003-03-25 ELECTRONIC DEVICE INCLUDING A STRUCTURE FILM

Publications (1)

Publication Number Publication Date
WO2004086509A1 true WO2004086509A1 (en) 2004-10-07

Family

ID=33042718

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2003/006370 WO2004086509A1 (en) 2003-03-25 2003-12-23 Electronic device comprising a percolated structure film

Country Status (3)

Country Link
AU (1) AU2003288478A1 (en)
IT (1) ITTO20030217A1 (en)
WO (1) WO2004086509A1 (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0750353A2 (en) * 1995-06-23 1996-12-27 Matsushita Electric Industrial Co., Ltd. Single electron tunnel device and method for fabricating the same
EP0836232A1 (en) * 1996-03-26 1998-04-15 Samsung Electronics Co., Ltd. Tunnelling device and method of producing a tunnelling device
WO1998050958A1 (en) * 1997-05-05 1998-11-12 Commissariat A L'energie Atomique Device based on quantic islands and method for making same
US20020088969A1 (en) * 2000-03-10 2002-07-11 Lee Jo-Won Single electron transistor using porous silicon and manufacturing method thereof
EP1229590A1 (en) * 2001-01-31 2002-08-07 Japan Science and Technology Corporation Correlated charge transfer device and a method of fabricating a correlated charge transfer device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0750353A2 (en) * 1995-06-23 1996-12-27 Matsushita Electric Industrial Co., Ltd. Single electron tunnel device and method for fabricating the same
EP0836232A1 (en) * 1996-03-26 1998-04-15 Samsung Electronics Co., Ltd. Tunnelling device and method of producing a tunnelling device
WO1998050958A1 (en) * 1997-05-05 1998-11-12 Commissariat A L'energie Atomique Device based on quantic islands and method for making same
US20020088969A1 (en) * 2000-03-10 2002-07-11 Lee Jo-Won Single electron transistor using porous silicon and manufacturing method thereof
EP1229590A1 (en) * 2001-01-31 2002-08-07 Japan Science and Technology Corporation Correlated charge transfer device and a method of fabricating a correlated charge transfer device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
MATSUMOTO K ET AL: "SIDE GATE SINGLE ELECTRON TRANSISTOR WITH MULTI-ISLANDS STRUCTURE OPERATED AT ROOM TEMPERATURE MADE BY STM/AFM NANO-OXIDATION PROCESS", EXTENDED ABSTRACTS OF THE INTERNATIONAL CONFERENCE ON SOLID STATE DEVICES AND MATERIALS, JAPAN SOCIETY OF APPLIED PHYSICS. TOKYO, JA, vol. CONF. 1996, 1996, pages 433 - 435, XP000694063 *

Also Published As

Publication number Publication date
ITTO20030217A1 (en) 2004-09-26
AU2003288478A1 (en) 2004-10-18

Similar Documents

Publication Publication Date Title
Guerrera et al. Nanofabrication of arrays of silicon field emitters with vertical silicon nanowire current limiters and self-aligned gates
EP1159761B1 (en) Electronic nanostructure device
Avila et al. Switching in coplanar amorphous hydrogenated silicon devices
Tang et al. Memory Effect and Negative Differential Resistance by Electrode‐Induced Two‐Dimensional Single‐Electron Tunneling in Molecular and Organic Electronic Devices
Lee et al. Room-temperature tunneling behavior of boron nitride nanotubes functionalized with gold quantum dots
Zhitenev et al. Single-and Multigrain Nanojunctions with a Self-Assembled Monolayer<? format?> of Conjugated Molecules
Kastner et al. Conductance fluctuations near the localized-to-extended transition in narrow Si metal-oxide-semiconductor field-effect transistors
Tilke et al. Single-electron tunneling in highly doped silicon nanowires in a dual-gate configuration
JP2001524266A (en) Device and manufacturing method based on quantum islands
US9508760B2 (en) Method for making thin film transistor array
US20040089882A1 (en) Electronic device having controllable conductance
Tamura et al. Switching property of atomic switch controlled by solid electrochemical reaction
Chen et al. Fabrication and physics of 2 nm islands for single electron devices
Chen et al. A double quantum dot defined by top gates in a single crystalline InSb nanosheet
Riederer et al. Alternatives for Doping in Nanoscale Field‐Effect Transistors
Kozicki et al. Nanoscale effects in devices based on chalcogenide solid solutions
US20210151669A1 (en) Three-terminal oxygen intercalation neuromorphic devices
Zhitenev et al. Gated molecular devices using self-assembled monolayers
JP3560630B2 (en) Single electronic device
JP3852963B2 (en) Microelectronic devices
Choi et al. Effects of moisture barriers on resistive switching in Pt-dispersed SiO 2 nanometallic thin films
WO2004086509A1 (en) Electronic device comprising a percolated structure film
Morris Recent developments in discontinuous metal thin films
US9577105B2 (en) Thin film transistor and thin film transistor array with semiconductor fragments
JPH0878669A (en) Semiconductor device and manufacture of semiconductor device

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP