WO2004070496A3 - Schaltung mit schutz vor manipulativen angriffen und verfahren - Google Patents

Schaltung mit schutz vor manipulativen angriffen und verfahren Download PDF

Info

Publication number
WO2004070496A3
WO2004070496A3 PCT/EP2004/000519 EP2004000519W WO2004070496A3 WO 2004070496 A3 WO2004070496 A3 WO 2004070496A3 EP 2004000519 W EP2004000519 W EP 2004000519W WO 2004070496 A3 WO2004070496 A3 WO 2004070496A3
Authority
WO
WIPO (PCT)
Prior art keywords
operation unit
state
circuit
carrying
protection against
Prior art date
Application number
PCT/EP2004/000519
Other languages
English (en)
French (fr)
Other versions
WO2004070496A2 (de
Inventor
Joerg Schepers
Original Assignee
Infineon Technologies Ag
Joerg Schepers
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag, Joerg Schepers filed Critical Infineon Technologies Ag
Publication of WO2004070496A2 publication Critical patent/WO2004070496A2/de
Publication of WO2004070496A3 publication Critical patent/WO2004070496A3/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/30—Public key, i.e. encryption algorithm being computationally infeasible to invert or user's encryption keys not requiring secrecy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G06F21/755—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation with measures against power attack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/77—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information in smart cards
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Security & Cryptography (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Storage Device Security (AREA)
  • Electrotherapy Devices (AREA)

Abstract

Eine erfindungsgemässe Schaltung umfasst eine erste Operationseinheit (18) zum Durchführen einer Operation, wobei die erste Operationseinheit bei Durchführung der Operation ihren Zustand auf eine erste Weise verändert, eine zweite Operationseinheit (20) zum Durchführen der Operation, wobei die zweite Operationseinheit bei Durchführung der Operation ihren Zustand auf eine zweite Weise verändert, die sich von der ersten Weise unterscheidet, eine Überwachungseinrichtung (22) zum Untersuchen des Zustands der ersten Operationseinheit (18) und des Zustands der zweiten Operationseinheit (20) und zum Signalisieren eines Alarms, wenn der Zustand der ersten Operationseinheit und der Zustand der zweiten Operationseinheit nicht in einer vorbestimmten Beziehung zueinander stehen, und eine Einrichtung (24) zum Ergreifen einer Massnahme ansprechend auf eine Signalisierung des Alarms hin. Die Verbesserung besteht darin, dass manipulative Angriffe effektiver oder mit höherer Wahrscheinlichkeit erfasst werden können.
PCT/EP2004/000519 2003-02-06 2004-01-22 Schaltung mit schutz vor manipulativen angriffen und verfahren WO2004070496A2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10304900.2 2003-02-06
DE10304900A DE10304900A1 (de) 2003-02-06 2003-02-06 Schaltung mit Schutz vor manipulativen Angriffen und Verfahren

Publications (2)

Publication Number Publication Date
WO2004070496A2 WO2004070496A2 (de) 2004-08-19
WO2004070496A3 true WO2004070496A3 (de) 2004-11-04

Family

ID=32841608

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2004/000519 WO2004070496A2 (de) 2003-02-06 2004-01-22 Schaltung mit schutz vor manipulativen angriffen und verfahren

Country Status (2)

Country Link
DE (1) DE10304900A1 (de)
WO (1) WO2004070496A2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013227165A1 (de) * 2013-12-27 2015-07-16 Siemens Aktiengesellschaft Überwachungsvorrichtung zur Überwachung eines Schaltkreises

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5995628A (en) * 1997-04-07 1999-11-30 Motorola, Inc. Failsafe security system and method
DE19936918A1 (de) * 1998-09-30 2000-04-06 Philips Corp Intellectual Pty Verschlüsselungsverfahren zum Ausführen von kryptographischen Operationen
EP1115094A2 (de) * 2000-01-08 2001-07-11 Philips Corporate Intellectual Property GmbH Datenverarbeitungseinrichtung und Verfahren zu dessen Betrieb
DE10136335A1 (de) * 2001-07-26 2003-02-13 Infineon Technologies Ag Prozessor mit mehreren Rechenwerken

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5995628A (en) * 1997-04-07 1999-11-30 Motorola, Inc. Failsafe security system and method
DE19936918A1 (de) * 1998-09-30 2000-04-06 Philips Corp Intellectual Pty Verschlüsselungsverfahren zum Ausführen von kryptographischen Operationen
EP1115094A2 (de) * 2000-01-08 2001-07-11 Philips Corporate Intellectual Property GmbH Datenverarbeitungseinrichtung und Verfahren zu dessen Betrieb
DE10136335A1 (de) * 2001-07-26 2003-02-13 Infineon Technologies Ag Prozessor mit mehreren Rechenwerken

Also Published As

Publication number Publication date
DE10304900A1 (de) 2004-09-09
WO2004070496A2 (de) 2004-08-19

Similar Documents

Publication Publication Date Title
WO2004017389A3 (en) Method for performing real time arcing detection
EP1341139A3 (de) Eindringungserkennungs-Vorrichtung
WO2007005440A3 (en) Change event correlation
WO2007072157A3 (en) System and method for detecting network-based attacks on electronic devices
TW346568B (en) Testing and monitoring of programmed devices
CA2356038A1 (en) System and method for pushing information from a host system to a mobile data communication device
CA2389978A1 (en) System and method for pushing encrypted information between a host system and a mobile data communication device
WO2005031575A3 (en) Method and apparatus for monitoring and resetting a co-processor
WO2005114609A3 (en) Method and apparatus for triage of network alarms
EP1189185A3 (de) Vertrauenswürdiges System
WO2001052185A3 (de) Verfahren und vorrichtung zur überwachung wartungsintensiver austauschteile an einem aggregat
WO2006093733A3 (en) Methods and apparatus for monitoring electrical contacts
WO2004010252A3 (en) Indicator for communicating system status information
WO2003090050A3 (en) System and method for detecting malicicous code
WO2004089208A8 (en) Microwave based monitoring system and method
WO2005017724A3 (en) Event time-stamping
EP1758022A3 (de) Verfahren zur Detektion der funktionellen Unterbrechung aufgrund eines Einzelereignisses
WO2007047091A3 (en) Method and electronic device for selective transfer of data from removable memory element
AU2003240238A1 (en) Method and device for detection in the frequency range, based on a time range measurement
EP1533842A3 (de) Halbleiteranordnung mit Schutz gegenüber nicht autorisiertem Zugriff
CA2241088A1 (en) Event detection device with fault monitoring capability
WO2004104768A3 (en) Method and system for utilizing multiple sensors for monitoring container security, contents and condition
WO2004070496A3 (de) Schaltung mit schutz vor manipulativen angriffen und verfahren
WO2005057621A3 (en) Binary-coded, auto-addressing system and method
WO2004091330A3 (fr) Systeme de detection de l'etat des attaches d'une fermeture de vetement

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NA NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): BW GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase