WO2004040751A1 - Ensemble d'amplificateur - Google Patents

Ensemble d'amplificateur Download PDF

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Publication number
WO2004040751A1
WO2004040751A1 PCT/GB2003/004462 GB0304462W WO2004040751A1 WO 2004040751 A1 WO2004040751 A1 WO 2004040751A1 GB 0304462 W GB0304462 W GB 0304462W WO 2004040751 A1 WO2004040751 A1 WO 2004040751A1
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WO
WIPO (PCT)
Prior art keywords
amplifier
output
loop
modulated carrier
input
Prior art date
Application number
PCT/GB2003/004462
Other languages
English (en)
Inventor
Martin Neuhaus
Original Assignee
N & L Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by N & L Limited filed Critical N & L Limited
Priority to AU2003271959A priority Critical patent/AU2003271959A1/en
Publication of WO2004040751A1 publication Critical patent/WO2004040751A1/fr

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
    • H03F1/3247—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using feedback acting on predistortion circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2201/00—Indexing scheme relating to details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements covered by H03F1/00
    • H03F2201/32—Indexing scheme relating to modifications of amplifiers to reduce non-linear distortion
    • H03F2201/3221—Predistortion by overamplifying in a feedforward stage the distortion signal to have a combined main signal and "negative" distortion to form the predistorted signal for a further stage. so that after amplification in the further stage only the amplified main signal remains

Definitions

  • This invention relates to power amplifiers and in particular to a multi-carrier power amplifier system including pre-distortion and feed-forward to reduce intermodulation distortion and to a method of operating such an amplifier system.
  • high power amplifiers are operated in the vicinity of the saturation region.
  • the non-linearity of the amplifier will generate inter-modulation distortion.
  • UK Patent Application GB 2318938 A filed 13 May 1997, Samsung Electronics Co Limited describes an arrangement for linearizing an amplifier by a combination of two methods.
  • a pre- distorter supplies harmonics to the main amplifier in such a way as to counteract the distortion.
  • a feed-forward arrangement subtracts a signal derived from the input of the main amplifier from a signal derived from the output to produce a distortion signal which is then subtracted from the main amplifier output to remove remaining distortion.
  • UK Patent Application GB 2352570 A filed 28 July 1999, Wireless Systems International Limited describes a linearizing arrangement including a digital signal processor.
  • the digital signal processor implements a pre-distorter process which pre-distorts the input signal to the amplifier in such a manner as to counter distortion imposed by the amplifier.
  • Feedback from the amplifier output is sampled to provide a feedback signal for controlling the pre-distortion process.
  • a feedforward signal is combined with the amplifier output to further reduce distortion therein.
  • the feedforward signal is derived by subtracting the input signal from feedback from the amplifier output (which may contain residual distortion) .
  • an amplifier assembly including: (a) a pre-amplifier having an input receiving an input modulated carrier and an output feeding an amplifier; and (b) a first loop including a dynamically adjusted variable amplifier and a dynamically adjusted phase shifter in the output path of the first loop; wherein a portion of the input modulated carrier feeds into the first loop, and the first loop derives a distortion component from the output of the preamplifier and sums this distortion component with the modulated carrier output of the pre-amplifier before feeding the resultant summed signal to an input of the amplifier.
  • an amplifier assembly including:
  • a first loop including a dynamically adjusted variable amplifier and a dynamically adjusted phase shifter in the output path of the first loop, wherein a portion of the input modulated carrier feeds into the first loop, and the first loop derives a distortion component from the output of the pre- amplifier and sums this distortion component with the modulated carrier output of the pre-amplifier before feeding the resultant summed signal to an input of the amplifier;
  • a second loop including a dynamically adjusted variable amplifier and a dynamically adjusted phase shifter in the output path of the second loop; wherein the second loop derives a residual distortion component from the output of the amplifier and sums this residual distortion component with the input modulated carrier before feeding the resultant summed signal to an output of the amplifier assembly.
  • the system comprises two distinct loops.
  • the first loop is an arrangement and a method of pre-distorting the modulated carrier in order to compensate for the non-linearities present in the power amplifier.
  • the second loop is a feed-forward loop that compensates for the residual distortion present in the amplified modulated carrier after it has passed through the amplifier .
  • the first loop extracts the modulated carrier signal from the input feed to a pre-amplifier.
  • the output of the pre-amplifier will comprise both the amplified modulated carrier signal and a distortion component induced by the pre-amplifier.
  • This pre-amplifier output is also fed into the first loop and combined with the input modulated carrier.
  • Feedback in the first loop dynamically reverses the phase and amplitude of the modulated carrier element relative to the output of the pre-amplifier.
  • the resultant combined signal consisting primarily of the distortion component, is used as a pre-distortion signal and fed towards a power amplifier.
  • the pre-distortion signal is fed to the power amplifier through a variable amplifier and a phase shifter which are controlled on a feed-forward basis by the second loop, as described below .
  • the output of the power amplifier may still contain a small residual distortion component derived from the first loop.
  • the second loop extracts this output of the power amplifier and combines it with the original modulated carrier signal input to the pre-amplifier.
  • the resultant combined signal comprising primarily the residual distortion component, is fed through a variable amplifier and a phase shifter before recombination with the power amplifier output.
  • the aforementioned residual distortion component of the second loop is continuously measured or detected and controls the variable amplifiers and phase shifters in both the first and second loops on a feed-forward basis so as to optimise the distortion present in the pre-distortion signal and hence minimise the overall distortion present at the power amplifier output.
  • a particularly advantageous configuration of the amplifier assembly includes a third (control) loop summing a signal derived from the input modulated carrier with a signal derived from the amplifier output so as to minimise a distortion component of a resultant summed signal, wherein such summed signal dynamically controls each variable amplifier and phase shifter.
  • the control loop includes:
  • variable attenuator and control phase shifter in the respective input paths of the summing circuit; and such variable attenuator and control phase shifter are dynamically controlled by an output of the summing circuit.
  • Substantially equivalent signals control both the input paths of the third loop and the respective output paths of the first and second loops.
  • the complex modulated carrier contains both an amplitude and frequency component.
  • the amplitude component which might typically be 10 times greater than the average power level, presents itself as a function of the modulating data stream. This might typically be 1 data bit per million. This amplitude component will cause an increase in temperature of the amplifier's semiconductor junction. If the amplifier' s bias is such that it allows the amplifier to deliver this higher than normally-rated average output power, then the time it is able to do this before destruction occurs will be a function of the amplifier's maximum semiconductor junction temperature and specific heat capacity.
  • the output circuit of the amplifier is rated to operate without damage at the expected peak power levels.
  • peak power inherently exceeds the average power level.
  • peak signal values may be superimposed causing sum excursions with large peak- to-average values.
  • peak power is approximately ten times the average power level but the amplifier circuits will be operating only at the average power levels more than 99% of the time.
  • an amplifier wherein the bias is dynamically adjusted in accordance with a power component of a modulated carrier input to the amplifier.
  • an amplifier wherein an amplitude component of a modulated carrier input to the amplifier is integrated to generate a power level signal independently of amplification of the modulated carrier and the amplifier bias is dynamically adjusted in accordance with the power level signal.
  • the amplitude component is integrated as a function of time. This will vary the DC operating conditions of the amplifier transistor in order to optimise the transistor load-line characteristic and efficiency.
  • the amplifier bias is adjusted in accordance with a power function of the modulated carrier integrated over time. This has a statistical relationship to the probability of data being present and hence peak power.
  • the amplifier bias is adjusted in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier.
  • the bias is adjusted to maximise power output of the amplifier and, in particular, to optimise the power output and efficiency of the amplifier.
  • variable attenuator may be included in the modulated carrier input to the amplifier.
  • the modulated carrier is dynamically attenuated in accordance with a function of the specific heat capacity of the output portion of the amplifier and of the statistical probability of data occurrence in the modulated carrier input to the amplifier.
  • the modulated carrier input is attenuated when the duration of the amplifier power output exceeds a predetermined time limit that if exceeded would induce thermal damage to the amplifier.
  • the feedback and feed-forward parameters are adopted dynamically to maximise linearity of the overall output of the amplifier assembly and to maintain output power levels without excessive reductions in efficiency.
  • the variable attenuator will reduce the power presented to the amplifier should the duration of the power produced as a result of the modulated carrier exceed a predetermined time limit that would cause junction damage in the amplifier.
  • the dynamic bias adjustment functions to increase the supply voltage and base bias to the amplifier transistor when it is required to produce more output power. As the transistor is operating in a non linear mode, its output impedance (load-line characteristic) will vary according to signal level so at certain input power levels the transfer of power will be less efficient than at others. (For maximum power transfer the source impedance (transistor output) should equal the load impedance.)
  • the efficiency may be kept at a more constant level.
  • An amplifier assembly and its method of operating as described above are particularly useful in multichannel telecommunications networks, and especially for broadband and the so-called Third Generation (3G) networks.
  • broadband networks such as 3G operate in the range 2.14 GHz to 2.17 GHz with a channel bandwidth of 5 MHz.
  • Typical power output of the amplifier is around 10 W per channel.
  • Figure 1 is an overall amplifier assembly block diagram according to one aspect of the present invention .
  • Figure 2 is an overall block diagram of an amplifier assembly according to the present invention and incorporating a third (control) loop.
  • Figure 3 is a spectral distribution diagram of a modulated carrier as presented at the input to the amplifier system.
  • Figure 4 is a spectral distribution diagram of the output of the pre-amplifier stage.
  • Figure 5 is a spectral distribution diagram of the output of the summation circuit of the first loop.
  • Figure 6 is a spectral distribution diagram of the output of the first loop.
  • Figure 7 is a spectral distribution diagram of the modulated carrier as presented at the input to the amplifier stage.
  • Figure 8 is a spectral distribution diagram of the output of the summation circuit of the second loop.
  • Figure 9 is a spectral distribution diagram of the output of the second loop.
  • Figure 10 is a spectral distribution diagram of the modulated carrier at the output of the amplifier system shown in Figure 1.
  • Figure 11 is a spectral distribution diagram of the modulated carrier as presented at an input of the third loop summing circuit.
  • Figure 12 is a spectral distribution diagram of the modulated carrier at the output of the amplifier system shown in Figure 2.
  • Figure 13 is a block diagram showing the amplifier stage split into its constituent sub-blocks.
  • the system comprises an arrangement and a method for reducing the distortion component of a complex modulated carrier having been amplified by a nonlinear element.
  • Modulated carrier refers to a complex one, having both an amplitude and frequency component. This typically might be a QAM / CDMA type signal.
  • the system comprises two distinct loops.
  • the first loop is an arrangement and a method of pre-distorting the modulated carrier in order to compensate for the non-linearities present in amplifier 012, that is the non-linear response of the transfer function of amplifier 012.
  • the second loop is a feed-forward loop that compensates for the residual distortion present in the amplified modulated carrier after it has passed through amplifier 012.
  • the first loop comprises system components 001 to 011 and 021.
  • a modulated carrier is presented at the input to the amplifier system, as shown in Figure 3.
  • the modulated carrier is then split by coupler 001 and splitter 005 into three paths. Two of these three paths will be considered in the description of loopl .
  • the modulated carrier passes through coupler 001 and pre-amplifier 002.
  • the pre-amplifier 002 will naturally introduce a distortion component to the modulated carrier, as shown in Figure 4.
  • the majority of the modulated carrier then passes through coupler 003 before being presented to a summation circuit 004 on input port (a) .
  • the modulated carrier split at coupler 003 the minority of the modulated carrier passes through variable attenuator 008 where it is presented to input port (b) on summation circuit 007.
  • Circuits 003 and 008 may be considered to be linear, that is they introduce an insignificant level of distortion with respect to the non-linear elements under consideration.
  • the modulated carrier is split into two paths by coupler circuit 001, with the majority of the modulated carrier being presented to pre-amplifier 002 as described above, and the minority being further split by splitter circuit 005. From port (c) of splitter 005 the modulated carrier then passes through a variable phase shifter circuit 006 and is presented to input port (a) on summation circuit 007. The variable attenuator 008 and variable phase shifter 006 are then adjusted by receiver circuit 011 so that the magnitudes of the signals at input ports (a) and (b) of summation circuit 007 are equal, and the phases of the signals at ports (a) and (b) of summation circuit 007 are anti-phase.
  • the resultant summed signal at the output of summation circuit 007 port (c) contains as little of the original modulated carrier as receiver circuit 011 can adjust for, and thus comprises mainly the distortion component introduced by pre-amplifier 002, as shown in Figure
  • Circuits 001, 005, 006 and 007 may be considered to be linear.
  • the distortion component present at the output of summation circuit 007 port (c) is then adjusted in phase and amplitude on passing through phase shifter circuit 009 and variable amplifier circuit 010 by common receiving circuit 021. Operation of phase shifter circuit 009 and variable amplifier circuit 010 is described below with reference to the second loop and the resultant signal is shown in Figure 6.
  • the distortion component is then summed with the modulated carrier and distortion component on port (a) of summation circuit 004.
  • the result at port (c) is a modulated carrier with a distortion component of specific phase and amplitude as shown in Figure 7, which when passed through amplifier 012 will cancel the distortion component normally produced by amplifier 012 if amplifier 012 were presented with just the undistorted modulated carrier.
  • the modulated carrier will still contain a small distortion component that is a function of the efficiency or effectiveness of dynamic cancellation in loop 1.
  • the modulated carrier and the distortion component are split into two paths by coupling circuit 013. The majority of the signal is transmitted to coupling circuit 019 and the minority of the signal is transmitted to attenuator 014.
  • the modulated carrier and the distortion component are linearly reduced in amplitude on passing through variable attenuator circuit 014 and presented to input port (b) of summation circuit 016. Attenuator 014 reduces the signal so on arriving at port (b) of summation circuit 016 the signal has a magnitude equal to the signal appearing at port (a) of summation circuit
  • Input port (a) of summation circuit 016 also receives an undistorted modulated carrier from the input, via splitter 005 port (b) .
  • Splitter 005 splits the modulated carrier that is then passed through variable phase shifting circuit 015.
  • the modulated carriers that are present on ports (a) and (b) of summation circuit 016 are presented to receiver circuit 020 and adjusted in magnitude (via variable attenuator circuit 014) and in phase (via variable phase shifting circuit 015) to be in anti-phase with the signal at port (b) of summation circuit 016.
  • the resultant signal at the output port (c) of summation circuit 016 contains a minimum modulated carrier component and a maximum distortion component, as shown in Figure 8.
  • common receiving circuit 021 then adjusts the phase via variable phase shifting circuit 017 and magnitude via variable amplifier 018, of the resultant signal from port (c) of summation circuit 016.
  • variable phase shifting circuit 017 and magnitude via variable amplifier 018, of the resultant signal from port (c) of summation circuit 016.
  • coupling circuit 019 of the signal at the output of amplifier 018 with the signal present at the output of amplifier 012 the resulting distortion component at the output of the amplifier system is reduced further, as shown in
  • common receiving circuit 021 adjusts the phase via phase shifter circuit 009 and magnitude via variable amplifier circuit 010, of the resultant signal from port (c) of summation circuit 007, as shown in Figure 6, so that on recombination via summation circuit 004 with the signal present at the output of pre-amplifier 002 the distortion component is dynamically opposed in phase and amplitude to the distortion components inherent in operation of the amplifier 012.
  • Figure 2 shows a modification of the amplifier assembly described above.
  • the system is identical to that of Figure 1 except for the addition of a third outlet port to splitter 005 and inclusion of a third
  • loop3 measures the amplifier systems output signal and adjusts loopl and loop2 via receiver circuit 021 to ensure that the distortion component at the output of the amplifier system is kept to a minimum.
  • circuit 024 is functionally equivalent to the summation circuits 007 and 016 of loopsl and 2 respectively. For convenience and to distinguish between the loops, circuit 024 is identified as a "summing circuit".
  • the signal at the input of the amplifier system is split by coupler 001, split again by splitter 005
  • port (d) phase shifted by a variable phase shifter 026, and then presented to port (a) of summing circuit 024.
  • the magnitudes of the signals at input ports (a) and (b) of summing circuit 024 are substantially equal and the phases of the signals at ports (a) and (b) of summing circuit 024 are anti-phase.
  • the resulting signal at output port (d) of summing circuit 024 is optimised via receiver circuit 025 for a minimum distortion component. This is accomplished by receiver circuit 025 dynamically adjusting both the phase of the signal at input port (a) (via variable phase shifter 026) and the amplitude of the signal at input port (c) (via variable attenuator
  • variable attenuator 023 input to port (c)
  • Figure 11 The resultant output of variable attenuator 023 (input to port (c) ) is shown in Figure 11.
  • the resulting signal at output port (b) of summing circuit 024 is then directed to common receiving circuit 021.
  • receiving circuit 021 adjusts both phase shift circuits 009 and 017, and variable amplifier circuits 010 and 018, for a minimum distortion component at the amplifier systems output, as measured by receiving circuit 021 at output port (b) of summing circuit 024.
  • receiving circuits 021 and 025 are shown in Figure 2 as separate modules, with output ports (b) and (d) of summing circuit 024 carrying the same information. It is self-evident that receiving circuits 021 and 025 may be combined and presented with a signal from a single output port of summing circuit 024.
  • a composite modulated carrier signal fed from port (c) of summation circuit 004 is presented to port (a) of splitter 012a.
  • Port (b) of splitter 012a transmits a proportion of the modulated carrier to an integrator circuit 012b, which contains a method of detecting the amplitude component of the modulated carrier. This is then integrated and the bias of amplifier circuit 012d is adjusted to enable the amplifier 012 to produce the requisite power.
  • the integrator 012b determines that the duration of the power produced by amplifier circuit 012d exceeds a finite time limit that if exceeded will result in junction damage to amplifier circuit 012d, then the integrator 012b will reduce the power by attenuating the modulated carrier via variable attenuator circuit 012c, possibly as well as adjusting the amplifier bias.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

Un ensemble d'amplificateur comprend un préamplificateur (002), un amplificateur de puissance (012) et deux boucles distinctes. La première boucle constitue un schéma et un procédé de pré-distortion d'une porteuse modulée visant à compenser les non-linéarités présentes dans l'amplificateur de puissance (012). La deuxième boucle est une boucle couplée vers l'avant destinée à compenser la distorsion résiduelle après le passage de la porteuse modulée amplifiée par l'amplificateur de puissance (012). Une troisième boucle mesure le signal de sortie du système d'amplificateur et ajuste les boucles loop1 et loop2 pour réduire au minimum la composante de distorsion à la sortie du système d'amplificateur. La polarisation de l'amplificateur et l'atténuation du signal d'entrée sont ajustées selon une entrée de puissance de l'amplificateur, intégrée dans le temps en fonction de la chaleur massique de la jonction semi-conductrice de l'amplificateur et de la probabilité statistique d'une présence de données dans l'entrée de porteuse modulée destinée à l'amplificateur, notamment lorsque la durée de la sortie de puissance de l'amplificateur dépasse une limite temporelle prédéterminée, ce qui pourrait provoquer un endommagement thermique de l'amplificateur.
PCT/GB2003/004462 2002-11-01 2003-10-14 Ensemble d'amplificateur WO2004040751A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003271959A AU2003271959A1 (en) 2002-11-01 2003-10-14 Amplifier assembly

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB0225459A GB2395077A (en) 2002-11-01 2002-11-01 An amplifier arrangement linearised by predistortion and feedforward; adaptive bias for improved efficiency; thermal overload protection
GB0225459.7 2002-11-01

Publications (1)

Publication Number Publication Date
WO2004040751A1 true WO2004040751A1 (fr) 2004-05-13

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PCT/GB2003/004462 WO2004040751A1 (fr) 2002-11-01 2003-10-14 Ensemble d'amplificateur

Country Status (3)

Country Link
AU (1) AU2003271959A1 (fr)
GB (2) GB2395077A (fr)
WO (1) WO2004040751A1 (fr)

Cited By (2)

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Publication number Priority date Publication date Assignee Title
EP2670048A1 (fr) 2012-05-30 2013-12-04 Centre National d'Etudes Spatiales Procédé de calibration de linéariseur et composant électronique linéarisé
CN115808614A (zh) * 2023-02-09 2023-03-17 四川省华盾防务科技股份有限公司 一种功率放大器芯片热性能监测方法、系统及存储介质

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GB2411303A (en) * 2004-02-20 2005-08-24 N & L Ltd A base station RF amplifier with feedback-controlled bias for improved efficiency and linearity
EP2226932B1 (fr) 2009-03-02 2013-10-16 Alcatel Lucent Procédé d'amplification de signal par un amplificateur de puissance, système d'amplification de puissance, dispositif, produit de programme informatique et support de stockage numérique correspondant

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
EP2670048A1 (fr) 2012-05-30 2013-12-04 Centre National d'Etudes Spatiales Procédé de calibration de linéariseur et composant électronique linéarisé
US8976895B2 (en) 2012-05-30 2015-03-10 Centre National D'etudes Spatiales Method for calibrating a linearizer and linearized electronic component
CN115808614A (zh) * 2023-02-09 2023-03-17 四川省华盾防务科技股份有限公司 一种功率放大器芯片热性能监测方法、系统及存储介质
CN115808614B (zh) * 2023-02-09 2023-05-16 四川省华盾防务科技股份有限公司 一种功率放大器芯片热性能监测方法、系统及存储介质

Also Published As

Publication number Publication date
GB2395077A (en) 2004-05-12
AU2003271959A1 (en) 2004-05-25
GB0325306D0 (en) 2003-12-03
GB0225459D0 (en) 2002-12-11
GB2396498A (en) 2004-06-23

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