WO2004029812A3 - Computer system with processor cache that stores remote cache presence information - Google Patents

Computer system with processor cache that stores remote cache presence information Download PDF

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Publication number
WO2004029812A3
WO2004029812A3 PCT/US2003/031020 US0331020W WO2004029812A3 WO 2004029812 A3 WO2004029812 A3 WO 2004029812A3 US 0331020 W US0331020 W US 0331020W WO 2004029812 A3 WO2004029812 A3 WO 2004029812A3
Authority
WO
WIPO (PCT)
Prior art keywords
cache
memory subsystem
processor
cache memory
computer system
Prior art date
Application number
PCT/US2003/031020
Other languages
French (fr)
Other versions
WO2004029812A2 (en
Inventor
Patrick Conway
Frederick D Weber
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority to EP03798809A priority Critical patent/EP1543427A2/en
Priority to JP2004540309A priority patent/JP4230998B2/en
Priority to AU2003277175A priority patent/AU2003277175A1/en
Publication of WO2004029812A2 publication Critical patent/WO2004029812A2/en
Publication of WO2004029812A3 publication Critical patent/WO2004029812A3/en

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0817—Cache consistency protocols using directory methods
    • G06F12/082—Associative directories
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/25—Using a specific main memory architecture
    • G06F2212/251—Local memory within processor subsystem
    • G06F2212/2515—Local memory within processor subsystem being configurable for different purposes, e.g. as cache or non-cache memory
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

A computer system with a processor cache that stores remote cache presence information. In one embodiment, a plurality of presence vectors are stored to indicate whether particular blocks of data mapped to another node are being remotely cached. Rather than storing the presence vectors in a dedicated storage, the remote cache presence vectors may be stored in designated locations of a cache memory subsystem (52), such as an L2 cache, associated with a processor core (50). For example, a designated way of the cache memory subsystem may be allocated for storing remote cache presence vectors, while the remaining ways of the cache are used to store normal processor data. New data blocks may be remotely cached in response to evictions from the cache memory subsystem. In yet a further embodiment, additional entries of the cache memory subsystem may be used for storing directory entries to filter probe command and response traffic.
PCT/US2003/031020 2002-09-27 2003-09-18 Computer system with processor cache that stores remote cache presence information WO2004029812A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP03798809A EP1543427A2 (en) 2002-09-27 2003-09-18 Computer system with processor cache that stores remote cache presence information
JP2004540309A JP4230998B2 (en) 2002-09-27 2003-09-18 Computer system with processor cache for recording remote cache presence information
AU2003277175A AU2003277175A1 (en) 2002-09-27 2003-09-18 Computer system with processor cache that stores remote cache presence information

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/256,970 2002-09-27
US10/256,970 US7096323B1 (en) 2002-09-27 2002-09-27 Computer system with processor cache that stores remote cache presence information

Publications (2)

Publication Number Publication Date
WO2004029812A2 WO2004029812A2 (en) 2004-04-08
WO2004029812A3 true WO2004029812A3 (en) 2004-10-07

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/031020 WO2004029812A2 (en) 2002-09-27 2003-09-18 Computer system with processor cache that stores remote cache presence information

Country Status (8)

Country Link
US (1) US7096323B1 (en)
EP (1) EP1543427A2 (en)
JP (1) JP4230998B2 (en)
KR (1) KR100970229B1 (en)
CN (1) CN100373353C (en)
AU (1) AU2003277175A1 (en)
TW (1) TWI304930B (en)
WO (1) WO2004029812A2 (en)

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Also Published As

Publication number Publication date
WO2004029812A2 (en) 2004-04-08
US7096323B1 (en) 2006-08-22
TWI304930B (en) 2009-01-01
CN100373353C (en) 2008-03-05
AU2003277175A1 (en) 2004-04-19
JP2006501548A (en) 2006-01-12
EP1543427A2 (en) 2005-06-22
TW200408952A (en) 2004-06-01
KR100970229B1 (en) 2010-07-16
KR20050070013A (en) 2005-07-05
JP4230998B2 (en) 2009-02-25
CN1685320A (en) 2005-10-19

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