WO2004017524A1 - Parallel implementation for viterbi-based detection method - Google Patents

Parallel implementation for viterbi-based detection method Download PDF

Info

Publication number
WO2004017524A1
WO2004017524A1 PCT/IB2003/003507 IB0303507W WO2004017524A1 WO 2004017524 A1 WO2004017524 A1 WO 2004017524A1 IB 0303507 W IB0303507 W IB 0303507W WO 2004017524 A1 WO2004017524 A1 WO 2004017524A1
Authority
WO
WIPO (PCT)
Prior art keywords
decisions
parallel
input data
data sequence
blocks
Prior art date
Application number
PCT/IB2003/003507
Other languages
French (fr)
Inventor
Alexander Padiy
Sergei Sawitzki
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Priority to AU2003253144A priority Critical patent/AU2003253144A1/en
Publication of WO2004017524A1 publication Critical patent/WO2004017524A1/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • G11B20/10268Improvement or modification of read or write signals bit detection or demodulation methods
    • G11B20/10287Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors
    • G11B20/10296Improvement or modification of read or write signals bit detection or demodulation methods using probabilistic methods, e.g. maximum likelihood detectors using the Viterbi algorithm
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10009Improvement or modification of read or write signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/01Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/12Formatting, e.g. arrangement of data block or words on the record carriers
    • G11B2020/1264Formatting, e.g. arrangement of data block or words on the record carriers wherein the formatting concerns a specific kind of data
    • G11B2020/1288Formatting by padding empty spaces with dummy data, e.g. writing zeroes or random data when de-icing optical discs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B2220/00Record carriers by type
    • G11B2220/20Disc-shaped record carriers
    • G11B2220/25Disc-shaped record carriers characterised in that the disc is based on a specific recording technology
    • G11B2220/2537Optical discs
    • G11B2220/2541Blu-ray discs; Blue laser DVR discs

Definitions

  • the invention deals with a Niterbi-based detection method for generating decisions corresponding to an input data sequence.
  • the invention also deals with a detection device implementing such a detection method, and with a player and/or recorder for a recorded and/or recordable carrier comprising such a detection device.
  • the invention also deals with a receiver intended for receiving an input data sequence through a transmission channel, said receiver comprising such a detection device.
  • the invention also deals with a transmission system comprising such a receiver.
  • Such a detection method may be advantageously used in many applications, in particular in magneto, magneto-optical disc systems, hard drives, satellite and mobile transmission systems.
  • the Niterbi algorithm is known as the most efficient way of decoding convolutional codes. As explained in paragraph 7 of the book “Digital Baseband Transmission and Recording” by Jan W.M. Bergmans published in 1996 by Kluwer
  • the Niterbi algorithm consists in reformulating the detection of a data sequence as the search for the shortest path through a trellis of states describing the behaviour of the convolutional code used to generate the data sequence.
  • Each transition T(i,j) is defined by an initial state i of the trellis and a branch j connecting this initial state to a subsequent state of the trellis.
  • Each branch is uniquely associated with a code word of the convolutional code.
  • the Niterbi decoder When receiving an input word Z , the Niterbi decoder computes a branch metric BM(i,j,k) for each possible transition T(i,j).
  • the branch metric BM(ij,k) represents the distance between the input word Z and the code word associated with the transition T(i,j).
  • the length of a path in the trellis is the sum of the branch metrics along that path.
  • the Niterbi algorithm comprises a data-dependent feedback loop that performs a so-called Add-Compare-Select operation.
  • the speed of the Niterbi algorithm is intrinsically limited by this data-dependent feedback loop.
  • a detection method for generating decisions corresponding to an input data sequence comprises the steps of:
  • each Viterbi detecting unit In the detection method of the invention a training region is provided to each Viterbi detecting unit. This is achieved by dividing the input data sequence into overlapping blocks. In the regions of overlap the same data are available in at least two different Viterbi detecting units: one Viterbi detecting unit has them at the beginning of the block while the other one has them at the end of the block. The Viterbi detecting units use the overlap at the beginning of the block for training. The decision coming from the training regions are discarded. The final decisions are taken from the other Viterbi detecting unit which has the same data at the end of its block.
  • Providing a training region allows to avoid deterioration of the error rate while using Parallel Viterbi detecting units.
  • the proposed parallel implementation of the Viterbi algorithm allows to recover data at high speed from a carrier or a transmission system without requiring the use of expensive and power-consuming high clock rate digital hardware.
  • the proposed solution is particularly simple and flexible. It may be used with any type of Viterbi detecting units.
  • the detection device is designed to receive a number of parallel samples per clock cycle on its input and to generate a number of parallel decisions per clock cycle on its output.
  • FIG. 1 is a schematic diagram of a detection device according to the invention.
  • FIG. 2 to 4 are illustrations of different implementations of the dividing step of a detection method according to the invention.
  • FIG. 5 is a block diagram of the Viterbi detecting unit
  • FIG. 6 is a schematic diagram of a player according to the invention.
  • FIG. 7 is a schematic diagram of a transmission system according to the invention.
  • Figure 1 gives an example of a detection device according to the invention. It comprises an input unit IN, Q parallel Viterbi detecting units Vi, ..., V Q , and an output unit OUT.
  • the input unit IN receives an input data sequence IS.
  • the input data sequence IS is organized in P parallel sequences Ii, ..., Ip. This is not restrictive.
  • the function of the input unit IN is to divide the input data sequence IS in overlapping blocks so as to provide a training region at the beginning of each block, and to distribute the blocks to the Q Viterbi detecting units so that Q consecutive blocks can be processed in parallel.
  • the Viterbi detecting units Ni, ..., V Q output decisions from the blocks they receive. These decisions are forwarded to the output unit OUT.
  • the function of the output unit OUT is to discard the decisions corresponding to the training regions, and to reorder the other decisions so as to generate a sequence of decisions OS.
  • the sequence of decisions OS is organized in P parallel sequences of decisions O ⁇ ,...,Op, which again is not restrictive.
  • - K is the number of clock cycles used by each Viterbi detecting unit to process a data symbol of the input data sequence IS
  • - M is the number of additional Viterbi units needed to handle the overhead due the training regions.
  • K, P and M may vary depending on the requirements to be achieved. It is to be understood that when the input data sequence IS is organized into P parallel sequences, the input unit IN virtually reconstitutes the input data sequence IS in order to perform the division into overlapping blocks. And in a similar way, the output unit OUT virtually constructs a single sequence of decisions from which the P parallel sequences of decisions are formed.
  • Figures 2 to 4 represent examples of divisions of the input data sequence into overlapping blocks. Four consecutive overlapping blocks Kl, K2, K3 and K4 are represented.
  • blocks Kl and K4 are sent to the Viterbi detecting unit Vi
  • block K2 is sent to the Viterbi detecting unit V 2
  • block K3 is sent to the Viterbi detecting unit V 3 .
  • Figures 2 and 3 the same samples are available in two different Viterbi detecting units.
  • Figure 4 same the samples are available in two or three different Viterbi detecting units.
  • each block comprises three regions: a first region in which it overlaps with the previous block, a second region without any overlap, and a third region in which it overlaps with the next block.
  • the training region is the first region of each block.
  • the number M of additional Viterbi detecting units needed here is lower than
  • each block comprises two regions: a first region in which it overlaps with the previous block and a second region in which it overlaps with the next block.
  • the training region is also the first region of each block.
  • the number M of additional Viterbi detecting units needed here is equal to KP.
  • each block comprises five regions: a first region in which it overlaps with the two blocks that precede, a second region in which it overlaps with the previous block only, a third region in which it overlaps with the previous block and with the next block, a fourth region in which it overlaps with the next block only, and a fifth region in which it overlaps with the two blocks that follow.
  • the training region corresponds to the first, second and third regions.
  • the number M of additional Viterbi detecting units needed here is higher than KP and lower than 2KP. 5 26-07-2003
  • a basic diagram of a Viterbi detecting unit is represented in Figure 5. It comprises a branch metric calculation unit BMU, a path metric calculation unit PMU and a backtracking array BKU.
  • the backtracking array is responsible for storing the surviving path and for taking the decisions at each stage.
  • the training regions are used to initialise the path metric unit PMU and the backtracking array BKU.
  • the size of the training region required to keep the error rate of the detection device unchanged compared with standard sequential Niterbi detection devices is small. Typically, it is in the order of 50 to 100 input samples: 30 to 50 input samples are used to initialise the backtracking array BKU while the remaining 20 to 50 input samples are used to initialise the path metric calculation unit PMU. Since only a small training period is required, the input data sequence IS can be divided into small blocks. Typically the size of the blocks is in the order of 250 to 500 samples for the existing optical storage systems.
  • Figure 6 gives a schematic diagram of an example of a player according to the invention.
  • the player of Figure 6 is intended to play recorded media (for instance discs compliant with the standards CD, DND, DND+RW, Blu-ray). It comprises:
  • FIG 7 gives a schematic diagram of a transmission system according to the invention.
  • the transmission system of Figure 4 comprises a transmitter TR, a transmission channel CX and a receiver RR.
  • the reception chain is similar to the reproduction chain described with reference to Figure 6: it comprises an equalizer EQ', a detection device DN' according to the invention, an error corrector COR', and an application unit APPL.
  • the detection method of the invention may be implemented either in hardware or in software on a number of digital signal processors running in parallel. When implemented in software it doesn't require any shared memory nor high bandwidth inter-processor connections. This is an additional advantage of the invention.

Abstract

The invention proposes a detection method for generating decisions corresponding to an input data sequence. The input data sequence is divided into overlapping blocks so as to provide a training region at the beginning of the blocks. Q consecutive blocks are processed in parallel by Q different Viterbi detection units. The decisions corresponding to the training region are discarded. And the remaining decisions are reordered to form a sequence of decisions.The training regions are used to initialise the path metric units and the backtracking array of the Viterbi detecting units.Additional Viterbi detecting units are needed to handle the overhead due to the overlaps.Applications: storage (optical storage systems such as CD, DVD, DVD+RW, Blu-ray; magnetic and magneto-optical storage systems), transmission systems (mobile, satellite).

Description

PARALLEL IMPLEMENTATION FOR VITERBI-BASED DETECTION
FIELD OF THE INVENTION
The invention deals with a Niterbi-based detection method for generating decisions corresponding to an input data sequence. The invention also deals with a detection device implementing such a detection method, and with a player and/or recorder for a recorded and/or recordable carrier comprising such a detection device.
The invention also deals with a receiver intended for receiving an input data sequence through a transmission channel, said receiver comprising such a detection device. The invention also deals with a transmission system comprising such a receiver.
Such a detection method may be advantageously used in many applications, in particular in magneto, magneto-optical disc systems, hard drives, satellite and mobile transmission systems.
BACKGROUND OF THE INVENTION
The Niterbi algorithm is known as the most efficient way of decoding convolutional codes. As explained in paragraph 7 of the book "Digital Baseband Transmission and Recording" by Jan W.M. Bergmans published in 1996 by Kluwer
Academic Publishers, the Niterbi algorithm consists in reformulating the detection of a data sequence as the search for the shortest path through a trellis of states describing the behaviour of the convolutional code used to generate the data sequence.
Each transition T(i,j) is defined by an initial state i of the trellis and a branch j connecting this initial state to a subsequent state of the trellis. Each branch is uniquely associated with a code word of the convolutional code.
When receiving an input word Z , the Niterbi decoder computes a branch metric BM(i,j,k) for each possible transition T(i,j). The branch metric BM(ij,k) represents the distance between the input word Z and the code word associated with the transition T(i,j). The length of a path in the trellis is the sum of the branch metrics along that path. With a view to determining the shortest path through the trellis, a Niterbi detector keeps track, for each possible state i, of the surviving path P(i,k) that leads to that state, and of the associated path metric PM(i,k). Addition of the branch metrics BM(ij,k) and of the path metrics PM(i,k-l) of the surviving paths leads to stage k from stage k-1. And of all extended paths that lead to stage k, the one with the smallest path metric survives for each possible state i while the others are discarded.
It can be seen from the above that the Niterbi algorithm comprises a data- dependent feedback loop that performs a so-called Add-Compare-Select operation. The speed of the Niterbi algorithm is intrinsically limited by this data-dependent feedback loop.
It is an object of the present invention to propose a Niterbi-based detection method and a detection device that overcome this limitation.
SUMMARY OF THE INVENTION According to the invention, a detection method for generating decisions corresponding to an input data sequence comprises the steps of:
- dividing said input data sequence into overlapping blocks so as to provide a training region at the beginning of the blocks,
- distributing the blocks amongst Q parallel Viterbi detecting units so as to process Q consecutive blocks in parallel, thereby generating Q sets of decisions in parallel,
- discarding the decisions corresponding to said training regions,
- reordering the other decisions so as to generate at least one sequence of decisions.
In the detection method of the invention a training region is provided to each Viterbi detecting unit. This is achieved by dividing the input data sequence into overlapping blocks. In the regions of overlap the same data are available in at least two different Viterbi detecting units: one Viterbi detecting unit has them at the beginning of the block while the other one has them at the end of the block. The Viterbi detecting units use the overlap at the beginning of the block for training. The decision coming from the training regions are discarded. The final decisions are taken from the other Viterbi detecting unit which has the same data at the end of its block.
Providing a training region allows to avoid deterioration of the error rate while using Parallel Viterbi detecting units.
The proposed parallel implementation of the Viterbi algorithm allows to recover data at high speed from a carrier or a transmission system without requiring the use of expensive and power-consuming high clock rate digital hardware.
The proposed solution is particularly simple and flexible. It may be used with any type of Viterbi detecting units.
It is transparent to the rest of the system. Therefore it is easy to integrate in existing data flows within a chip. In particular, it is compatible with chips using parallel data processing. The embodiment claimed in claims 2 and 4 is directed to an integration into such chips: the detection device is designed to receive a number of parallel samples per clock cycle on its input and to generate a number of parallel decisions per clock cycle on its output.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other aspects of the invention are further described with reference to the following drawings:
- figure 1 is a schematic diagram of a detection device according to the invention,
- figures 2 to 4 are illustrations of different implementations of the dividing step of a detection method according to the invention;
- figure 5 is a block diagram of the Viterbi detecting unit,
- figure 6 is a schematic diagram of a player according to the invention,
- figure 7 is a schematic diagram of a transmission system according to the invention.
DESCRIPTION OF PREFERRED EMBODIMENTS Figure 1 gives an example of a detection device according to the invention. It comprises an input unit IN, Q parallel Viterbi detecting units Vi, ..., VQ, and an output unit OUT. The input unit IN receives an input data sequence IS. In the embodiment described in Figure 1, the input data sequence IS is organized in P parallel sequences Ii, ..., Ip. This is not restrictive. The function of the input unit IN is to divide the input data sequence IS in overlapping blocks so as to provide a training region at the beginning of each block, and to distribute the blocks to the Q Viterbi detecting units so that Q consecutive blocks can be processed in parallel.
Examples of how to divide the input data sequence IS into overlapping blocks will be described later on with reference to Figures 2 to 4.
The Viterbi detecting units Ni, ..., VQ output decisions from the blocks they receive. These decisions are forwarded to the output unit OUT.
The function of the output unit OUT is to discard the decisions corresponding to the training regions, and to reorder the other decisions so as to generate a sequence of decisions OS. In the embodiment described in Figure 1, the sequence of decisions OS is organized in P parallel sequences of decisions Oι,...,Op, which again is not restrictive. The number Q of Viterbi detecting units is given by Q=KP+M where:
- K is the number of clock cycles used by each Viterbi detecting unit to process a data symbol of the input data sequence IS,
- M is the number of additional Viterbi units needed to handle the overhead due the training regions.
The value of K, P and M may vary depending on the requirements to be achieved. It is to be understood that when the input data sequence IS is organized into P parallel sequences, the input unit IN virtually reconstitutes the input data sequence IS in order to perform the division into overlapping blocks. And in a similar way, the output unit OUT virtually constructs a single sequence of decisions from which the P parallel sequences of decisions are formed. Figures 2 to 4 represent examples of divisions of the input data sequence into overlapping blocks. Four consecutive overlapping blocks Kl, K2, K3 and K4 are represented.
By way of example, if three Viterbi detecting units Vi, V2 and V are used, blocks Kl and K4 are sent to the Viterbi detecting unit Vi, block K2 is sent to the Viterbi detecting unit V2 and block K3 is sent to the Viterbi detecting unit V3. In Figures 2 and 3 the same samples are available in two different Viterbi detecting units. In Figure 4 same the samples are available in two or three different Viterbi detecting units.
In Figure 2, each block comprises three regions: a first region in which it overlaps with the previous block, a second region without any overlap, and a third region in which it overlaps with the next block. In this case, the training region is the first region of each block. The number M of additional Viterbi detecting units needed here is lower than
KP.
In Figure 3, each block comprises two regions: a first region in which it overlaps with the previous block and a second region in which it overlaps with the next block. In this case, the training region is also the first region of each block. The number M of additional Viterbi detecting units needed here is equal to KP.
In Figure 4, each block comprises five regions: a first region in which it overlaps with the two blocks that precede, a second region in which it overlaps with the previous block only, a third region in which it overlaps with the previous block and with the next block, a fourth region in which it overlaps with the next block only, and a fifth region in which it overlaps with the two blocks that follow. In this example, the training region corresponds to the first, second and third regions. The number M of additional Viterbi detecting units needed here is higher than KP and lower than 2KP. 5 26-07-2003
A basic diagram of a Viterbi detecting unit is represented in Figure 5. It comprises a branch metric calculation unit BMU, a path metric calculation unit PMU and a backtracking array BKU. The backtracking array is responsible for storing the surviving path and for taking the decisions at each stage. The training regions are used to initialise the path metric unit PMU and the backtracking array BKU. For storage applications, the size of the training region required to keep the error rate of the detection device unchanged compared with standard sequential Niterbi detection devices is small. Typically, it is in the order of 50 to 100 input samples: 30 to 50 input samples are used to initialise the backtracking array BKU while the remaining 20 to 50 input samples are used to initialise the path metric calculation unit PMU. Since only a small training period is required, the input data sequence IS can be divided into small blocks. Typically the size of the blocks is in the order of 250 to 500 samples for the existing optical storage systems.
Figure 6 gives a schematic diagram of an example of a player according to the invention. The player of Figure 6 is intended to play recorded media (for instance discs compliant with the standards CD, DND, DND+RW, Blu-ray...). It comprises:
- a reading unit RD intended to read data written on the recorded media DK,
- an equalizer EQ intended to filter the output of the reading unit RD,
- a detection device DN according to the invention, - an error corrector COR intended to reduce the bit error rate,
- a decoder DEC,
- and a playback unit PL.
Figure 7 gives a schematic diagram of a transmission system according to the invention. The transmission system of Figure 4 comprises a transmitter TR, a transmission channel CX and a receiver RR. The reception chain is similar to the reproduction chain described with reference to Figure 6: it comprises an equalizer EQ', a detection device DN' according to the invention, an error corrector COR', and an application unit APPL.
It is to be noted that the detection method of the invention may be implemented either in hardware or in software on a number of digital signal processors running in parallel. When implemented in software it doesn't require any shared memory nor high bandwidth inter-processor connections. This is an additional advantage of the invention.
With respect to the described detection method, detection device, player/recorder, receiver and transmission system, modifications or improvements may be proposed without departing from the scope of the invention. The invention is thus not limited to the examples provided.
The word "comprising" does not exclude the presence of elements or steps other than those listed in the claims.

Claims

1. A detection method for generating decisions corresponding to an input data sequence, said detection method comprising the steps of:
- dividing said input data sequence into overlapping blocks so as to provide a training region at the beginning of the blocks,
- distributing the blocks amongst Q parallel Niterbi detecting units so as to process Q consecutive blocks in parallel, thereby generating Q sets of decisions in parallel,
- discarding the decisions corresponding to said training regions,
- reordering the other decisions so as to generate at least one sequence of decisions.
2 A detection method as claimed in claim 1, wherein said input data sequence is organized in P parallel data sequences and said reordering step generates P parallel sequences of decisions corresponding to said P parallel data sequences.
3. A detection device for generating decisions corresponding to an input data sequence, said detection device comprising an input unit, Q parallel Niterbi detecting units, and an output unit,
- said input unit being designed for dividing said input data sequence into overlapping blocks so as to provide a training region at the beginning of the blocks, and for distributing the blocks amongst said Q parallel Niterbi detecting units so as to allow the processing of Q consecutive blocks in parallel,
- said Q parallel Niterbi detecting units being designed for generating Q sets of decisions in parallel,
- and said output unit being designed for discarding the decisions corresponding to said training regions, and for reordering the other decisions so as to generate at least one sequence of decisions.
4. A detection device as claimed in claim 2 wherein said input unit is designed to receive and process P parallel data sequences forming said input data sequence, and said output unit is designed for generating P parallel sequences of decisions corresponding to said P parallel data sequences.
5. A player and/or recorder for a recorded and/or recordable carrier, comprising a reading unit for reading said carrier and generating an input data sequence, and a detection device as claimed in claim 3 or 4 for generating decisions corresponding to said input data sequence.
6. A receiver intended for receiving an input data sequence through a transmission channel, said receiver comprising a detection device as claimed in claim 3 or 4 for generating decisions corresponding to said input data sequence.
7. A transmission system comprising a receiver as claimed in claim 6.
PCT/IB2003/003507 2002-08-14 2003-08-07 Parallel implementation for viterbi-based detection method WO2004017524A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003253144A AU2003253144A1 (en) 2002-08-14 2003-08-07 Parallel implementation for viterbi-based detection method

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP02292040 2002-08-14
EP02292040.9 2002-08-14

Publications (1)

Publication Number Publication Date
WO2004017524A1 true WO2004017524A1 (en) 2004-02-26

Family

ID=31725501

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB2003/003507 WO2004017524A1 (en) 2002-08-14 2003-08-07 Parallel implementation for viterbi-based detection method

Country Status (2)

Country Link
AU (1) AU2003253144A1 (en)
WO (1) WO2004017524A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005099101A1 (en) * 2004-04-05 2005-10-20 Koninklijke Philips Electronics N.V. Four-symbol parallel viterbi decoder
US10437817B2 (en) 2016-04-19 2019-10-08 Huawei Technologies Co., Ltd. Concurrent segmentation using vector processing

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
BLACK P J ET AL: "A 1-GB/S, FOUR-STATE, SLIDING BLOCK VITERBI DECODER", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE INC. NEW YORK, US, vol. 32, no. 6, 1 June 1997 (1997-06-01), pages 797 - 805, XP000723402, ISSN: 0018-9200 *
DIVSALAR D ET AL: "Multiple Turbo Codes for Deep Space Communications", TDA PROGRESS REPORT, no. REP 42-121, 15 May 1995 (1995-05-15), pages 66 - 77, XP002251816 *
FETTWEIS G ET AL: "FEEDFORWARD ARCHITECTURES FOR PARALLEL VITERBI DECODING", JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL, IMAGE, AND VIDEO TECHNOLOGY, KLUWER ACADEMIC PUBLISHERS, DORDRECHT, NL, vol. 3, no. 1 / 2, 1 June 1991 (1991-06-01), pages 105 - 119, XP000228897, ISSN: 0922-5773 *
WORM A ET AL: "VLSI architectures for high-speed MAP decoders", PROCEEDINGS OF 14TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, BENGALORE, INDIA, IEEE, 3 January 2001 (2001-01-03) - 7 January 2001 (2001-01-07), pages 446 - 453, XP010531492 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005099101A1 (en) * 2004-04-05 2005-10-20 Koninklijke Philips Electronics N.V. Four-symbol parallel viterbi decoder
US10437817B2 (en) 2016-04-19 2019-10-08 Huawei Technologies Co., Ltd. Concurrent segmentation using vector processing

Also Published As

Publication number Publication date
AU2003253144A1 (en) 2004-03-03

Similar Documents

Publication Publication Date Title
US6725418B2 (en) Decoding circuit using path sequence including feed-back type path sequence storing blocks
US8321771B1 (en) Modified trace-back using soft output viterbi algorithm (SOVA)
US7581160B2 (en) ACS circuit and Viterbi decoder with the circuit
US6233289B1 (en) High rate trellis code for partial response channels
US7360147B2 (en) Second stage SOVA detector
US5548600A (en) Method and means for generating and detecting spectrally constrained coded partial response waveforms using a time varying trellis modified by selective output state splitting
US20160352364A1 (en) Max-log-map equivalence log likelihood ratio generation soft viterbi architecture system and method
EP0802634B1 (en) Viterbi decoding method and circuit therefor
US7529324B2 (en) Decoder, decoding method, and disk playback device
US7426681B2 (en) Viterbi detector
US6347390B1 (en) Data encoding method and device, data decoding method and device, and data supply medium
US6516136B1 (en) Iterative decoding of concatenated codes for recording systems
JP3567733B2 (en) Signal decoding method, signal decoding circuit, information transmission communication device using the same, and information storage / reproduction device
JP4099730B2 (en) Digital signal reproduction device
US20060277449A1 (en) Decoding apparatus, decoding method, program-recording medium, program and recording/reproduction apparatus
WO2004017524A1 (en) Parallel implementation for viterbi-based detection method
US6975252B2 (en) Disk apparatus and disk reproducing method
US9525436B2 (en) Data detector with extended states
KR100463560B1 (en) Asymmetric channel data detection compensation
JPH09148944A (en) Viterbi decoder and information reproducing device
US8885779B2 (en) Channel detector implementation with postcoder
US6236692B1 (en) Read channel for increasing density in removable disk storage devices
US20050152056A1 (en) Data recording and reproducing device and method utilizing iterative decoding technique
US20070006058A1 (en) Path metric computation unit for use in a data detector
JPH11317030A (en) Information recording and reproducing method, information recording and reproducing circuit and information recording and reproducing device using the circuit

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A1

Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX MZ NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW

AL Designated countries for regional patents

Kind code of ref document: A1

Designated state(s): GH GM KE LS MW MZ SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IT LU MC NL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
122 Ep: pct application non-entry in european phase
NENP Non-entry into the national phase

Ref country code: JP

WWW Wipo information: withdrawn in national office

Country of ref document: JP