WO2003090088A3 - Method and system to store information - Google Patents

Method and system to store information Download PDF

Info

Publication number
WO2003090088A3
WO2003090088A3 PCT/US2003/011433 US0311433W WO03090088A3 WO 2003090088 A3 WO2003090088 A3 WO 2003090088A3 US 0311433 W US0311433 W US 0311433W WO 03090088 A3 WO03090088 A3 WO 03090088A3
Authority
WO
WIPO (PCT)
Prior art keywords
store information
information
storage parameter
memory devices
transferring
Prior art date
Application number
PCT/US2003/011433
Other languages
French (fr)
Other versions
WO2003090088A2 (en
Inventor
Peter Nangle
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Priority to AU2003223599A priority Critical patent/AU2003223599A1/en
Priority to EP03719738A priority patent/EP1497734A2/en
Publication of WO2003090088A2 publication Critical patent/WO2003090088A2/en
Publication of WO2003090088A3 publication Critical patent/WO2003090088A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20—Employing a main memory using a specific memory technology
    • G06F2212/205—Hybrid memory, e.g. using both volatile and non-volatile memory
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Stored Programmes (AREA)
  • Memory System (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

Briefly, in accordance with an embodiment of the invention, a method to store information is provided, wherein the method includes generating a storage parameter to store information, wherein the storage parameter indicates use of the information by a software process and transferring the information to one of at least two memory devices based at least in part on the storage parameter and on a characteristic of the two memory devices.
PCT/US2003/011433 2002-04-18 2003-04-11 Method and system to store information WO2003090088A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
AU2003223599A AU2003223599A1 (en) 2002-04-18 2003-04-11 Method and system to store information
EP03719738A EP1497734A2 (en) 2002-04-18 2003-04-11 Method and system to store information

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/126,097 2002-04-18
US10/126,097 US7330954B2 (en) 2002-04-18 2002-04-18 Storing information in one of at least two storage devices based on a storage parameter and an attribute of the storage devices

Publications (2)

Publication Number Publication Date
WO2003090088A2 WO2003090088A2 (en) 2003-10-30
WO2003090088A3 true WO2003090088A3 (en) 2004-03-25

Family

ID=29214930

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2003/011433 WO2003090088A2 (en) 2002-04-18 2003-04-11 Method and system to store information

Country Status (6)

Country Link
US (1) US7330954B2 (en)
EP (1) EP1497734A2 (en)
CN (1) CN1312589C (en)
AU (1) AU2003223599A1 (en)
MY (1) MY142946A (en)
WO (1) WO2003090088A2 (en)

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US9135190B1 (en) * 2009-09-04 2015-09-15 Bitmicro Networks, Inc. Multi-profile memory controller for computing devices
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US9372755B1 (en) 2011-10-05 2016-06-21 Bitmicro Networks, Inc. Adaptive power cycle sequences for data recovery
US9043669B1 (en) 2012-05-18 2015-05-26 Bitmicro Networks, Inc. Distributed ECC engine for storage media
US20140006338A1 (en) * 2012-06-29 2014-01-02 Applied Materials, Inc. Big data analytics system
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US9423457B2 (en) 2013-03-14 2016-08-23 Bitmicro Networks, Inc. Self-test solution for delay locked loops
US9720603B1 (en) 2013-03-15 2017-08-01 Bitmicro Networks, Inc. IOC to IOC distributed caching architecture
US9858084B2 (en) 2013-03-15 2018-01-02 Bitmicro Networks, Inc. Copying of power-on reset sequencer descriptor from nonvolatile memory to random access memory
US9501436B1 (en) 2013-03-15 2016-11-22 Bitmicro Networks, Inc. Multi-level message passing descriptor
US9842024B1 (en) 2013-03-15 2017-12-12 Bitmicro Networks, Inc. Flash electronic disk with RAID controller
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US10489318B1 (en) 2013-03-15 2019-11-26 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US9875205B1 (en) 2013-03-15 2018-01-23 Bitmicro Networks, Inc. Network of memory systems
US9672178B1 (en) 2013-03-15 2017-06-06 Bitmicro Networks, Inc. Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system
US9798688B1 (en) 2013-03-15 2017-10-24 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9400617B2 (en) 2013-03-15 2016-07-26 Bitmicro Networks, Inc. Hardware-assisted DMA transfer with dependency table configured to permit-in parallel-data drain from cache without processor intervention when filled or drained
US9916213B1 (en) 2013-03-15 2018-03-13 Bitmicro Networks, Inc. Bus arbitration with routing and failover mechanism
US9430386B2 (en) 2013-03-15 2016-08-30 Bitmicro Networks, Inc. Multi-leveled cache management in a hybrid storage system
US9971524B1 (en) 2013-03-15 2018-05-15 Bitmicro Networks, Inc. Scatter-gather approach for parallel data transfer in a mass storage system
US10055150B1 (en) 2014-04-17 2018-08-21 Bitmicro Networks, Inc. Writing volatile scattered memory metadata to flash device
US10042792B1 (en) 2014-04-17 2018-08-07 Bitmicro Networks, Inc. Method for transferring and receiving frames across PCI express bus for SSD device
US9952991B1 (en) 2014-04-17 2018-04-24 Bitmicro Networks, Inc. Systematic method on queuing of descriptors for multiple flash intelligent DMA engine operation
US10078604B1 (en) 2014-04-17 2018-09-18 Bitmicro Networks, Inc. Interrupt coalescing
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US10013734B1 (en) 2017-04-01 2018-07-03 Intel Corporation Programmable controller and command cache for graphics processors
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US5845311A (en) * 1995-03-23 1998-12-01 Csem Centre Suisse D'electronique Et De Microtechnique Hierarchical ROMs that are selectively accessed by microprocessor instructions containing codes
US5818771A (en) * 1996-09-30 1998-10-06 Hitachi, Ltd. Semiconductor memory device
EP0952524A1 (en) * 1998-04-20 1999-10-27 Motorola, Inc. Multi-way cache apparatus and method
WO2000038067A1 (en) * 1998-12-22 2000-06-29 Gemplus Storage system comprising means managing a storage unit with anti-wear and anti-wear management of a storage unit
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Title
See also references of EP1497734A2 *

Also Published As

Publication number Publication date
US20030200400A1 (en) 2003-10-23
AU2003223599A1 (en) 2003-11-03
CN1312589C (en) 2007-04-25
EP1497734A2 (en) 2005-01-19
WO2003090088A2 (en) 2003-10-30
AU2003223599A8 (en) 2003-11-03
US7330954B2 (en) 2008-02-12
MY142946A (en) 2011-01-31
CN1662886A (en) 2005-08-31

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