WO2003003250A1 - Memoire adressable par son contenu constituee de plages - Google Patents

Memoire adressable par son contenu constituee de plages Download PDF

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Publication number
WO2003003250A1
WO2003003250A1 PCT/IL2001/000595 IL0100595W WO03003250A1 WO 2003003250 A1 WO2003003250 A1 WO 2003003250A1 IL 0100595 W IL0100595 W IL 0100595W WO 03003250 A1 WO03003250 A1 WO 03003250A1
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WIPO (PCT)
Prior art keywords
range
boundary
value
associative
input
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PCT/IL2001/000595
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English (en)
Inventor
Moshe Stark
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Hywire Ltd.
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Priority to PCT/IL2001/000595 priority Critical patent/WO2003003250A1/fr
Publication of WO2003003250A1 publication Critical patent/WO2003003250A1/fr

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90—Details of database functions independent of the retrieved data types
    • G06F16/903—Querying
    • G06F16/90335—Query processing
    • G06F16/90339—Query processing by using parallel associative memories or content-addressable memories

Definitions

  • the present invention relates to the field of Content Addressable Memory (CAM). More particularly, the invention relates to a method and apparatus for storing associative ranges containing keys and data associated with said ranges, in the form of a lookup table, in which a searched associative key found within a range is used to extract the associated data.
  • CAM Content Addressable Memory
  • CAM devices are specially designed for storing information in the form of a lookup table.
  • CAM structures allow a direct and fast search of data items, which is based on an associative key.
  • Software implementations of such data structures are usually slow for real time applications, especially in view of the great advances in recent years in data transmission rates.
  • CAM comprises storage of key words, and a separate storage for associated data items. For each of the stored key words, there is a corresponding associated data item. Therefore, the structure and operation of CAMs differs from those of conventional memory devices, such as RAM, wherein each data item is addressed by utilizing a unique address.
  • data items are fetched from the CAM device by submitting a key value. The key words storage is then searched to determine if a matching key word is stored inside the CAM. If there is a key-matching entry found in the CAM, a 'match' indication is issued, and the corresponding associated data (i.e., the data item associated with the key) is output from the CAM.
  • the Internet routers maintain a list of Internet Protocol (IP) Destination Addresses (IPDAs), and their associated interfaces (e.g., port numbers) through which the router should forward the received packet.
  • IP Internet Protocol
  • IPDAs Internet Protocol Destination Addresses
  • This list is-utilized to determine the best route for a packet of information received by the router to reach its destination. More particularly, said list of IPDAs and the interfaces is organized in the form of a lookup table.
  • the key word associated with each IPDA is the router interface of the destined network node (i.e., the next routing point, to which the received packet is destined).
  • Each IPDA is a unique 32-bit entity, usually represented in the form of four octets (sequences of eight bits, e.g., 192.30.50.0), comprising address information of the destined node within that network.
  • IP network classification method utilizing five basic Classes for any network on the Internet, turned out to be very expansive in terms of IPDA address space consumption, and in terms of the routing table size, required for forwarding lookups. As a consequence, the Internet ran out of address space very quickly. This has also led to an outstanding growth in the size of the routers' lookup tables.
  • the Internet Engineering Task Force devised a more flexible method (as described in RFC1519), known as the Classless Inter-Domain Routing (CIDR).
  • the CIDR resolves the difficulties stemming from the original network Address-Class hierarchy by aggregating multiple routes into a single representation. Address aggregation is achieved by masking a contiguous number of address 32-p least significant bits, which leads to a representation of a range of addresses by a single address and its mask. This leaves p bits also defined as the address prefix, p can be any integer value from 0 to 32.
  • the convention used to describe a CIDR address entry is A/p, wherein A is the address and p is the prefix. For example, the CIDR address entry 192.30.50.0/24 matches any IPDA address in the range 192.30.50.0 ⁇ -» 192.30.50.255.
  • a CIDR address may match with a multiple number of entries in the router's key list, this due to the presence of overlapping address ranges. Selection of one out of multiple matches is based upon the most specific match, which is the one with the longest prefix.
  • the CIDR addressing scheme allows a more efficient allocation of IP addresses, which results in a significant reduction in the size of the routing table, yet the growth of the Internet is seems to be increasing with time, and the difficulties stemming from this growth in routing table size still remain.
  • the modern routers are now designed for CIDR compliance.
  • Ternary CAM technology is widely adopted in routers implementation, but the substantial growth in the size of routing tables, and the many comparison operations required in determining a key match, influence performance and power consumption.
  • Other complications in Ternary CAM (TCAM) implementations are due to the complexity involved in determining the key match to a range of possible values, and especially utilizing CIDR's longest-prefix-match policy.
  • the conventional CAM implementations are efficiently designed for lookup tables when an exact match of key values is required, but the situation is more complex when a range of values need to be matched.
  • the aggregation efficiency is greatly influenced by the allocated address space, which in many cases is not covered by a single mask prefix, resulting in a substantial increase of routing table's sizes.
  • Ternary CAMs are limited with respect to the range boundaries, which are limited only to integer values being a • 2 32 ⁇ p , wherein a is an integer, and p is the prefix length. Therefore, the boundary values do not represent the whole range of non-negative integer values. This eliminates the capability of further aggregation over and beyond that offered by the CIDR method.
  • Ternary CAM's basic cell is complex, since it incorporates the address, the mask and the comparator.
  • the resulting cell size substantially limits the amount of entries per TCAM device in comparison with an SRAM.
  • the biggest TCAM for instance, SiberCore's SiberCAM Ultra-2M
  • the biggest TCAM implemented today incorporates 64 K IPv4 CIDR address entries without the associated data.
  • IP Lookups using Multiway and Multicolumn Search discloses a search method based on an interaction between a processing device and a memory, using binary search based algorithm for CIDR address searches. This method results in having a unique memory entry in which the result may reside. However, it offers a search performance, which varies as l ⁇ g 2 n , wherein n represents the number of entries. This is worse in performance than a Ternary CAM, which is insensitive to . the lookup table size. Furthermore, this implementation is unsuitable for high-performance routing, due to its lookup rate limitation.
  • RCM Range Content Addressable Memory
  • the present invention is directed to a method for arranging and storing, in a memory, associative ' key data set of associative elements and a corresponding associated data set of associated elements, where each associative element corresponds to a range of consecutive values, such that an associated element may be extracted from the memory as valid data if an associative key belongs to its associative element, the range may be represented by its lower and upper extreme values.
  • a memory device(s) is provided for storing the associative key data set and the associated data set that comprises a first and a second storage areas, so that to each storage location in the first storage area there is a corresponding storage location in the second storage area.
  • the associative elements of the key association data set and their corresponding associated data set are arranged in an order determined by priority precedence, such that associative elements having higher priority are placed before associative elements having lower priority.
  • a unique index is assigned for each associative element for representing its ordered location.
  • At least one of the extreme values of each associative element is stored in the first storage area in a location that corresponds to the priority of the associative element.
  • Each value of the associated data set is stored in a location in the second storage area that corresponds to the location of the associative element to which it is associated.
  • associated data values are extracted from the memory upon conducting a key search on the associative key data.
  • one or more associative elements that- may contain the input key are sought, and if no such associative element(s) is found, a mismatch signal is output, for indicating that the associated data that is output is invalid. If the input key is contained in one or more associative element(s), the associated data that corresponds to the associative element having the highest priority that contains the input key, and a match signal indicating that the associated data that is being output is valid, are output.
  • the lower and/or the upper extreme value of one or more ranges may be a non-negative value.
  • the associative elements of the key association data set may be ranges of consecutive . values having semi-open/semi-closed boundaries. Each range may have a closed boundary as its lower boundary, and an open boundary as its upper boundary, thereby defining a range of associative elements, each of which contains the value of its corresponding lower boundary and all its consecutive values, except for the value of its upper boundary. Alternatively, each range may have a closed boundary as its upper boundary, and an open boundary as its lower boundary, thereby defining a range of associative elements, each of which contains the value of its corresponding upper boundary and all its consecutive values, except for the value of its lower boundary.
  • the ranges that correspond to different associative elements may be non-overlapping.
  • the ranges that correspond to different associative elements are overlapping ranges, they are converted into one or more equivalent non-overlapping ranges.
  • Overlapping ranges are combined by truncating overlapping portions from ranges having lower priority, while maintaining with no change, for each set of overlapping portions, a single portion having the highest priority within the set, thereby obtaining an equivalent set of non-overlapping ranges.
  • the non-overlapping ranges of the equivalent set are arranged in a descending/ascending order, according to the boundary values of each of the ranges.
  • the second range is represented by the first range.
  • the second range element is removed from the associated key data set, and its associated data element is removed from the associated data set.
  • the second range is truncated to include the interval of values between its lower boundary and the lower boundary of the first range, thereby obtaining adjacent ranges having the same data association that corresponds to the first and the second ranges.
  • the second range is truncated to include the interval of values between its upper boundary and the upper boundary of the first range, thereby obtaining adjacent ranges having the same data association that corresponds to the first and the second ranges.
  • the second range is truncated into two smaller ranges, a first smaller range that includes the interval between the lower boundary of the second range and the lower boundary of the first range, and a second smaller range that includes the interval between the upper boundary of the first range and the upper boundary of the second range, thereby obtaining three adjacent ranges wherein the two smaller ranges have data association which is the same as the data association of the second range, while the first range and its data association remain unchanged.
  • This process is repeated for pairs of overlapping ranges as long as there is an overlap between more than two ranges, each time for the resulting ranges, until the last resulting ranges do not overlap.
  • associated data values are extracted from the memory upon conducting a key search on the associative key data.
  • one or more associative equivalent non-overlapping ranges that may contain the input key are sought, and if no such associative equivalent non-overlapping range(s) is found, a mismatch signal is output for indicating that the associated data that is being output is invalid. If the input key is contained in an associative equivalent non-overlapping range, the associated data that corresponds to that associative equivalent non-overlapping range is output, and a match signal indicating that the associated data that is being output is valid, is issued.
  • a match between an input key and an associative element is detected using a single comparison between the input key and the boundaries of equivalent non-overlapping ranges.
  • the key association data set is converted into an equivalent non-overlapping data set.
  • the boundary values of the equivalent non-overlapping data set are stored in ascending order in the first storage area.
  • Boundary type information is stored in a third storage area. The boundary type information indicates if a boundary is open or close, thereby having for each location in the first storage area a corresponding location in the third storage area.
  • the associated data set is stored in the second storage area in locations that correspond to the locations of closed boundaries of the equivalent non-overlapping data set stored in the first storage area.
  • a key match is detected by concurrently performing a single comparison operation between each boundary value stored in the first storage area and the input key, to determine whether the input key is larger than the boundary value.
  • a TRUE value is issued whenever a comparison result of the input key indicates that the input key is larger than the boundary value, otherwise, a FALSE value is issued.
  • a match is detected whenever a transition of the comparison results, from a TRUE value to a FALSE value, is obtained.
  • the index of the match being the index of the last boundary value for which a TRUE value has been obtained, is issued.
  • the boundary type information is retrieved from the third storage area that corresponds to the index, so that a match is obtained whenever the retrieved boundary type information indicates that the value with which the comparison operation was performed is a closed boundary value.
  • the index is used to fetch the associated data from the second storage area.
  • each associative element comprises two values, a first value which is the lower boundary of a range, and a second value which is an upper boundary of the range
  • a key match is detected by concurrently performing two comparison operations for every range in the key association data set, a first comparison to determine whether the input key is larger than, or equal to, the range's lower boundary, and a second comparison to determine whether the input key is smaller than the range's upper boundary.
  • a TRUE value is issued whenever the input key is larger than, or equal to, the range's lower boundary, and smaller than the range's upper boundary.
  • a match is indicated to each range, which yields a TRUE value, and the match with the highest priority is selected. The index of the match having the highest priority is issued and the associated data is retrieved by utilizing this index.
  • a validation signal which is utilized to validate a match indication, may be added to ignore search results in a desired location(s).
  • a value that belongs to a space consisting of one or more ranges may be represented by k bits
  • the open boundary of the space is represented by k+1 bits, such that a "0" logic value is assigned to k consecutive bits and a "1" logic value is assigned to the remaining bit.
  • Each value that does not belong to a range and is beyond the open boundary of the range may be represented by k+1 bits, such that a "0" logic value is assigned to k consecutive bits and a "1" logic value is assigned to the remaining bit.
  • the range may represent Classless Inter Domain Routing (CIDR) addresses.
  • CIDR Classless Inter Domain Routing
  • an input key search is performed simultaneously in one or more associative elements, or in one or more equivalent non-overlapping ranges that may contain the input key.
  • a match between an input key and a range is sought by arranging the ranges in their priority precedence order, comparing the input key with the values within each range, and obtaining one or more match indications whenever the input key belongs to one or more ranges.
  • the match indication corresponding to the range having the highest priority is selected.
  • the present invention is also directed to an apparatus for arranging and storing, in a memory, associative key data set of associative elements and a corresponding associated data set of associated elements, where each associative element corresponds to a range of consecutive values, such that an associated element may be extracted from the memory as valid data if an associative key belongs to its associative element.
  • the range may be represented by its lower and upper extreme values.
  • the apparatus comprises a memory device(s), for storing the associative key data set and the associated data set that comprises a first and a second storage areas, so that to each storage location in the first storage area there is a corresponding storage location in the second storage area in which the associative elements of the key association data set and their corresponding associated data set are arranged in an order determined by priority precedence, such that associative elements having higher priority are placed before those having lower priority; a unique index is assigned for each associative element, representing its ordered location; at least one of the extreme values of each associative element is stored in the first storage area in a location that corresponds to the priority of the associative element; and each value of the associated data set is stored in a location in the second storage area that corresponds to the location of the associative element, to which it is associated.
  • the apparatus may further comprise circuitry for extracting associated data values from the memory upon conducting a key search on the associative key data, including: a) circuitry for seeking one or more, associative elements that may contain a searched input key, upon receiving the input key; b) circuitry for outputting the associated data that corresponds to the associative element having the highest priority that contains the input key; and c) circuitry for outputting a mismatch signal, indicating that the associated data that is being output is invalid, if no such associative element(s) is found , and a match signal indicating that the associated data that is being output is valid, if the input key is contained in one or more associative element(s).
  • the lower and/or the upper extreme value of one or more ranges that are stored in the apparatus may be a non-negative value.
  • the associative elements of the key association data set may be ranges of consecutive values having semi-open/semi-closed boundaries. Each range that is stored in the apparatus may have a closed boundary as its lower boundary, and an open boundary as its upper boundary, or alternatively, a closed boundary as its upper boundary, and an open boundary as its lower boundary.
  • the ranges that correspond to different associative elements stored in the apparatus may be non-overlapping ranges.
  • Overlapping ranges that are stored in the apparatus may be converted into one or more equivalent non-overlapping ranges by combining overlapping ranges by truncating overlapping portions from ranges having lower priority, while maintaining with no change, for each set of overlapping portions, a single portion having the highest priority within the set and by arranging the non-overlapping ranges of the equivalent set in a descending/ascending order, according to the boundary values of each of the ranges.
  • the present invention is also directed to an apparatus in which associated data values may be extracted from the memory of the apparatus upon conducting a key search on the associative key data.
  • This apparatus may comprise: a) circuitry for seeking one or more associative equivalent non-overlapping ranges that may contain a searched input key, upon receiving the input key; b) circuitry for outputting the associated data that corresponds to the associative equivalent non-overlapping range that contains the input key; and c) circuitry for outputting a mismatch signal, indicating that the associated data that is being output is invalid, if no associative equivalent non-overlapping range is found and a match signal indicating that the associated data that is being output is valid, if the input key is contained in the associative equivalent non-overlapping range.
  • the present invention is also directed to an apparatus in which a match between an input key and an associative element is detected using a single comparison between the input key and the boundaries of equivalent non-overlapping ranges.
  • This apparatus may comprise: a) a first storage area for storing the boundary values of the equivalent non-overlapping data set in ascending order; ⁇ b) a second storage area for storing the associated data set in the locations that correspond to the locations of closed boundaries of the equivalent non-overlapping data set; c) a set of comparators for concurrently performing comparisons between each boundary value stored in the first storage area and the input key, to determine whether the input key is larger than the boundary value; d) circuitry for issuing a TRUE value whenever a comparison result with the input key indicates that the input key is larger than the boundary value, and for issuing a FALSE value if the input key is equal to or smaller than the boundary value; e) an encoder for detecting a match whenever there is a transition of the comparison results, from a TRUE value to a FALSE
  • each associative element comprises two values, a first value which is the lower boundary of a range, and a second value which is an upper boundary of the range.
  • This apparatus may comprise: a) an ordered set of storage and detection units for storing the upper and lower boundaries and for detecting a key match represented by issuing a TRUE value, by concurrently performing two comparison operations for the boundaries, a first comparison to determine whether the input key is larger than or equal to the range's lower boundary, and a second comparison to determine whether the input key is smaller than the range's upper boundary; b) circuitry for selecting the match with the highest priority, and for issuing the index of the match having the highest priority; and c) circuitry for outputting the associated data that corresponds to the index.
  • Each storage and detection unit may generate a validation flag for enabling/disabling a match detection.
  • Each value that belongs to a range may be represented in the apparatus by k bits, representing the open boundary of the range by k+1 bits, such that a "0" logic value is assigned to k consecutive bits and a "1" logic value is assigned to the remaining bit.
  • Each value that does not belong to a range and is beyond the open boundary of the range may be represented in the apparatus by k+1 bits, such that a "0" logic value is assigned to k consecutive bits and a "1" logic value is assigned to the remaining bit.
  • the range may represent Classless Inter Domain Routing (CIDR) addresses.
  • An input key search may be performed in the apparatus simultaneously in one or more associative elements that may contain the input key, or one or more equivalent non-overlapping ranges that may contain the input key.
  • the present invention is also directed to an apparatus for storing and outputting associative ranges and their associated data, and for seeking matching ranges that may contain a searched input key that comprises: a) an Entry list storage consisting of an ordered set of Range Word
  • RW read-only memory
  • each of which comprises: a.l) a first memory cell for storing the lower boundary of an associative range; a.2) a second memory cell for storing the upper boundary of the associative range; a.3) an input for inputting the searched input key; a.4) a validation flag input for indicating that the lower and upper boundaries are valid; a.5) an output for indicating a match whenever the validation flag input provides a valid indication, and the associative range comprises the searched input key; the RW devices are indexed according to their location, and the ranges that are stored in the RW devices are organized in a priority precedence order.
  • a priority encoder for detecting the match indication from an RW device with the highest priority, comprising: b.l) inputs for receiving the outputs of the Range Word devices; b.2) a first output for indicating a match; b.3) a second output for issuing the index of the matching RW device having the highest priority; c) a memory for storing the associated data from which the data associated with the highest priority range having a match is output, the memory comprising: cl) a set of memory cells for storing the associated data, each data item of the associated data being stored in a location corresponding to the RW device which stores the range values associated with the data item; c.2) an input of the second output of the priority encoder carrying the index of the match having the highest priority; and c.3) an output for outputting the data associated with the range having the highest priority match, by utilizing the input as a pointer to the location in which the associated data is stored.
  • the range value stored in the first memory cell in the apparatus may be a closed lower boundary, and the value stored in the second memory cell may be an open upper boundary.
  • the Range Word device comprises: a) a first comparator having a first input connected to the input of the searched input key, a second input connected to the first memory cell, and an output for issuing a TRUE indication whenever the value on the first input is smaller than the value on the second input; ⁇ b) a second comparator having a first input connected to the input of the searched input key, a second input connected to the second memory cell, and an output for issuing a TRUE indication whenever the value on the first input is smaller than the value on the second input; c) an inverter having an input connected to the output of the first comparator, and an output for outputting the inverted comparison result from the first comparator; d) a first AND gate having an input connected to the output of the inverter and another input connected to the output of the second comparator, the first AND gate outputs a TRUE indication whenever the searched key is smaller than the value stored in the second memory cell, and greater than or equal to the value stored in the first memory cell; and e) a second comparator having
  • the present invention is also directed to an apparatus in which overlapping ranges are converted into one or more equivalent non-overlapping ranges by combining overlapping ranges by truncating overlapping portions from ranges having lower priority, while maintaining with no change, for each set of overlapping portions, a single portion having the highest priority within the set and by arranging the equivalent non-overlapping ranges of the equivalent set in a descending/ascending order, according to the boundary values of each of the ranges, and each equivalent non-overlapping range has a closed boundary as its lower boundary and an open boundary as its upper boundary.
  • This apparatus may comprise: a) an Entry List storage device consisting of an ordered set of memory cells for storing entries, each being a value that represents at least one boundary value of a equivalent non-overlapping range and is indexed according to its relative location, the entry comprising a fe-bit value and the Entry List storage device comprising: a.1) an ordered set of boundary entries stored in the order of the equivalent non-overlapping ranges, wherein an index 1 is assigned to the first boundary value of the first equivalent non-overlapping range that is stored in the first memory cell, and the last boundary value, with index i, is stored in the i-th memory cell; a.2) zero values stored in all of the remaining memory cells that do not contain boundary values; ircuitry for detecting a match between a searched input key and an equivalent non-overlapping range, and for issuing the index of the matching equivalent non-overlapping range, comprising: b.l) a &-bit key input for inputting the searched input key; b.2) an input for inputting an Empty flag indication representing
  • each of which, except for the first comparator, comprises: b.4.1) a first input connected to a corresponding £-bit input; b.4.2) a second input connected to the &-bit key input; b.4.3) an output for outputting a TRUE indication whenever the value of the first input is smaller than the value of the second input, and a FALSE indication whenever the value of the first input is greater than the value of the second input; b.4.4) circuitry for producing a logic "1" whenever a zero value is obtained on the first input, such that zero values obtained on the first input are expanded in the comparators into a k+1 bit value having "1" at their most significant location, and zeros in all of the remaining locations; b.5) a first comparator that comprises: b.5.1) a first input connected to the first £-bit input; b.5.2) a second input connected to the &-bit key input; b:5.3) an output for outputting a TRUE indication whenever the value of the first input is smaller than the value
  • the Range Encoder may comprise: a) a set of ordered inputs for receiving the outputs of the set of ordered comparators; b) an input for receiving an Entry List Empty indication whenever the
  • Entry List storage device does not comprise associative data; c) a first output for outputting the index of the matching range value; d) a second output for outputting a unique indication whenever the searched input key is larger than any range value stored in the Entry List storage device; and e) an encoder for outputting the index of the matching range.
  • Fig. 1 graphically illustrates the meaning of a range according to the method of the invention
  • Fig. 2 graphically illustrates the process of searching for key match and for a Key Associated Data
  • Fig. 3 graphically illustrates the results of combining two ranges into an equivalent set of non-overlapping ranges
  • Fig. 4 graphically demonstrates the Non-overlapping Equivalent Range Set of the Overlapping Range Set illustrated in Fig. 2;
  • Fig. 5 graphically illustrates how a Key search is performed over a .
  • Fig. 6 schematically illustrates the RCAM's Range Word structure, key match detection, and generation of the match signal m according to a first embodiment of the invention
  • Fig. 7 schematically illustrates a Post-Processing Based RCAM comprised of an array of Range Words
  • Fig. 8 schematicall illustrates a preferred embodiment for a Pre-Processing Based RCAM according to the method of the invention.
  • Fig. 9 schematically illustrates a possible embodiment of a Range Encoder, according to a preferred embodiment of the invention.
  • Fig. 10 schematically illustrates overlapping of IPv4 CIDR addresses.
  • the present invention introduces a novel type of associative CAM device - a Range Content Addressable Memory (RCAM).
  • the RCAM combines the memory function with associative processing capabilities, and it is specifically designed to match an input key with a range of possible associative keys (integer values). More precisely, the R CAM yields a match indication if it determines that the key presented to it belongs to one of a predetermined set of value ranges. Therefore, it stores intervals of integer values, and unique data items (also integer values) associated with .each interval.
  • the present invention provides a method for implementing an RCAM device and demonstrates the usefulness of the range search approach. Before proceeding any further in the description of the present invention, some definitions and terms, as they appear hereinabove, are explained hereinbelow.
  • the range R denoted hy;R ⁇ [N L ,N H ) , wherein NH and Ni are integers such that NH > NL ⁇ 0, is a consecutive range of the integer numbers starting from ' NL and ending at NH.
  • the notation utilized for the lower boundary of the range R "[”, a square angled bracket, denotes a closed boundary, meaning that the range includes its lower bound, NL.
  • the upper boundary is an open boundary, and is denoted by a rounded bracket ")", meaning that the upper boundary is excluded, i.e., does not belong to the range R.
  • Fig. 1 graphically illustrates the meaning of a range in accordance with the range definition given hereinabove.
  • the range R ⁇ [N L ,N H ) , 101 is depicted as a semi-closed/semi-opened interval on the integer number axis 100 (positive and negative numbers comply with the range definition).
  • the range's lower boundary is NL
  • the range's higher boundary is NH.
  • N L e R namely, the range's lower boundary, belongs to the range (i.e., it is a part of the range).
  • N H £ R that is, the range's high boundary, does not belong to the range.
  • the range as defined herein is a Semi-closed/Semi-opened interval of integers.
  • range definition hereinabove has been selected, since it implies significant savings in the RCAM implementation, and eliminates multiple matches on Search operation, as will be demonstrated herein.
  • range definition which is also Semi-opened/Semi- Closed interval, but in which the open boundary is on the left-hand side, and the closed boundary is on the right-hand side.
  • the space ⁇ designates the space of all possible &-bit integer values (the integer values 0 ⁇ - 2* - 1 ).
  • any integer value K e ⁇ has a binary representation consisting of a finite and constant number of bits k, K ⁇ ⁇ a k _ x , a k _ 2 ⁇ ...,a i ,...a ,a ⁇ ) 2 , such that ⁇ ( . e ⁇ 0,l ⁇ (0 ⁇ / ⁇ A) .
  • the entire space comprises all integer values K such that - (o,o,.:.,o) 2 ⁇ jc ⁇ (i, ⁇ ,...,i) 2
  • N i (0,0,...,0) 2
  • N H (1,0,0,...,0) 2 .
  • Ranges R a and Rfr are called Overlapping Ranges if there is an integer K such that K ⁇ R a and.tr e R b .
  • the set of Associated Data ⁇ D ⁇ d ⁇ ,d2,...,di,...,d n ⁇ (a set of n integer values), wherein both of the sets are arranged in their priority order, that is, Ri is higher in priority than Rj if i ⁇ j, and given an integer value K, such that,
  • the set of ranges d ⁇ R ⁇ ,R2,...,Ri,...,Rn ⁇ will be referred to hereinafter as the Associative Range Set, and the set D ⁇ d ⁇ ,d2,...,di,...,d n ⁇ as the Associated Data Set.
  • the integer K will be referred to hereinafter as the Key, used to search and select a single element from the Associated Data Set ⁇ .
  • the function is defined as an Associative Function, which maps 5R, D, and f into a (d,m) pair in the following way,
  • i is the highest priority index (or the lowest index value) of all the matching Ranges, as defined hereinabove, and d is an integer value, d ⁇ O, which will be also referred to hereinafter as the Key Associated Data.
  • the variable m is a Boolean variable (may equal either a "1" or "0" value), and which will be referred to hereinafter as the Key Match value.
  • the Associative Function, Associative Range Set, Associated Data Set, and their priority-based ordering, which are defined hereinabove, facilitate the acquisition of a consistent result, for each Key search.
  • the searching for the Associated Data of a certain integer K comprises the following steps -
  • Step 1 Find the index i of the highest priority K- Matching Range.
  • Step 2 Use this index to access the Associated Data (The Associated Data is the i-th element in the Associated Data Set). More particularly, the method for searching for a Key Associated Data comprises the steps shown in the flow chart below:
  • each range R q and its corresponding data item d q are illustrated in an ordered sequence according to their precedence priority.
  • Each of the ranges is depicted in the following form R q l ' d q (1 ⁇ q ⁇ n) , on the integer number axis numbered from 1 to n.
  • the Key K is searched simultaneously in each and every range -
  • Each range, R q has its unique data item associated with d q (illustrated by
  • This process is performed on each and every range, from the set of ordered ranges R ⁇ ,R 2 ,R 3 ,R 4 ,..., R M , R t , R M , R i+2 ,..., RNase_ 3 , R n _ 2 , R n _ , R lake (wherein l ⁇ 2 ⁇ 3 ⁇ 4 ⁇ ... ⁇ z-l ⁇ t ⁇ t + l ⁇ z + 2 ⁇ ... ⁇ «-3 ⁇ rc-2 ⁇ n-l ⁇ n), such that the result of the highest priority match (i.e., the range to which there is a match having the smallest index) is then selected to retrieve the corresponding Associated Data.
  • the result of the highest priority match i.e., the range to which there is a match having the smallest index
  • a match is detected (m ⁇ -'l") for q-i,n-3, and n (K e R,-,R n _ 3 ,R n ).
  • the highest priorit match is the match with the range R. (i ⁇ n-3 ⁇ n).
  • Post-Processing is required to determine which one of the many possible corresponding Associated Data values ought to be selected on the ranges' priority basis.
  • the basic concept behind the method of the invention is that overlapping ranges can be combined prior to performing a search on the basis of the Ranges priority.
  • the original overlapping Range Set 5R can be traded for an equivalent non-overlapping Range Set ⁇ ⁇ ⁇ p l ,p 2 ,...,p v ⁇ which yields consistently the same Associated
  • Range Set having the following features:
  • Non-O ⁇ erlaOOins Equivalent Range Set For any p i , and p ⁇ (i ⁇ j), there is no integer K simultaneously belonging to the two ranges. That is, K e p. ⁇ K ⁇ . p , i ⁇ j , so that K is found in a single non-overlapping range. Therefore, the notion of priority in the context of Non-overlapping Equivalent Range Set becomes dispensable.
  • Non-O ⁇ erlaOOins Equivalent Range Set :
  • the equivalent set of ranges 17 is defined as a Non-Overlapping Equivalent Range Set of an Overlapping Range Set 5R .
  • the number of Range elements in ⁇ , v is smaller than, or equal to n+1 (v ⁇ n + 1) , wherein n is the number of ranges in 5R .
  • the combination of two overlapping Ranges is performed as follows:
  • R a N L a , N H ) with an Associated Data.
  • R b [N ,N H b ) with an Associated Data db
  • [N H " ,N H b )l d b is a new incarnation of Rb, but one in which the lower boundary is adjusted in order to maintain the completeness of Ra (i.e., the lower boundary of this new range is taken to be the upper boundary of range R a , N H a ).
  • Rb is of low priority, it completely vanishes in this case. More particularly, a range with low priority has no existence within a range of higher priority, as in this case, so that the result of combining ranges the Ra and Rb, is R a I d a , i.e., a single range having the boundaries and the associated data of R a .
  • ⁇ is an empty Range, that is Kg ⁇ , for any integer K).
  • R b ⁇ z.
  • R ⁇ (i.e., cases 1, 2, or 3) the new boundaries [N L b ,N L a )l d b ⁇ and/or
  • Range operations are distinct in the sense that in addition to the operand " " result being dependent on value of the basic elements, it also modifies the range boundaries.
  • the relative position of the boundary values on the integer number axis determines which of the results might hold. Over all, there are five different possible results when two ranges are combined.
  • Fig. 3 demonstrates graphically the possible results of the " " operation, performed on two Ranges.
  • Fig. 3. illustrates five distinct cases, Fig. 3(a) through Fig.. 3(e), which describe different possibilities for range interaction.
  • Fig. 3(a) illustrates non-overlapping of the ranges R a and Rb (R a R b - ⁇ )
  • Figs. 3(b) through 3(e) correspond to the four cases that were described before (cases 1, 2, 3, and 4).
  • the original ranges Ra and Rb are depicted on the left-hand side of each drawing, and the result of the " " operation in between the two ranges is depicted on the right-hand side of each drawing.
  • Ra assumes a higher priority than Rb (that is a ⁇ b).
  • Fig 3(a) demonstrates a case in which the "y " operation results in R a and
  • FIG. 3(e) illustrates case 4, hereinabove, wherein Rb is completely contained in Ra (R a n R b - R b ) , and which results in R a being unmodified and Rb being eliminated.
  • R a remains unmodified (cases 1,2 and 3 respectively), Rb disappears, and one or two ranges are created as a result from the " " operation in between R a and Rb.
  • Adjacent Ranges are obtained.
  • Adjacent Ranges are of great importance, since they potentially enable a compact way of representing ranges which results in significant saving in storage space. It should be understood that in Figs. 3(b), 3(c) and (d) the shared boundaries of the Adjacent Ranges are marked twice, once for being the open boundary of a left-hand Range, and once for being a closed boundary for the right-hand range.
  • N 2 , N 3 , ... , N._, , N ( . , N +1 , ... , N ? _ j , N q are the shared boundaries of the Adjacent
  • Adjacent Range Set having the compact representation [N ,...,N A ) , wherein 2 ⁇ n ⁇ 4.
  • any Range [r,.,r +1 ), in an equivalent non-overlapping range set, has an associated data ⁇ 5. .
  • ⁇ ⁇ ⁇ ⁇ » ⁇ 2 .-, ⁇ I +2 , ⁇ p+3 ,..., ⁇ q ⁇ ,..., ⁇ s , ⁇ s+1 ,..., ⁇ , ⁇
  • ⁇ h d k for l ⁇ h,ij,k ⁇ n.
  • Fig. 4 depicts the Non-overlapping Equivalent Range Set, which corresponds to the Overlapping Range Set depicted in Fig. 2.
  • This Non-overlapping Equivalent Range Set results from utilizing the "u " operator and the Commutative and the Associative laws on the Overlapping Range Set (as was described hereinabove).
  • the generation of Non-overlapping Equivalent Range Set assumes that either there are no additional Overlapping Ranges except for the depicted ones, or that all the additional overlapping ranges are contained in higher priority ranges.
  • the number of boundary points in the Non-overlapping Equivalent Range is significantly smaller than the sum of all the boundaries of the depicted ranges. Additionally, each one of these boundary points belongs to one or more of the Overlapping Range boundaries.
  • Fig. 5 demonstrates how a Key search is performed over a Non-overlapping Equivalent Range Set and its Associated Data. Three different situations for a possible search are depicted:
  • the boundary T x is the left boundary of the leftmost Range,
  • the integer "0" must be denoted as an Open Boundary. This assures that searching for a Key in the interval )0,r j ] will yield a Mismatch.
  • RCAM implementations are disclosed, according to preferred embodiments of the invention.
  • the preferred embodiments of the invention consist of one implementation which is based on a Post-Processing RCAM, and another implementation based on a Pre-Processing RCAM.
  • FIG. 6 schematically illustrates the RCAM Range Word structure, key match detection, and generation of the match signal m 610.
  • Each word contains 2k bits of Range Data, which consists of the ⁇ -bit boundary NL 601, and the &-bit boundary NH 602.
  • the value of the searched key is introduced on 603 (a /Vbit integer).
  • Two comparison operations are performed on the searched Key value 603, one with NL and the _second with NH, utilizing two separate "Greater than” (Gt) Comparators, 604 and 605 respectively.
  • Each of the comparators, 604 and 605 has two inputs, Ini and Iu2, and one output Gt which produces a "True" signal (typically, logic "1") whenever In ⁇ In2.
  • the Comparator 605 receives the value of the searched key K (on 603) on its Inl input and the value of NH (from 602) on its In2 input. Therefore, Comparator 605 produces on its Gt output a "True" signal, when K ⁇ N H .
  • Comparator 604 also receives the value of the searched key K (on 603) on its Inl input, but its In2 input is fed by the value of NL (from 601). Hence, a "True” value is produced on the Gt output of 604 whenever K ⁇ N L . This result (of 604) should now . be inverted to yield a "True” value whenever K ⁇ N L , as required. Therefore, the inverter 606 is connected to the Gt output of the comparator 604, such that a "True” value is obtained on the output of 606 whenever K ⁇ N L .
  • the AND gate 607 combines these results to yield a "True" value whenever N L ⁇ K ⁇ N H . This . is obtained by connecting one of its inputs to the output of the inverter 606 (which is responsible for a K ⁇ N L indication), and connecting its other input to the Gt output of the comparator 605 (which the provides K ⁇ N H indication).
  • Fig. 7 schematically illustrates an RCAM which incorporates an array of
  • Range Words each of which may be constructed, as illustrated in Fig.
  • the RCAM's entry list is comprised of the RWs -
  • This Index output serves as an address to the Associated Data memory 704, which incorporates the Associated Data List a x ,a 2 ,a 3 ,a 4 ..., a t _ , a i , ct 1+ , i+2 ,..., a j _ 2 , a j _ x , ., a j+x ,... ,a n _ ,a n .
  • the Associated Data memory 704 receives the index i, from the Priority Encoder 701, on 703 and fetches its i-th word containing the Associated Data d i , which is then provided on the ⁇ -bit output 705.
  • the Associated Data may be embedded in the same device or may be located in a separate device.
  • the match indication is provided on another output, 702, of the Priority Encoder 701. Additional logic inside the Priority Encoder 701 is utilized to calculate a Match, which is simply obtained by the computation of
  • the Priority Encoder's resolution time is proportional to the number of RWs. This time might be substantial for huge RCAMs, thus slowing down the RCAM performance. This effect can be reduced at the cost of a more complicated Priority Encoder.
  • the RW structure is bulky and space-consuming. Therefore, it is not yielding to the implementation of RCAMs that are large in size.
  • preprocessing is performed over the Overlapping Range Set of the RCAM device. This preprocessing results in a Non-overlapping Range Set.
  • the information related to the Non-overlapping Equivalent Range Set and its Associated Data is stored in the RCAM device.
  • Fig. 8 schematically illustrates a preferred embodiment for a Pre-Processing Based RCAM according to the method of the invention.
  • the Non-overlapping Equivalent Range Set boundaries are stored sequentially in the RCAM device.
  • gaps are not allowed to be present in between the stored boundaries.
  • a contiguous storage space in the RCAM is occupied.
  • the entry list 800 of the Pre-Processing Based RCAM (which may comprise up to n entries), consists of the t+1 entries
  • the boundaries issued by the invalid block r, +2 ,...,r belong are all of ( ⁇ ,0,..., ⁇ ) 2 value, since these entries contain no valid boundaries.
  • the boundary values T x ,r 2 ,...,T n drive inputs of the Range Locator block 801.
  • the entries in the vahd block are arranged in an ordered manner, such that - r, ⁇ ⁇ 2 ⁇ 3 ⁇ ⁇ 4 ⁇ ... ⁇ ,._ 2 ⁇ M ⁇ ; ⁇ ⁇ ,. +1 ⁇ ... ⁇ , ⁇ ⁇ , +I , wherein Entry M is the last vahd boundary entry.
  • the Empty Flag 810 is utilized to indicate that the Entry List is empty, which is the state in which its value is "1".
  • the invalid entries are loaded with ( ⁇ ,0,..., ⁇ ) 2 values, which may be used only as the open lower boundary of the range with the highest priority, as explained hereinbefore. Since in any other entry than Entry x , ( ⁇ ,0,..., ⁇ ) 2 is not a valid Entry, it is not interpreted as the /2-bit ( ⁇ ,0,..., ⁇ ) 2 value if it appears in any of the other entries Entry 2 ,..., Entry n . More precisely, the occurrence of the ( ⁇ ,0,..., ⁇ ) 2 value in any of the entries Entry '-,..., Entry n is now interpreted as the k+1 bit value (l,0,0,..., ⁇ ) 2 .
  • the Gt outputs drive the inputs of the Range Encoder 802 which detects the transitional point i at which the Gt signals drop from "1" to "0". As is depicted in Fig. 8, and with accordance to the example above, this transition occurs between the i-th and the i+1 Gt outputs (since T ( ⁇ K ⁇ r. +1 ).
  • the Range Encoder 802 detects this transition, and issues a -bit binary encoded Index signal, which carries the value of i, on 805.
  • transition detection logic 900 is comprised of an ordered set of n AND gates A x ,A 2 ,A 3 ,A 4 ,...,A n , each of which receives the corresponding Gt output of a comparator in one of it inputs, such that the AND gate A) receives the Gt output of the comparator which compares the key if with the boundary value T,..
  • each AND gate receives the inverse value of the Gt output of the next comparator in order.
  • the other input of A i receives the inverted result of the comparison of the searched key if with the value of the boundary r /+1 .
  • the output of each and every AND gate is "0", except for the i-th AND gate, A and this is precisely where the transition of the Gt outputs occurs.
  • the second input (the inverted input) of the last AND gate in the transition detection logic 900, A n receives a constant "0" value. This serves to produce the "Key is greater than any stored boundary” indication, when all of the Range Encoder's inputs set to "1", and thus the AND gate A n will detect a transition. This indication is utilized to enable/disable an output from the Boundary Type List 803, as will be explained hereinafter.
  • the Range Encoder output 805 is a g-bit wide bus, wherein 2 • n > 2 ⁇ > n .
  • the AND gate 806 receives the inverted value of the q-t line 812 in one of its inputs and the resulting boundary type m : in its other input.
  • the value of the g-th line enables or disables the output of a Match indication. In all the other cases, where the value of the q-th. line signal is "0", the resulting Match output is
  • the Index is used as an address to the Associated Data List, and to the Associated Boundary List.
  • the Associated Boundary Type List 803 is 1-bit wide, and it comprises m p values. if T p Closed — Boundary if r Opened - Boundary
  • Associated Data List that is, the data stored in the i-th location, ⁇ i .
  • the Associated-Data List may be stored on the same device or may be stored on a different device than that of the RCAM Entry List 800.
  • the hereinabove RCAM structure requires Pre-Processing.
  • the boundary entries must be stored in a sequential order. It requires half the number of storage bits, and half the number of comparators per entry. Therefore, it ' significantly reduces hardware costs, and improves storage arid performance efficiency as compared to the embodiment of the , Post-Processing RCAM that was described hereinabove. Additionally, since the result (if there is any) resides always in the context of two entries (e.g., r. ⁇ K ⁇ r. +l ) and two comparators only, reception of the Index is almost instantaneous without any propagation as required for the Post-Processing RCAM.
  • IPv4 Internet Protocol Version 4, the currently used Internet version
  • addresses are of 32 bits. These 32-bit values are typically represented as four decimal values separated by a full stop, each representing an 8-bit binary number (octets).
  • IPv4- CIDR address is represented in the following form - Alp, wherein A is the IPv4 address and p is the prefix, i.e., the number of contiguously compared most significant bits from left to right (0 p ⁇ 32).
  • the prefix is equivalent to a 32-bit mask wherein the number of "l”s equals p, and wherein those p “l”s are followed by 32-p “0"s.
  • the zeroed part of the mask indicates that this part of the address bits should be ignored, when comparing the value of a CIDR address with an address.
  • IPv4-CIDR address representation is then 198.32.0.0/13.
  • IPv4 CIDR addresses can be represented as Ranges using the following formula - A I p ⁇ [A, A + 2X ⁇ P ) .
  • each Alp IPv4 CIDR Address Range interval contains 2 32 ⁇ p integers.
  • IPv4 CIDR addresses are always convertible to Ranges. However, this is not the case in the opposite direction (i.e., when converting any given Range into an IPv4 CIDR address).
  • the Range according to the method of the invention, has an
  • a single Range may represent one or more IPv4 CIDR addresses. It can be easily shown that any two IPv4 CIDR Address Ranges, Al p and A 2 /p, A X ⁇ A 2 having the same prefix p, are always Non-overlapping Ranges. Therefore, for any address A if AeAlp and A X ⁇ A 2 , then essentially A&A 2 /p, and vice versa.
  • a X ⁇ A 2 or A 2 ⁇ A +2 32 - p - 1 .
  • IPv4 CIDR addresses are demonstrated in Fig.10.-
  • p 2 p x +1
  • a x I p x is a bigger range
  • a 2 /p 2 is a smaller range.
  • There may be one of two cases, as illustrated in Fig.10. In one case, 1002, the ranges have the same CIDR addresses A x A 2 , while in the other case the CIDR addresses are different A x ⁇ A 2 , 1003.
  • Fig. 10 also illustrates the Equivalent non-Overlapping Range Set for each case.
  • 1004 and 1005 two adjacent non-overlapping range sets are obtained.
  • a 2 1 p 2 is the range with the longer prefix (and thus with higher priority)
  • a 2 /p z remains untouched, while from .
  • a l p x only the right-hand side half remains.
  • a 2 /p 2 remains untouched while from A x I p x only the left-hand side half remains.
  • IPv4 CIDR Address Range priorities can be assigned in the order of their prefix length, that is, the longer the prefix, the higher the priority.
  • IPv4 CIDR Address Ranges are assigned one of 32 possible priorities, such that there can be different IPv4 CIDR Address Ranges which are assigned the same priority (or have the same prefix length). This is, however, of no consequence, as previously explained herein, since IPv4 CIDR Address Ranges having the same prefix value are always non-overlapping.
  • each IPv4 CIDR address must be converted to a Range, using the formula Alp ⁇ [A, A + 2 32 ⁇ p ) wherein A ⁇ a ⁇ 2 32 ⁇ p as was described hereinbefore. Any further steps depend on whether the Post-Processing or the Pre-Processing method is used.
  • the IPv4 CIDR Address Range entries are ordered according to their prefix-length (which reflects their priority), first, the ones with a prefix-length of 32, followed by those with a prefix-length of 31, and of 30,..., and finally those with prefix-length of 0 at the bottom.
  • the Zero prefix-length is defined as a Default Search Result, and applies if no higher priority Match exists,- and therefore only a single zero prefix length entry is meaningful.

Abstract

L'invention porte sur un procédé et un appareil d'agencement et de stockage dans une mémoire associative d'un ensemble de données de clés associatives d'éléments associatifs et d'un ensemble correspondant de données associées des éléments associés. Chaque élément associatif correspond à une plage de valeurs consécutives de sorte qu'un élément associé puisse être extrait de la mémoire sous forme de données valides si une clé associative appartient à son élément associatif, la plage étant représentée par ses valeurs extrêmes inférieures et supérieures. Une mémoire permet de stocker l'ensemble des données de clés associatives et l'ensemble de données associées qui comprend des première et seconde zones de stockage de sorte qu'il y ait à chaque emplacement de mémoire de la première zone de stockage un emplacement de mémoire correspondant dans la seconde zone de stockage. Les éléments associatifs de l'ensemble de données d'association de clés et leur ensemble de données associées correspondant sont agencés dans un ordre déterminé par priorité ou préséance de sorte que les éléments associatifs ayant une plus grande priorité soient placés avant les éléments associatifs ayant une moins grande priorité. Un index unique est affecté à chaque élément associatif de façon à représenter son emplacement. Au moins une des valeurs extrêmes de chaque élément associatif est mise en mémoire dans la première zone de mémoire dans un emplacement qui correspond à la priorité de l'élément associatif. Chaque valeur de l'ensemble de données associé est mise en mémoire dans un emplacement de la seconde zone de mémoire qui correspond à l'emplacement de l'élément associatif auquel il est associé. Des valeurs de données associées sont extraites de la mémoire lors de la recherche d'une clé sur les données de clés associatives. A la réception d'une clé d'entrée, un ou plusieurs éléments associatifs pouvant contenir la clé d'entrée sont recherchés, et si on ne trouve aucun de ces éléments associatifs, un signal d'erreur est émis pour indiquer que les données associées émises sont invalides. Si la clé d'entrée est contenue dans un ou plusieurs éléments associatifs, les données associées correspondant à l'élément associatif ayant la plus haute priorité et qui contient la clé d'entrée, et un signal de correspondance indiquant que les données associées en cours d'émission sont valides, sont émis.
PCT/IL2001/000595 2001-06-28 2001-06-28 Memoire adressable par son contenu constituee de plages WO2003003250A1 (fr)

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WO2007072083A1 (fr) 2005-12-23 2007-06-28 Prosidion Limited Traitement du diabete de type 2 par combinaison d'un inhibiteur de dpiv a de la metformine ou de la thiazolidinedione
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EP3366283A1 (fr) 2004-01-20 2018-08-29 Novartis AG Formulation de compression directe et procédé
WO2018162722A1 (fr) 2017-03-09 2018-09-13 Deutsches Institut Für Ernährungsforschung Potsdam-Rehbrücke Inhibiteurs de dpp-4 à utiliser dans le traitement de fractures osseuses
CN114615216A (zh) * 2022-03-11 2022-06-10 深圳市风云实业有限公司 一种基于交换芯片的路由表动态调整方法

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2839832A2 (fr) 2003-11-17 2015-02-25 Novartis AG Utilisation d'inhibiteurs de la dipeptidyl peptidase IV
EP3366283A1 (fr) 2004-01-20 2018-08-29 Novartis AG Formulation de compression directe et procédé
EP3738585A1 (fr) 2004-01-20 2020-11-18 Novartis Ag Formulation de compression directe et procédé
WO2007072083A1 (fr) 2005-12-23 2007-06-28 Prosidion Limited Traitement du diabete de type 2 par combinaison d'un inhibiteur de dpiv a de la metformine ou de la thiazolidinedione
WO2018162722A1 (fr) 2017-03-09 2018-09-13 Deutsches Institut Für Ernährungsforschung Potsdam-Rehbrücke Inhibiteurs de dpp-4 à utiliser dans le traitement de fractures osseuses
CN114615216A (zh) * 2022-03-11 2022-06-10 深圳市风云实业有限公司 一种基于交换芯片的路由表动态调整方法

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