WO2002099898A3 - Distribution optique de signal d'horloge - Google Patents

Distribution optique de signal d'horloge Download PDF

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Publication number
WO2002099898A3
WO2002099898A3 PCT/US2001/049484 US0149484W WO02099898A3 WO 2002099898 A3 WO2002099898 A3 WO 2002099898A3 US 0149484 W US0149484 W US 0149484W WO 02099898 A3 WO02099898 A3 WO 02099898A3
Authority
WO
WIPO (PCT)
Prior art keywords
monocrystalline
integrated circuit
layer
growing
oxide
Prior art date
Application number
PCT/US2001/049484
Other languages
English (en)
Other versions
WO2002099898A2 (fr
Inventor
Timothy Joe Johnson
Kevin B Traylor
Duane C Rabe
Barbara Foley Barenburg
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to AU2002246741A priority Critical patent/AU2002246741A1/en
Publication of WO2002099898A2 publication Critical patent/WO2002099898A2/fr
Publication of WO2002099898A3 publication Critical patent/WO2002099898A3/fr

Links

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12004—Combinations of two or more optical elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G06F1/105—Distribution of clock signals, e.g. skew in which the distribution is at least partially optical
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8258—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/12107—Grating
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12166—Manufacturing methods
    • G02B2006/12169—Annealing

Abstract

Des couches épitaxiales de haute qualité de matières monocristallines (132, 166, 170) peuvent être tirées sur des substrats monocristallins (110, 161, 3811) par la formation d'un substrat déformable pour le tirage de couches monocristallines. Une manière d'obtenir cette déformabilité consiste à d'abord tirer sur une tranche de silicium une couche intermédiaire d'accès facile (124, 164) constituant une couche d'oxyde monocristallin espacée de la tranche de silicium par une couche d'interface amorphe (122, 162) d'oxyde de silicium. La couche d'interface amorphe (122, 162) dissipe la tension mécanique et permet le tirage d'une couche tampon recevant l'oxyde monocristallin de haute qualité (124, 164). Ainsi, un circuit intégré (3810, 160, 4200) qui distribue ses signaux d'horloge de manière optique est prévu. Le circuit intégré (3810, 160, 4200) comporte, de préférence, plusieurs circuits CMOS numériques (181, 3814, 3815) qui sont constitués, de préférence, de structures à composé semi-conducteur (3812).
PCT/US2001/049484 2001-06-01 2001-12-27 Distribution optique de signal d'horloge WO2002099898A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002246741A AU2002246741A1 (en) 2001-06-01 2001-12-27 Integrated circuit for optical clock signal distribution

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/870,831 US20020181825A1 (en) 2001-06-01 2001-06-01 Optical clock signal distribution
US09/870,831 2001-06-01

Publications (2)

Publication Number Publication Date
WO2002099898A2 WO2002099898A2 (fr) 2002-12-12
WO2002099898A3 true WO2002099898A3 (fr) 2003-11-06

Family

ID=25356148

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/049484 WO2002099898A2 (fr) 2001-06-01 2001-12-27 Distribution optique de signal d'horloge

Country Status (3)

Country Link
US (1) US20020181825A1 (fr)
AU (1) AU2002246741A1 (fr)
WO (1) WO2002099898A2 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6931003B2 (en) * 2000-02-09 2005-08-16 Bookline Flolmstead Llc Packet prioritization protocol for a large-scale, high speed computer network
US7072534B2 (en) * 2002-07-22 2006-07-04 Applied Materials, Inc. Optical ready substrates
US7043106B2 (en) * 2002-07-22 2006-05-09 Applied Materials, Inc. Optical ready wafers
US7110629B2 (en) * 2002-07-22 2006-09-19 Applied Materials, Inc. Optical ready substrates
US7453129B2 (en) * 2002-12-18 2008-11-18 Noble Peak Vision Corp. Image sensor comprising isolated germanium photodetectors integrated with a silicon substrate and silicon circuitry
US20050016446A1 (en) * 2003-07-23 2005-01-27 Abbott John S. CaF2 lenses with reduced birefringence
WO2007027615A1 (fr) 2005-09-01 2007-03-08 Applied Materials, Inc. Technique d'arete pour la fabrication d'un capteur optique et d'un guide d'ondes optique
CN103367355A (zh) * 2012-04-09 2013-10-23 郭磊 一种时钟信号传输装置
CN115151849A (zh) 2020-01-29 2022-10-04 普赛昆腾公司 低损耗高效率光子移相器
CN115427855A (zh) 2020-03-03 2022-12-02 普赛昆腾公司 光子设备的制造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4667212A (en) * 1984-09-03 1987-05-19 Kabushiki Kaisha Toshiba Integrated optical and electric circuit device
EP0392714A2 (fr) * 1989-04-12 1990-10-17 Mitsubishi Denki Kabushiki Kaisha Dispositif laser à semi-conducteur
US5478653A (en) * 1994-04-04 1995-12-26 Guenzer; Charles S. Bismuth titanate as a template layer for growth of crystallographically oriented silicon
US5574744A (en) * 1995-02-03 1996-11-12 Motorola Optical coupler

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4667212A (en) * 1984-09-03 1987-05-19 Kabushiki Kaisha Toshiba Integrated optical and electric circuit device
EP0392714A2 (fr) * 1989-04-12 1990-10-17 Mitsubishi Denki Kabushiki Kaisha Dispositif laser à semi-conducteur
US5478653A (en) * 1994-04-04 1995-12-26 Guenzer; Charles S. Bismuth titanate as a template layer for growth of crystallographically oriented silicon
US5574744A (en) * 1995-02-03 1996-11-12 Motorola Optical coupler

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"INTEGRATION OF GAAS ON SI USING A SPINEL BUFFER LAYER", IBM TECHNICAL DISCLOSURE BULLETIN, IBM CORP. NEW YORK, US, vol. 30, no. 6, November 1987 (1987-11-01), pages 365, XP000952091, ISSN: 0018-8689 *

Also Published As

Publication number Publication date
US20020181825A1 (en) 2002-12-05
AU2002246741A1 (en) 2002-12-16
WO2002099898A2 (fr) 2002-12-12

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