WO2002090892A2

WO2002090892A2 - Conditioning device for an analog transducer

Info

Publication number: WO2002090892A2
Application number: PCT/EP2002/004395
Authority: WO
Inventors: Carlo Carli
Original assignee: Marposs Società per Azioni
Priority date: 2001-05-07
Filing date: 2002-04-22
Publication date: 2002-11-14
Also published as: ITBO20010269A0; WO2002090892A3; AU2002304680A8; AU2002304680A1; ITBO20010269A1

Abstract

A device for conditioning the output signal (V2OUT) of an analog transducer (1), includes an energizing section (F2) and a detecting section (D2) with a comparator (COMP), a synchronous memory (FF), a timer (T), and a low pass filter (R,C).A digital output signal (VQ) - that is available at an output terminal (TO) and is controlled by the synchronous memory - and an analog output signal (VO) - that is provided by the low pass filter - are indicative of the amplitude of the transducer output signal. The synchronous memory is controlled by the comparator on the basis of a comparison between the transducer signal and an analog signal at the output terminal, the latter being provided through a feedback ring.

Description

DESCRIPTION

«CONDITIONING DEVICE FOR AN ANALOG TRANSDUCER»

Technical Field

The present invention relates to a conditioning device for a transducer providing an analog signal, for example a linear inductive transducer, with a detecting section for detecting said analog signal of the transducer, adapted for providing a corresponding analog output signal and including sampling devices.

Background Art

Analog transducers, for example of the inductive type, have been known from a long time and applied in many applications, for example in measuring heads in which there is detected the mutual position between movable parts. There are various types of known linear inductive transducers, among which the so-called "LVDT" ("Linear Variable Differential Transformer") and "HBT" ("Half Bridge Transducer") , that have common features, among which windings energized by alternating current signals, a core movable relative to the windings and means for detecting the features of the induced (or auto-induced) signal at the ends of one or more windings, features that vary in a substantially linear way as the position between core and windings varies. Power supply and processing circuits are associated with the transducers for achieving the required energizing and for processing the induced signal for the purposes of obtaining a continuous signal containing the information regarding the mutual position between core and windings, and that can be utilized by the display and/or further processing devices. The known conditioning devices including similar power supply and processing circuits can also comprise components that perform the analog/digital conversion of the signal containing the requested information, for the direct connection to digital type processing units. In some of these devices, the continuous signal is achieved by a synchronous demodulation including operations for the sampling and for the analog/digital conversion of the transducer output signal, in addition to amplifications in one or more steps of the processing and filtering for improving the signal/noise ratio. An inductive transducer of the HBT (or "half-bridge") type and an associated known conditioning device are shown in figure 1. The inductive transducer 1 includes a pair of windings 2, connected together in series, and a ferromagnetic core 3, movable in a direction X. The windings 2 of the transducer 1 are energized, through the input terminals TI and T2, by the components of a power supply section FI, including two sinusoidal voltage generators in phase-opposition VSl and VS2. A detecting section Dl of the output signal of transducer 1, the latter signal being acquired through terminal T3, includes an amplifier Al, a "sample and hold" device SH shown in simplified form by a switch and a capacitor, an additional amplifier A2, a low pass filter PB, an analog/digital converter A/D, a timer Tτl for applying a delay τl to the sinusoidal voltage at its input, a pulse generator PG, for generating pulses adapted for controlling the opening and the closure of the device SH, an additional timer Tτ2 for generating a delay τ2 to the output signal of the pulse generator PG and controlling the start of the conversion by the analog/digital converter A/D. The two sinusoidal voltages VSl and VS2 in phase opposition energize the windings 2, where there is a sinusoidal voltage with double amplitude with respect to that of VSl and VS2 between the input terminals TI and T2. As known, at the output of transducer 1 (terminal T3) there is a sinusoidal voltage the amplitude of which depends on the displacement X of core 3 with respect to the windings 2 and the phase of which depends on the direction of said displacement. Said voltage is amplified by amplifier Al and sampled by the "sample and hold" device SH, the opening and closure of which are controlled by the signal output by the pulse generator PG. Thanks to a suitable setting of the timer Tτl, the generator PG sends a sequence of pulses centered on the instants at which the output voltage of transducer 1 has peaks. In this way, the "sample and hold" device SH samples the output voltage of the transducer, amplified by amplifier Al, at its maximum amplitude and keeps it memorized till the subsequent sampling instant. Thus the signal at the output of the "sample and hold" device SH is a continuous analog representation of the measurement taken by transducer 1. The analog signal at the output of the "sample and hold" device SH is thereafter amplified (block A2) , filtered by the low pass filter PB, and sent to the analog digital converter A/D. The start of the conversion of the signal is controlled by a signal (output of block Tτ2) achieved by delaying, for a time τ2, the output signal of the pulse generator PG. The start of the conversion is delayed, with respect to the sampling instant of the "sample and hold" device SH for enabling the stabilizing of the output signal of the low pass filter PB. A detecting section of this type involves the utilization of expensive components like the amplifiers and the analog/digital converter. Furthermore, components like the sample and hold device and the analog/digital converter have high voltage consumption and for this reason generally require a double power supply voltage (+VCC and -VCC) with a rather high value, typically 10V. Lastly, as these components have considerable layout dimensions, the casing of the conditioning device may consequently be bulky.

Disclosure of Invention

An object of the present invention is to provide a device for conditioning the signal of an analog transducer, that utilizes inexpensive components, is particularly economic on the whole, requires a low consumption of current and can utilize a single and relatively low power supply voltage, for example in the order of 4-5V. Another object of the invention is to provide a particularly compact conditioning device.

These and other objects are achieved by a device for the conditioning of the signal of an analog transducer according to claim 1. Among the advantages that a conditioning device according to the invention provides, with respect to the known devices, there is the immediate achieving of an output digital signal too, without there being the need to convert an analog signal. Furthermore, the possibility to operate with low power supply voltage enables to exploit the power supply of the circuits for the subsequent logic processing of the signal, like the one available at the input of a personal computer. The ratiometricity features, in other terms the full proportionality between amplitude of the power supply voltage and output analog signal, guaranteed by the specific configuration of the devices according to the present invention, enable to utilize the power supply voltage of the device as reference for the subsequent processings of the output analog signal. Furthermore, the sequence of numerical values of the digital output does not depend on the exact value of the power supply voltage of the device, but just on the position of the core of the transducer with respect to the windings.

Brief Description of the Drawings

The invention is now described in more detail with reference to the enclosed sheets of drawings, given by way of non-limiting example, wherein: figure 1 is a block diagram of a transducer and a known device for conditioning the output signal of the transducer; figure 2 is a block diagram of a transducer and a device for conditioning the output signal of the transducer according to the present invention; figures 3-14 are the graphs of some signals generated by the components shown in figure 2; figure 15 is a block diagram of a transducer and a conditioning device according to another embodiment of the invention; and figure 16 is a block diagram of a digital low pass filter for processing the digital output signal of the devices of figures 2 and 15.

Best Mode for Carrying Out the Invention

In the block diagram of figure 2 there is shown, in simplified form, a conditioning device connected to the inductive transducer 1, also shown in figure 1. The transducer 1 is fed, through the input terminals TI and T2, by the components of an energizing portion F2 and its output signal, taken at terminal T3, the latter being arranged in an intermediate position between the two windings 2, is processed by the components of a detecting section D2.

The energizing section F2 includes an oscillator OSC, that generates a voltage VOSC with a square wave shape that is shown in figure 3, and two buffers Bl and B2, that receive at their inputs voltage VOSC and output, respectively, a voltage VB1 with identical trend as VOSC (figure 4), and a voltage VB2 in phase opposition with respect to VB1 (figure 5) . Therefore, when the output voltage VBl has a high logic value, the output voltage VB2 has a low logic value and vice versa.

The output voltages VBl and VB2 control two switches II and 12 that enable to connect terminals TI and T2 to the power supply voltage VCC or to ground. As the output voltages VBl and VB2 are in phase opposition, when switch II connects terminal TI to the power supply voltage VCC, switch 12 connects the terminal T2 to ground and vice versa. Thus, there is a voltage V2IN, between the input terminals Tl and T2 of the windings 2, that has double peak to peak amplitude with respect to the voltage VCC and null mean value, as per the graph shown in figure 6. The detecting section D2 includes sampling devices with a comparator COMP, digital memorizing and switching circuits MS with a synchronous memory FF achieved by means of a D- type flip-flop (with control on the front of the clock signal) and a pair of switches SI, S2, a timer T, filtering circuits with a low pass filter consisting of a resistor R and a capacitor C and a feedback ring FB.

The output analog signal, in particular a voltage V20UT, of transducer 1, drawn at terminal T3, is a square wave with mean value VCC/2, amplitude proportional to the power supply voltage VCC and to the deviation of core 3 relative to a zero position, symmetric with respect to the windings 2, the phase of which depends on the direction of the displacement X of core 3 with respect to windings 2. In figures 7, 8 and 9 there are shown, as an example, possible shapes of the voltage V20UT corresponding, respectively, to a position of core 3, with respect to the windings, displaced towards the negative direction of axis X, to the former zero position and to a position of core 3 with respect to the windings displaced in the positive direction of axis X, at a distance, with respect to zero position, greater in terms of absolute value with respect to the one shown in the graph of figure 7. In the first case V20UT is in phase with voltage V2IN, in the second case V20UT is identical to VCC/2, apart from a possible minor difference due to electromagnetic asymmetries of the transducer, and in the third case V20UT is in phase opposition with respect to the signal V2IN, with greater amplitude with respect to that of the signal of figure 7. Thereafter, the output voltage V20UT of transducer 1 is sent to comparator COMP that compares it with the voltage VO output from the low pass filter and outputs a voltage VCOMP with high logic value if the amplitude of the signal V20UT is greater than that of the signal VO and with low logic value otherwise. Memory FF controls the closure of either one or the other switches SI and S2, for alternatively connecting the output terminal TO to the power supply voltage VCC or to ground, on the basis of the signal output by comparator COMP, taken at the moment of the sampling. By means of this operation it is possible to carry out a sampling that provides at the output terminal TO a voltage VQ that is a one-bit numerical representation of the signal V20UT provided by transducer 1. The variations in the condition of the controls output by memory FF occur in a synchronous way at the upward fronts of signal VT, shown in figure 13, obtained by signal VOSC delayed by the timer circuit T of an interval τ. The sampling instants are chosen with suitable delay (τ) with respect to the upward fronts of the signal VOSC for preventing peaks and oscillations immediately following the upward and downward fronts of the power supply voltage V2IN and distortions of the wave shape, with respect to the ideal shape shown in the figures, from negatively affecting the detectings. Furthermore, in order to minimize the effects of both the closure resistances of switches II and 12 and of the resistances of the windings 2, it is convenient for sampling to occur substantially at the instants in which current I, that flows in windings 2, has a value close to zero. As shown in figure 10, the current I has the shape of a triangular wave crossing the zero axis at displaced instants with respect to the upward and downward fronts of the voltage V20UT. Therefore, the voltage VQ at output terminal TO has low or high logic value depending on whether voltage VCOMP output by comparator COMP has low or high logic value at the instants when sampling occurs, in other terms the output voltage V20UT has a value that is above or below VO at the instant when sampling occurs,

In order to better clarify the operation of the components of the detecting section D2, figure 11 shows the graph of the voltage V20UT, for example in the circumstance in which core 3 is displaced to the negative part of axis X, and the trend of VO.

Figures 12, 13 and 14 show the corresponding trend of the signals VCOMP, VT and VQ. According to the example shown in figures 11-14, at the initial instant, VQ and VCOMP have high logic value and, as a consequence of the value of VQ, voltage VO is increasing. Owing to the fact that instant by instant signal VCOMP is at high logic level if voltage V20UT is greater than VO, and at low logic level in the opposite case, as soon as the value of VO exceeds that of V20UT, VCOMP switches to low logic level (indicated as instant tl in figures 11 and 12) . At the subsequent sampling instant (instant t2) , the output of memory FF controls switch S2 and the signal VQ at terminal TO takes low logic level. The capacitor C starts to discharge and VO to decrease, until it falls below the value V20UT (instant t3) and VCOMP switches to high logic level. At the following sampling instant (instant t4) , the value of VQ switches to high logic level, thereby enabling capacitor C to charge and VO to increase.

The signal VO at the output of the low pass filter is the mean value of the values provided at the output terminal TO and is about the value of the output voltage of transducer V20UT at the sampling instants, but for an error which has the maximum value that inversely depends on the sampling frequency and on the time constant RC of the filter. By suitably choosing the sampling frequency and the values of R and C, it is thus possible to reduce said error below a desired value. In figure 11 the time constant RC has been chosen exaggeratedly small for the purpose of evidencing the shape of VO. As the output terminal TO is alternatively connected, by means of switches Si and S2, to the power supply voltage VCC and to ground, voltage VQ can take the value of the power supply voltage VCC of transducer 1 or 0 value. As a consequence, the voltage VO output by the low pass filter can take values included between 0 and VCC (value of the power supply signal) . As the output signal V20UT of the transducer is proportional to the power supply voltage, the apparatus is completely ratiometric. Owing to the limited sensitivity of the transducers, the range of values covered by VO, in the case of core 3 displacing between two extreme positions, does not extend to the entire range from 0 to VCC, but it covers just a small range of values centered about VCC/2. Therefore, it can be convenient to amplify voltage VO for enhancing its possible displacements with respect to VCC/2. In order to achieve this, it is not necessary to add an amplifier, but it is sufficient to modify the diagram of figure 2, as shown in the detecting section D2' in figure 15, where the feedback ring FB' is connected to the output terminal TO and includes filtering and attenuation devices, for example achieved by means of resistors Rl, R2 and R3 and capacitor C . The resistors Rl, R2, R3 and the capacitor C are chosen so that, by identifying with R123 the resistance equivalent to the parallel between Rl, R2 and R3, there be checked the equality R123 C'=RC. In this case comparator COMP carries out a comparison between the output voltage V20UT and a signal with attenuated amplitude, with respect to VO, of the amount R2/(2R1+R2). By suitably choosing the values of the resistances and of the capacitor, among those that satisfy the previous equality, it is consequently possible to amplify the output voltage VO of the required amount.

Furthermore, figure 15 shows a different embodiment of the digital memorizing and switching circuits MS' , that include a flip-flop FF' achieved in C-MOS technology and do not foresee the presence of switches Si and S2. The flip-flop FF' , directly connected to the power supply voltage VCC, directly provides to the output terminal TO a high value equal to the amplitude of VCC or a low value equal to zero depending on the value present at input D at the moment of the sampling. The two-level signal VQ is a one-bit numeric representation of the output signal of transducer 1. More, specifically, its mean value, in other terms the ratio existing between the number of bits at high logic level and the total number of bits, within a specific time range, is proportional to the output signal V20UT of the transducer 1 at the sampling instants .

The former VQ signal can be converted, for example in a N- bit binary code, by utilizing a plain low pass digital filter F, as the one schematically shown in figure 16, that includes a binary counter Cl, a binary counter C2, a register R and an inverter. The counter Cl that receives at its input signal VOSC, is a N-bit counter. At every downward front of VOSC, Cl updates its count and, once the end of the count has been reached, re-sets counter C2. In practice Cl counts a number 2^N of periods of the signal VOSC and thus re-sets C2 and concurrently enables the transfer of the count at which C2 has reached in register R. C2 is a N-bit counter, that updates its count only if, at the upward fronts of VOSC, VQ takes a high logic value. In practice, C2 counts the number Nl of periods in which the signal VQ takes a high logic value in 2 periods of the signal VOSC. Thus, at the output of register R there is available a signal bl...bN in numeric form, indicative of the measurement taken by the transducer, with binary N-bit coding.

The digital filter F can be both achieved with discrete inexpensive components and implemented by software and can have a structure that differs from the one herein described, as long as the achieved transfer function be of the low pass type, with finite gain at null frequency. For example there are utilized known filters of the so-called "finite impulse response" or "F.I.R." type, or of the so- called "infinite impulse response" or "I.I.R." type. A number of variants is possible with respect to the above described embodiments. For example, the supply of the windings can be of the sinusoidal type, instead of the square wave type. In the illustrated example a square wave supply has been chosen because it costs less and has a reduced consumption of current. This enables to increase the advantages in terms of costs and consumption, advantages that are already relevant for the described embodiments of the detecting section.

In specific applications, for the purposes of improving the signal/noise ratio, the detecting section of a conditioning device according to the present invention can include one or more amplifiers, for example between the output of the transducer and the input of comparator COMP. Even if the addition of one or more amplifiers increases costs and consumption, the embodiment is in any case definitely more convenient and, in general, advantageous with respect to the known solutions that utilize "sample and hold" circuits and analog/digital converters.

A conditioning device according to the present invention consists of a few inexpensive components, has low consumption of current, does not require a high and/or double power supply voltage and outputs both analog and digital signals.

The fact that it consists of just a few components, enables its housing in a small-sized box (typically 1/3 the dimensions of a corresponding known conditioning device) , that includes inputs for the connection of one or more transducers. The transducers can also differ from the inductive transducer of the HBT type to which reference has been made in the description. For example, a conditioning device as the one described and illustrated can be utilized for an inductive transducer of another type, a capacitive transducer, a potentiometer or else. In some applications (for example in the event the transducer consists of a thermocouple) in which no power supply is required, the conditioning device does not include any power supply section.

A conditioning device of the illustrated type can be directly connected to a "personal computer", for example by means of a USB ("Universal Serial Bus") port, for subsequent processings and displays. In this case, thanks to the low power supply voltage required, the conditioning device can be directly supplied by the personal computer, by means of the above mentioned port, thereby not requiring a dedicated power supply unit.

The digital output signal VQ can be easily utilized for the remote transmission to a digital filter as the one shown in figure 16 and/or to a low pass filter similar or identical to the one shown in figures 2 and 15 and/or to any whatsoever processing and display unit, for example by optical or radio-frequency transmission.

Claims

1. A conditioning device for a transducer (1) providing an analog signal (V20UT) , for example a linear inductive transducer, with a detecting section (D2,D2') for detecting said analog signal (V20UT) of the transducer (1) , adapted for providing a corresponding analog output signal (VO) and including sampling devices, characterized in that said sampling devices include " a comparator (COMP) ,

^■ digital memorizing and switching circuits (MS,MS') adapted for providing, at an output terminal (TO) , a digital output signal (VQ) , and

^■ filtering circuits (RC) connected to the memorizing and switching circuits (MS,MS') and adapted for providing said analog output signal (VO) , the memorizing and switching circuits (MS,MS') being connected to the output of the comparator (COMP) , the inputs of the comparator (COMP) being coupled to the transducer (1) and, by means of a feedback ring (FB,FB'), to said output terminal (TO) .

2. The conditioning device according to claim 1, wherein the digital memorizing and switching circuits include a synchronous memory (FF) , achieved by means of a flip-flop.

3. The conditioning device according to claim 2, wherein said sampling devices include a timer circuit (T) connected to the synchronous memory (FF) for defining instants of sampling (fc2,t4).

4. The conditioning device according to one of the preceding claims, wherein the feedback ring (FB) is adapted for providing at the input of the comparator (COMP) said analog output signal (VO) .

5. The conditioning device according to one of claims 1 to 3, wherein said feedback ring (FB' ) includes filtering and attenuation devices (R1,R2,R3,C ) .

6. The conditioning device according to one of the preceding claims, wherein said filtering circuits include a low pass filter that includes a resistor (R) and a capacitor (C) .

7. The conditioning device according to one of the preceding claims, wherein the detecting section includes a digital low pass filter (F) connected to the digital memorizing and switching circuits and adapted for receiving said digital output signal (VQ) and for providing a digital signal (bl...bN) with N-bit code.

8. The conditioning device according to claim 7, wherein said digital low pass filter (F) includes two counters (C1,C2) and a register (R) .

9. The conditioning device according to one of the preceding claims, including an energizing section (F2) adapted for providing the power supply to the transducer.

10. The conditioning device according to claim 9, for an inductive linear transducer, wherein said energizing section (F2) includes an oscillator (OSC) adapted for generating a square wave power supply.