WO2002089191A3 - Improvement of titanium disilicide resistance in narrow active regions of semiconductor devices - Google Patents
Improvement of titanium disilicide resistance in narrow active regions of semiconductor devices Download PDFInfo
- Publication number
- WO2002089191A3 WO2002089191A3 PCT/IB2002/001344 IB0201344W WO02089191A3 WO 2002089191 A3 WO2002089191 A3 WO 2002089191A3 IB 0201344 W IB0201344 W IB 0201344W WO 02089191 A3 WO02089191 A3 WO 02089191A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- oxide
- improvement
- semiconductor devices
- substrate
- active regions
- Prior art date
Links
- DFJQEGUNXWZVAH-UHFFFAOYSA-N bis($l^{2}-silanylidene)titanium Chemical compound [Si]=[Ti]=[Si] DFJQEGUNXWZVAH-UHFFFAOYSA-N 0.000 title abstract 3
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 229910021352 titanium disilicide Inorganic materials 0.000 title 1
- 238000000151 deposition Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- 229910008479 TiSi2 Inorganic materials 0.000 abstract 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 abstract 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 abstract 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract 1
- 239000000470 constituent Substances 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052760 oxygen Inorganic materials 0.000 abstract 1
- 239000001301 oxygen Substances 0.000 abstract 1
- 238000000059 patterning Methods 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 abstract 1
- 125000006850 spacer group Chemical group 0.000 abstract 1
- 229910052719 titanium Inorganic materials 0.000 abstract 1
- 239000010936 titanium Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
- H01L21/28518—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002586392A JP4248882B2 (en) | 2001-04-26 | 2002-04-12 | Method for improving the resistance of titanium disilicide in the pinch active region of semiconductor devices. |
EP02722596A EP1419522A2 (en) | 2001-04-26 | 2002-04-12 | Improvement of titanium disilicide resistance in narrow active regions of semiconductor devices |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP01201538 | 2001-04-26 | ||
EP01201538.4 | 2001-04-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002089191A2 WO2002089191A2 (en) | 2002-11-07 |
WO2002089191A3 true WO2002089191A3 (en) | 2004-03-04 |
Family
ID=8180219
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IB2002/001344 WO2002089191A2 (en) | 2001-04-26 | 2002-04-12 | Improvement of titanium disilicide resistance in narrow active regions of semiconductor devices |
Country Status (6)
Country | Link |
---|---|
US (1) | US6630399B2 (en) |
EP (1) | EP1419522A2 (en) |
JP (1) | JP4248882B2 (en) |
KR (1) | KR20030095953A (en) |
CN (1) | CN1255863C (en) |
WO (1) | WO2002089191A2 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI241652B (en) * | 2002-08-13 | 2005-10-11 | Lam Res Corp | Method for hard mask CD trim |
US6825529B2 (en) * | 2002-12-12 | 2004-11-30 | International Business Machines Corporation | Stress inducing spacers |
KR100732860B1 (en) * | 2004-12-14 | 2007-06-27 | 동부일렉트로닉스 주식회사 | Method for ashing the Semicondutor substrate after oxide |
CN104538439A (en) * | 2015-01-19 | 2015-04-22 | 北京大学 | High-temperature-resistant ohmic contact electrode structure and processing method thereof |
CN106033718A (en) * | 2015-03-15 | 2016-10-19 | 中国科学院微电子研究所 | Formation method for metal silicide |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5306671A (en) * | 1990-07-09 | 1994-04-26 | Mitsubishi Denki Kabushiki Kaisha | Method of treating semiconductor substrate surface and method of manufacturing semiconductor device including such treating method |
JPH07142447A (en) * | 1993-11-16 | 1995-06-02 | Kawasaki Steel Corp | Fabrication of semiconductor device |
US5681780A (en) * | 1994-05-23 | 1997-10-28 | Fujitsu Limited | Manufacture of semiconductor device with ashing and etching |
EP0945897A1 (en) * | 1998-03-25 | 1999-09-29 | Texas Instruments Incorporated | Organic gate sidewall spacers |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5868854A (en) * | 1989-02-27 | 1999-02-09 | Hitachi, Ltd. | Method and apparatus for processing samples |
US6376384B1 (en) * | 2000-04-24 | 2002-04-23 | Vanguard International Semiconductor Corporation | Multiple etch contact etching method incorporating post contact etch etching |
US6444404B1 (en) * | 2000-08-09 | 2002-09-03 | Taiwan Semiconductor Manufacturing Company | Method of fabricating ESD protection device by using the same photolithographic mask for both the ESD implantation and the silicide blocking regions |
-
2002
- 2002-04-12 KR KR1020027017534A patent/KR20030095953A/en not_active Application Discontinuation
- 2002-04-12 EP EP02722596A patent/EP1419522A2/en not_active Withdrawn
- 2002-04-12 JP JP2002586392A patent/JP4248882B2/en not_active Expired - Fee Related
- 2002-04-12 CN CNB028013433A patent/CN1255863C/en not_active Expired - Fee Related
- 2002-04-12 WO PCT/IB2002/001344 patent/WO2002089191A2/en active Application Filing
- 2002-04-23 US US10/128,637 patent/US6630399B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5306671A (en) * | 1990-07-09 | 1994-04-26 | Mitsubishi Denki Kabushiki Kaisha | Method of treating semiconductor substrate surface and method of manufacturing semiconductor device including such treating method |
JPH07142447A (en) * | 1993-11-16 | 1995-06-02 | Kawasaki Steel Corp | Fabrication of semiconductor device |
US5681780A (en) * | 1994-05-23 | 1997-10-28 | Fujitsu Limited | Manufacture of semiconductor device with ashing and etching |
EP0945897A1 (en) * | 1998-03-25 | 1999-09-29 | Texas Instruments Incorporated | Organic gate sidewall spacers |
Non-Patent Citations (1)
Title |
---|
PATENT ABSTRACTS OF JAPAN vol. 1995, no. 09 31 October 1995 (1995-10-31) * |
Also Published As
Publication number | Publication date |
---|---|
EP1419522A2 (en) | 2004-05-19 |
JP4248882B2 (en) | 2009-04-02 |
CN1255863C (en) | 2006-05-10 |
CN1520608A (en) | 2004-08-11 |
WO2002089191A2 (en) | 2002-11-07 |
KR20030095953A (en) | 2003-12-24 |
US20020197861A1 (en) | 2002-12-26 |
JP2004528715A (en) | 2004-09-16 |
US6630399B2 (en) | 2003-10-07 |
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