REGULAR DEVICE FIELD OF INVENTION
The present invention relates to a regulator device.
More particularly, the present invention relates to a regulator device for regulating loads on an electrical power supply.
BACKGROUND TO INVENTION
An electrical power supply is used to provide electricity to electrical appliances. The electricity can be supplied in numerous forms, e.g. via continuous connection to an electricity provision company, such as ESKOM, or in the form of chemical batteries.
Conventionally, when various electrical appliances are operatively connected to a battery, each of the appliances draws its maximum required power. A normal, single use battery supplies this power continuously until it is fully depleted. The appliances therefore, at certain times, operate at less than full performance and this may cause damage to the appliances.
A rechargeable battery is adapted to provide sufficient power for operating all the appliances, to which it is connected, at full performance. Once the amount of power is no longer sufficient to allow full performance, the battery is deactivated and will not provide any power to any of the connected appliances.
However, there is often sufficient power remaining in the battery to operate at least some of the appliances that draw less power. If the larger power load appliances are disconnected, the smaller power load appliances can still be operated satisfactorily.
Furthermore, rechargeable batteries are relatively often used in photovoltaic systems for storing solar energy. Such batteries can be for example lead-acid batteries. It is necessary to protect these batteries against excessive depletion or over-discharge as well as against over-charging.
It is an object of the invention to suggest a regulator device, which will assist in overcoming these problems.
SUMMARY OF INVENTION
According to the invention, a regulator device for controlling a number of load circuits joined to a power supply, includes an input connector adapted to be operatively joined to a power supply; at least two output connectors operatively associated with the input connector, each output connector being adapted to be operatively joined to a load circuit; and a regulatory circuit associated with the input connector and each output connector, the regulatory circuit being adapted to selectively operatively connect or disconnect any one or more of the output connectors from the power supply.
The regulator device may be adapted to regulate from two to seven output connectors.
The regulator device may be adapted to regulate five output connectors.
The regulatory circuit may be adapted to disconnect an output connector if power supplied by the power supply is no longer sufficient to operate a load circuit associated with that output connector.
The regulatory circuit may include a current detection and amplification part, a signal routing part, a processor and an execution part.
The signal routing part may be adapted to switch between a current detection mode, in which the processor determines whether a load circuit requires more
power than is supplied by the power supply, and a switching mode, in which a load circuit is connected or disconnected from the power supply.
Each load circuit may be disconnected by an electronic switch, such as a flip flop switch or a processor.
Each load circuit may have a different power rating from each other load circuit.
Each load circuit may include more than one electrical appliance.
Any two of the output connectors may be connected in parallel and may be adapted to provide power to a single load circuit.
The power supply may be a battery.
The battery may be a rechargeable battery.
The battery may be adapted to be recharged by an external power source.
The external power source may include photovoltaic cells.
The photovoltaic cells may be in the form of a solar panel array.
The regulator device may be adapted to operatively connect at least one of the output connectors when power supplied by the external power source falls below a required minimum value.
A method of regulating an array of load circuits including the steps of operatively joining at least two load circuits to a power supply; of measuring an amount of power supplied by the power source; of determining the power requirements of each load circuit; of determining whether sufficient power is supplied by the power source to operate each load circuit; and of selectively
operatively connecting or disconnecting any one or more of the load circuits so that maximum efficient use is made of the power supplied by the power supply.
BRIEF DESCRIPTION OF DRAWINGS
The invention will now be described by way of example with reference to the accompanying schematic drawings.
In the drawings there is shown in:
Figure 1 a schematic diagram of a first embodiment of a regulator device in accordance with the invention, shown operatively provided in an electrical network;
Figure 2 a block flow diagram of the functioning of the regulator device shown in Figure 1;
Figure 3 a current amplifier circuit diagram provided in the regulator device shown in Figure 1 ;
Figure 4 a battery voltage conversion circuit diagram provided in the regulator device shown in Figure 1;
Figure 5 a switching circuit diagram provided in the regulator device shown in Figure 1 ;
Figure 6 a schematic diagram of a second embodiment of a regulator device in accordance with the invention, shown operatively provided in an electrical network;
Figure 7 a block flow diagram of the functioning of the regulator device shown in Figure 6;
Figure 8 a current amplifier circuit diagram provided in the regulator device shown in Figure 6;
Figure 9 a battery voltage conversion circuit diagram provided in the regulator device shown in Figure 6;
Figure 10 a switching circuit diagram provided in the regulator device shown in Figure 6; and
Figure 11 a circuit diagram of a processor part and switching part of the regulator device shown in Figure 6.
DETAILED DESCRIPTION OF DRAWINGS
Referring to Figure 1, a first embodiment of a regulator device 10 in accordance with the invention is shown provided in an electrical network 12. The network 12 includes a power supply or battery 14 operatively joined to an input connector 16 of the regulator device 10. Various electrical load circuits, generally indicated by reference numeral 18, are each operatively joined to separate output connectors 20 of the regulator device 10. The regulator device 10 is adapted to support up to seven load circuits 18.1 ... 18.7. The load circuits 18.1 ... 18.7 can each include more than one electrical appliance 22.1 ... 22.7. The load circuits 18 can also have differing power ratings, such that for example the load circuit 18.1 draws more power than the load circuit 18.2.
Referring now to Figure 2, a block flow diagram of the functioning of the regulator device 10 is shown. The regulator device 10 includes a current detection and amplification part 24, a signal routing part 26, an analogue-to- digital converter 28, a processor 30 and an execution part 32.
A circuit diagram of the amplification part 24 is shown in Figure 3 and includes a first OP- AMP 34 powered by a 15 volt supply connected as a non-inverting
amplifier. Preferably the OP-AMP 34 is an LM2902 OP-AMP. There is a voltage drop of 200mV across each resistor Rl5R2 when a current of 20 Amp is present. An additional 5 Amp is added to the maximum expected current as a safety margin, as current peaks may form at times, causing the total current to be 25 Amp.
A gain of approximately 20 V/V should exist in the amplification part 24 and this can be achieved if the resistor Rt has a value of 1.2kΩ and the resistor R2 has a value of 22kΩ.
The voltage status of the battery 14 is determined using a circuit as shown in Figure 4. Only the upper 5 volt of the battery 14 affects its ability to provide power. This voltage band can be obtained by providing a second OP-AMP 36, connecting the inverting pin of the OP- AMP 36 to a Zener diode Dt, so as to hold the inverting pin at a constant 10 volt, and connecting the non-inverting pin of the OP-AMP 36 to the battery 14.
The resistors R3,R4,R5,R6 preferably have a value of lkΩ, causing the output voltage to be calculated as:
out Battery Zener
Due to the high input impedance of the OP-AMP 36, all the current will flow through the Zener diode D Thus the current must be limited to between 15% and 80% of the maximum allowable Zener diode current. Preferably the Zener diode Dt has a power rating of 300 mW. Thus the maximum allowable Zener current is 30 mAmp and therefore the current limiting resistor R7 must have a value of 220 Ω.
When the battery 14 is fully charged it will have a voltage of about 15 volt. When the battery 14 is fully discharged it will have a voltage of about 11 volt.
The signal routing part 26 is adapted to control which of the load circuits 18 is to be activated or deactivated, and includes a 2-4 line decoder chip (74AC139) 38 and a 3-8 line decoder chip (74HC138) 40. The 2-4 line decoder chip 38 is adapted to select between current detection 38.1 or switching 38.2 modes. If the current detection mode 38.1 is selected, then the 2-4 line decoder chip provides power to an analogue multiplexer (ADG508, IC3) 42, the analogue- to-digital converter (HI1172, IC5) 42 and a buffer (74HC541, IC6). The analogue multiplexer 42 multiplexes an analogue signal 44 obtained from the amplification part 24 into one line 46.
The analogue-to-digital converter 28 decodes the analogue signal 46 into a digital signal 48. A top reference voltage is set to 5 volt, which represents an approximate current of 25 Amp or a battery voltage of 15 volt. The bottom reference voltage is connected to ground allowing the full 5 volt that is obtained from the amplification part 24 to be decoded into a digital signal. A 1 μF capacitor is provided between the analogue supply voltage and the analogue ground. An additional 1 μF capacitor is provided between the digital supply voltage and the digital ground. These capacitors are adapted to prevent any voltage spikes from causing any unwanted triggering in the circuit, i.e. incorrecdy deactivating a load circuit 18.
The digital signal 48 is passed on to the processing part 30, which includes a PIC 16F84 microprocessor and biasing components. The processor 30 determines whether any one of the load circuits 18 is to be activated or deactivated. If no load circuit 18 is to be deactivated, the processor 30 provides loop information to the 2-4 line decoder chip 38 and to the analogue multiplexer 42.
If a load circuit is to be deactivated, the processor 30 provides the specific load circuit 18 information to the 2-4 line decoder chip 38 and the 3-8 line decoder
chip 40. The 2-4 line decoder chip 38 then selects the switching mode 38.2 and power is provided to the 3-8 line decoder chip 40.
The 3-8 line decoder chip 40 generates an output 50 for the execution part 32. The output 50 acts as a clock pulse for triggering a J/K flip flop switch (74HC73) 52, shown in Figure 4. A separate flip flop switch 52 is provided for each output connection 20. As the output of the 3-8 line decoder chip 40 will normally be high, the line which is selected by the binary number that is placed on the input of the 3-8 line decoder chip 40 will go low (GND). This will trigger the flip flop switch 52 and either activate or deactivate the corresponding output connection 20, depending on its previous state. When the 3-8 line decoder chip 40 is selected, the buffer (IC4) will be disabled and any change in its related load circuit 18 will have no effect on the analogue multiplexer 42.
The load circuits 18 are activated or deactivated by the flip flop switch 54, which is toggled between an ON and OFF state every time it is clocked by the output 50. The output of the flip flop switch 52 is fed to an OP-AMP 54 having a very large gain. This allows the 5 volt input of the flip flop switch 52 to be increased to an output of 15 volt, which is then used to turn a field effect transistor or FET (HUF75337) 56 ON or OFF. The ON resistance of the FET 56 decreases as the gate voltage of the FET 56 increases.
A recharge circuit is also provided to ensure that all the flip flop switches 52 in the regulator device 10 are reset when the regulator device 10 is switched ON. This recharge circuit includes a capacitor that acts as a momentary short when the circuit is switched ON and therefore causes all the flip flop switches 52 to be reset. Once the supply voltage is stable, the capacitor is charged and places a high around 66% of the capacitor voltage on the reset pin of each flip flop
switch 52. This recharge circuit is included within the design for each output connector 20.
In use, once the battery voltage falls below a value sufficient to provide enough power to operate all the appliances 20 on one of the load circuits 18, the regulator device 10 deactivates that circuit 18. This allows the remaining circuits 18 to continue working even when the battery 14 is almost discharged.
Referring now to Figure 6, a second embodiment of a regulator device 60 in accordance with the invention is shown provided in an electrical network 62. The network 62 includes a battery 64 and an external power source 66 operatively respectively joined to input connectors 68 and 70 of the regulator device 60. the power source 66 can be in the form of photovoltaic or solar panels used for generating electrical energy from the sun's rays.
Various electrical load circuits, generally indicated by reference numeral 72, are each operatively joined to separate output connectors 74 of the regulator device 60. The regulator device 60 is adapted to support up to five load circuits 72.1 ... 72.5. The load circuits 72.1 ... 72.5 can each include more than one electrical appliance 76.1 ... 76.5. The load circuits 72 can also have differing power ratings, such that for example the load circuit 72.1 draws more power than the load circuit 72.2 or vice versa.
The regulator device 60 includes a charging circuit 78 for charging the battery 64 from the power source 66. The charging circuit is adapted to automatically select a nominal system voltage of either 12 volt or 24 volt for the battery 64.
Referring now to Figure 7, a block flow diagram of the functioning of the regulator device 60 is shown. The regulator device 60 includes a current detection and amplification part 80, a voltage detection and amplification part 82, a processor 84 and an execution part 86.
A circuit diagram of the current amplification part 80.1 is shown in Figure 8 and includes a first OP-AMP 88 powered by the battery 64 connected as a subtracting amplifier. The OP-AMP 88 can be an LM2902 OP-AMP, while resistors Rl and R2 have resistances of 5kΩ and resistors R3 and R4 have 5 resistances of lOOkΩ.
A circuit diagram of the battery voltage and detection part 82 is shown in Figure 9. Only the upper 5 volt (for a 12 volt nominal system voltage) and the upper 10 volt (for a 24 volt nominal system voltage) of the battery 14 affects its ability to provide power. The voltage detection circuit 82 includes two OP- 10 AMP subtraction circuits and a switch Q5. The switch Q5 is adapted to indicate to the processor 84 whether a 12 volt or a 24 volt nominal system voltage is present.
A circuit diagram of the execution part 86.1 is shown in Figure 10. An OP- AMP 90 is configured as a comparator with a minimum switch-on voltage of 15 2.7 volt set by D2. The output voltage is limited to 10 volt by Dl. Also provided is a high power MOSFET Ql, which can be a HUF75337.
The circuit diagram of the charging circuit 78 is similar to that of the execution part 86, as when charging the battery 64, the regulator device 60 sees the battery 64 as a load that is connected or disconnected from the power source 20 66.
When the battery 64 is fully charged it will have a voltage of approximately 15 volt (on a 12 volt nominal voltage system) and approximately 29 volt (on a 24 volt nominal voltage system). When the battery 64 is discharged it will have a voltage of approximately 11 volt (on a 12 volt nominal voltage system) and 25 approximately 22 volt (on a 24 volt nominal voltage system).
The processor 84 can be a PIC16F877 and is programmed to control which of the load circuits 72 are to be deactivated or activated. An on-chip analog-to- digital converter converts an analog signal obtained from either the current detection and amplification part 80 or from the voltage detection and amplification part 82 into a digital signal for further processing.
The regulator device 60 can also include a liquid crystal diode (LCD) display for displaying various system information, such as the battery voltage or current drawn.
The regulator device 60 can be adapted so that two load circuits, such as circuits 72.1 and 72.2, can be switched in parallel so that they act as a single circuit, which is able to draw twice the amount of power than any one of the load circuits 72 on their own. This is required when a high power electrical appliance is to be operated, which would normally draw more power than is available on a single load circuit 72.
Furthermore, the load circuit 72.5 can be adapted to be activated when the power supplied by the power source 66 falls below a required value. When the power source 66 is a solar panel array, this drop in power supplied will typically occur during night time. Thus a light can be automatically turned on in the evening and it will automatically be turned of in the morning when the power supplied again exceeds the required value.