WO2002084451A3 - Architecture de processeur vectoriel et procedes mis en oeuvre dans cette architecture - Google Patents

Architecture de processeur vectoriel et procedes mis en oeuvre dans cette architecture Download PDF

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Publication number
WO2002084451A3
WO2002084451A3 PCT/US2002/020645 US0220645W WO02084451A3 WO 2002084451 A3 WO2002084451 A3 WO 2002084451A3 US 0220645 W US0220645 W US 0220645W WO 02084451 A3 WO02084451 A3 WO 02084451A3
Authority
WO
WIPO (PCT)
Prior art keywords
processor architecture
vector processor
methods performed
vector
processing
Prior art date
Application number
PCT/US2002/020645
Other languages
English (en)
Other versions
WO2002084451A2 (fr
Inventor
Victor Demjanenko
Original Assignee
Victor Demjanenko
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Victor Demjanenko filed Critical Victor Demjanenko
Priority to US10/467,225 priority Critical patent/US20040073773A1/en
Priority to AU2002338616A priority patent/AU2002338616A1/en
Publication of WO2002084451A2 publication Critical patent/WO2002084451A2/fr
Publication of WO2002084451A3 publication Critical patent/WO2002084451A3/fr

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3818—Decoding for concurrent execution
    • G06F9/3822—Parallel decoding, e.g. parallel decode units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors
    • G06F15/8076—Details on data register access
    • G06F15/8084—Special arrangements thereof, e.g. mask or switch
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30065—Loop control instructions; iterative instructions, e.g. LOOP, REPEAT
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30069—Instruction skipping instructions, e.g. SKIP
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30072—Arrangements for executing specific machine instructions to perform conditional operations, e.g. using predicates or guards
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30192—Instruction operation extension or modification according to data descriptor, e.g. dynamic data typing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/325—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for loops, e.g. loop detection or loop counter
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G06F9/3455—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results using stride
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3816—Instruction alignment, e.g. cache line crossing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3853—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution of compound instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units

Abstract

Nouvelle architecture de processeur vectoriel, matériel et caractéristiques de traitement associées, fournissant des caractéristiques de traitement à la fois vectoriel et superscalaire.
PCT/US2002/020645 2001-02-06 2002-02-06 Architecture de processeur vectoriel et procedes mis en oeuvre dans cette architecture WO2002084451A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
US10/467,225 US20040073773A1 (en) 2002-02-06 2002-02-06 Vector processor architecture and methods performed therein
AU2002338616A AU2002338616A1 (en) 2001-02-06 2002-02-06 Vector processor architecture and methods performed therein

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US26670601P 2001-02-06 2001-02-06
US60/266,706 2001-02-06
US27529601P 2001-03-13 2001-03-13
US60/275,296 2001-03-13

Publications (2)

Publication Number Publication Date
WO2002084451A2 WO2002084451A2 (fr) 2002-10-24
WO2002084451A3 true WO2002084451A3 (fr) 2003-03-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2002/020645 WO2002084451A2 (fr) 2001-02-06 2002-02-06 Architecture de processeur vectoriel et procedes mis en oeuvre dans cette architecture

Country Status (2)

Country Link
AU (1) AU2002338616A1 (fr)
WO (1) WO2002084451A2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102353628B1 (ko) 2016-03-23 2022-01-20 에이알엠 리미티드 프로그램 루프 제어

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2470782B (en) 2009-06-05 2014-10-22 Advanced Risc Mach Ltd A data processing apparatus and method for handling vector instructions
GB2519108A (en) 2013-10-09 2015-04-15 Advanced Risc Mach Ltd A data processing apparatus and method for controlling performance of speculative vector operations
GB2519107B (en) * 2013-10-09 2020-05-13 Advanced Risc Mach Ltd A data processing apparatus and method for performing speculative vector access operations
EP3125108A1 (fr) * 2015-07-31 2017-02-01 ARM Limited Traitement de donnees
GB2548604B (en) 2016-03-23 2018-03-21 Advanced Risc Mach Ltd Branch instruction
GB2548602B (en) 2016-03-23 2019-10-23 Advanced Risc Mach Ltd Program loop control
CN112214244A (zh) * 2016-08-05 2021-01-12 中科寒武纪科技股份有限公司 一种运算装置及其操作方法
KR102312264B1 (ko) * 2017-05-17 2021-10-12 구글 엘엘씨 특수 목적 뉴럴 네트워크 트레이닝 칩
CN112233220B (zh) * 2020-10-15 2023-12-15 洛阳众智软件科技股份有限公司 基于OpenSceneGraph的体积光生成方法、装置、设备和存储介质
CN112506468B (zh) * 2020-12-09 2023-04-28 上海交通大学 支持高吞吐多精度乘法运算的risc-v通用处理器
CN115861026B (zh) * 2022-12-07 2023-12-01 格兰菲智能科技有限公司 数据处理方法、装置、计算机设备、存储介质

Citations (6)

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Publication number Priority date Publication date Assignee Title
US4888682A (en) * 1983-09-09 1989-12-19 International Business Machines Corp. Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers
US5423051A (en) * 1992-09-24 1995-06-06 International Business Machines Corporation Execution unit with an integrated vector operation capability
US5537606A (en) * 1995-01-31 1996-07-16 International Business Machines Corporation Scalar pipeline replication for parallel vector element processing
US5946496A (en) * 1997-12-10 1999-08-31 Cray Research, Inc. Distributed vector architecture
US6282634B1 (en) * 1998-05-27 2001-08-28 Arm Limited Apparatus and method for processing data having a mixed vector/scalar register file
US6401194B1 (en) * 1997-01-28 2002-06-04 Samsung Electronics Co., Ltd. Execution unit for processing a data stream independently and in parallel

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4888682A (en) * 1983-09-09 1989-12-19 International Business Machines Corp. Parallel vector processor using multiple dedicated processors and vector registers divided into smaller registers
US5423051A (en) * 1992-09-24 1995-06-06 International Business Machines Corporation Execution unit with an integrated vector operation capability
US5537606A (en) * 1995-01-31 1996-07-16 International Business Machines Corporation Scalar pipeline replication for parallel vector element processing
US6401194B1 (en) * 1997-01-28 2002-06-04 Samsung Electronics Co., Ltd. Execution unit for processing a data stream independently and in parallel
US5946496A (en) * 1997-12-10 1999-08-31 Cray Research, Inc. Distributed vector architecture
US6282634B1 (en) * 1998-05-27 2001-08-28 Arm Limited Apparatus and method for processing data having a mixed vector/scalar register file

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102353628B1 (ko) 2016-03-23 2022-01-20 에이알엠 리미티드 프로그램 루프 제어

Also Published As

Publication number Publication date
WO2002084451A2 (fr) 2002-10-24
AU2002338616A1 (en) 2002-10-28

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