WO2002079717A2 - Circuit a retard de detonateur - Google Patents

Circuit a retard de detonateur Download PDF

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Publication number
WO2002079717A2
WO2002079717A2 PCT/US2002/004069 US0204069W WO02079717A2 WO 2002079717 A2 WO2002079717 A2 WO 2002079717A2 US 0204069 W US0204069 W US 0204069W WO 02079717 A2 WO02079717 A2 WO 02079717A2
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WO
WIPO (PCT)
Prior art keywords
circuit
timer
potentiometer
circuitry
firing
Prior art date
Application number
PCT/US2002/004069
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English (en)
Other versions
WO2002079717A3 (fr
Inventor
John Childs
Original Assignee
The Ensign-Bickford Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by The Ensign-Bickford Company filed Critical The Ensign-Bickford Company
Priority to AU2002305930A priority Critical patent/AU2002305930A1/en
Publication of WO2002079717A2 publication Critical patent/WO2002079717A2/fr
Publication of WO2002079717A3 publication Critical patent/WO2002079717A3/fr

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Classifications

    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F42—AMMUNITION; BLASTING
    • F42B—EXPLOSIVE CHARGES, e.g. FOR BLASTING, FIREWORKS, AMMUNITION
    • F42B3/00—Blasting cartridges, i.e. case and explosive
    • F42B3/10—Initiators therefor
    • F42B3/12—Bridge initiators
    • F42B3/121—Initiators with incorporated integrated circuit
    • F42B3/122—Programmable electronic delay initiators
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F42—AMMUNITION; BLASTING
    • F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
    • F42C11/00—Electric fuzes
    • F42C11/06—Electric fuzes with time delay by electric circuitry
    • F42C11/065—Programmable electronic delay initiators in projectiles

Definitions

  • This invention pertains to timing circuits and, in particular, to timing circuits used in electronic delay detonators.
  • Electronic delay detonators employ electronic initiation elements (bridgewires, SCBs, etc.) in contact with an output charge, and an electronic timing circuit to interpose a delay between the receipt of an initiation signal and the initiation of the output charge.
  • the detonator comprises, in addition to the timing circuit, a storage capacitor (or other storage element) for storing a charge of electricity sufficient to cause the initiation element to function, and a switch for allowing the stored charge to flow from the storage capacitor to the initiation element, the switch being responsive to a signal from the timing circuit.
  • a detonator may receive an electrical initiation signal or may convert a non-electric signal into an electric signal using a transducer as shown, e.g., in U.S.
  • a well-known integrated circuit timer having wide utility is the type 555 timer.
  • the 555 timer can operate in two modes: astable mode or monostable mode.
  • astable mode the 555 timer serves as an oscillator and a timed interval may be determined by counting the number of oscillations and comparing it to a predetermined count.
  • monostable mode the 555 timer generates a single output signal whose duration constitutes the timed interval.
  • a timing resistor and timing capacitor are connected to the 555 timer to provide a RC circuit whose time constant determines the performance of the timer.
  • the time constant of the RC circuit determines the period of the oscillations; in monostable mode, the time constant of the RC circuit determines the duration of the output pulse.
  • the prior art teaches the use of a 555 timer in electronic delay detonators in the astable mode.
  • a 555 timer in a detonator on a commercial scale in monostable mode because it has not been considered feasible to obtain a source of a resistor and capacitor for the RC circuit whose characteristics are known with sufficient precision to yield a timer circuit that will define the delay interval with adequate accuracy.
  • Range Digital Delay Detonator discloses a timer circuit for an electronic delay detonator.
  • the circuit incorporates a standard 555 timer to which a fixed timing resistor (107) and fixed timing capacitor (108) are connected to provide the RC circuit.
  • the timer is used in the astable mode and the output pulses are directed to a programmable counter (counter circuits 62a and 62b) that comprises a series of fuses (118) through (130).
  • a programmable counter counter circuits 62a and 62b
  • the timer is tested by allowing it to oscillate for an interval precisely corresponding to the desired delay interval.
  • the cycles of the timer are counted by the counter and the counter is then programmed by burning appropriate fuses so that when the circuit is reset, it will issue an output signal after the same number of cycles so that the circuit will accurately reproduce the desired delay.
  • U.S. Patent 5,507,230 to Lewis et al, dated April 16, 1996 and entitled Self-Powered Delay Ordnance discloses a delay detonator for an initiating device that comprises an integrated timing circuit whose delay period can be pre-selected (column 3, lines 32-48).
  • the delay period depends in part on the characteristics of the fixed timing resistor and timing capacitor of a RC circuit, and it is not commercially feasible to match such components to obtain a time constant of suitable accuracy for the desired delay period. As a result, such a circuit will not be sufficiently reliable for many uses.
  • the present invention provides an initiator firing circuit comprising a storage device for storing firing energy for an initiation element, a voltage regulator connected to the storage device, switching circuitry connected to the storage device for controlling the release of energy from the storage device, an initiation element connected to the switching circuitry, and a 555 timer IC configured for monostable operation and a RC circuit associated therewith for determining the duration of the monostable output signal, the RC circuit comprising a fixed capaci- tor and a programmable potentiometer.
  • the programmable potentiometer may comprise a chip select pin for enabling programming and the circuit may be configured to tie the chip select pin to ground after programming.
  • This invention also provides a method for programming a timing circuit to generate a signal having a desired duration, the timer circuit comprising a 555 timer IC and a RC circuit associated therewith comprising a fixed capacitor of known nominal capacitance and a programmable potentiometer, the 555 timer IC being configured for monostable operation.
  • the method comprises setting the potentiometer to a preliminary programmed resistance level, initiating the 555 timer IC in a testing mode, measuring the duration of the signal generated by the 555 timer IC and deriving the actual capacitance of the capacitor, and setting the potentiometer to a resistance level that will match with the desired capacitance of the capacitor to permit the 555 timer IC to generate an output signal having precisely the desired duration.
  • the invention provides a delay initiator, such as a detonator, comprising a shell, an output charge in the shell, an electric initiation element in initiation relation to the output charge, a storage device for storing an electric initiation signal, and a de- lay circuit comprising switching circuitry and timing circuitry for controlling the release of the electric initiation signal to the initiation element.
  • the invention relates to the improvement comprising that the timing circuitry comprises a 555 timer IC configured for monostable operation and a RC circuit associated therewith for determining the duration of the monostable output signal, the RC circuit comprising a fixed capacitor and a programmable potentiometer.
  • the timing circuitry may optionally comprise the other features described above.
  • Figure 1 is a schematic representation of a detonator having a delay circuit according to one particular embodiment of the invention
  • Figure 2 is a more detailed representation of the delay circuit of Figure 1
  • Figure 3 is a schematic representation of an temperature adjustment circuit according to another embodiment of this invention
  • Figure 4 is a schematic view partly in cross section showing one embodiment of the delay detonator of the present invention having a shock tube input transmission line coupled thereto;
  • Figure 5 is a close-up view (relative to Figure 4), of the isolation cup and booster charge components of the detonator of Figure 4;
  • Figure 6 is a schematic partial view generally corresponding to that of Figure 4 but showing a schematic structural rendition of piezoelectric generator 130 instead of the schematic box rendition of Figure 1;
  • Figure 7 is a schematic exploded, close-up view of the components of Figure 6 with the piezoelectric generator component thereof shown in a more detailed, schematic rendition; and [0020] Figure 8 is a view on a scale enlarged with respect to Figure 7 of a more detailed schematic view of the piezoelectric generator of Figures 6 and 7.
  • the present invention provides a timing circuit for electronic delay initiators such as detonators or pyrotechnic squibs, although subsequent descriptions thereof will refer, for sake of convenience, only to detonators.
  • the timing circuit of this invention comprises a discrete 555 timer integrated circuit package ("555 timer IC") or an equivalent commercially available, mass-produced integrated circuit used in a monostable mode.
  • 555 timer IC discrete 555 timer integrated circuit package
  • the duration of the output signal from a 555 timer IC is determined by the characteristics of a RC circuit, i.e., a capacitance and a resistance, associated with it.
  • the resistance is provided by a variable potentiometer, preferably a digital programmable potentiometer, instead of a fixed timing resistor.
  • the timing capacitor is a typical, commercially available "fixed” (i.e., non-variable, non-programmable) element.
  • the programmable potentiometer comprises an EPROM portion that can be programmed so that the RC circuit causes the 555 timer IC to generate an output signal of desired duration to within 1 millisecond (ms) ( ⁇ 3 ⁇ ), and the programming will be preserved even when the chip is powered down.
  • ms millisecond
  • this particular combination of circuit elements allows the use of a 555 timer IC in a monostable mode to control the functioning of the detonator.
  • the delay circuit thus formed is made of commercially available integrated circuit packages that can fit within a standard detonator shell.
  • Pro- grammability is attained through the use of the programmable potentiometer in the RC circuit.
  • the programmable potentiometer can be set within a wide range of resistance values, e.g., from 10,000 to 100,000 ohms, making possible the generation of timer output signals having a wide range of durations. Should it be desirable to extend a delay interval even further, the program- mable potentiometer can be used with another, fixed resistor, as shown in Figure 2 and discussed further below.
  • Another aspect of the invention relates to a method by which the delay circuit is programmed.
  • a preliminary resistance value is chosen for the programmable potentiometer in view of the nominal value of the capacitor in the RC circuit and the initial operating voltage to which the RC circuit is charged, to yield the time constant that will cause the timer to produce a signal of approximately the desired duration.
  • This initial analysis is well-known in the art. Deviation from the desired duration (and variations in such deviations from circuit to circuit) occurs, however, because of the relatively inaccurate and imprecise capacitance ratings assigned to conventional fixed capacitors, due to variations in their methods of manufacture.
  • the programmable potentiometer is programmed to provide the initial resistance and the delay circuit is then tested and the actual time constant for the RC circuit is precisely determined. This is done before the circuit is installed in a detonator, by simulating an input signal (i.e., providing a test signal) to the circuit and measuring the voltage across the fixed timing capacitor at two different times. From these measure- ments, the capacitance of the timing capacitor can be accurately and precisely determined and the resistance level of the programmable potentiometer needed to make the 555 timer IC produce an output signal of precisely the desired duration in monostable mode can be determined. The potentiometer can then be programmed accordingly.
  • Yet another broad aspect of this invention relates to the two modes in which a programmable potentiometer can be used: the "locked mode", in which the serial programming pin is permanently disabled, and an "active" mode, in which the serial programming pin after the initial programming, is subsequently enabled and again becomes responsive to input from other devices that can further affect the final resistance it provides.
  • the active mode if the detonator comprises a temperature sensor to which the potentiometer can be responsive so that significant differences between the temperatures that prevail at the time of firing and the time of programming, which may affect the time constant of the RC circuit, can be compensated for.
  • a significant advantage of the present invention is that the various circuit components can be embodied by common, commercially available integrated circuit dies and can be assembled onto a lead frame, circuit board or other assemblage of such dies that will fit into a conventional detonator shell, e.g., with a cylindrical volume 3.5 inches in length and 0.3 inch in diameter.
  • detonator delay circuitry including 555 timer IC circuitry such as that shown in U.S. 5,435,248 must be embodied in a single ASIC (application-specific integrated circuit) in order to achieve the required size reduction
  • a delay circuit in accordance with this invention can meet those size requirements without the need for designing and manufacturing an ASIC chip. Accordingly, significant savings in development costs are realized and wider availability of component circuit dies is available.
  • the 555 timer IC is employed in a bump-mount chip package.
  • a detonator according to this invention comprises a plurality of commercially available integrated circuit dies or "packages"
  • the power requirement for its operation may be greater than the power consumption requirements for an ASIC delay circuit embodiment according to the prior art.
  • the energy used for operating the timer circuit may be separated from the energy stored for firing the initiation element, the latter of which may be limited.
  • the energy for firing may be generated solely from a single explosive shock to a piezoelectric device in the detonator, as described further below.
  • the circuit may contain a battery that supplies power to the timer circuit.
  • the battery is electrically isolated from the initiation element (e.g., bridgewire). Accordingly, even if the circuit is damaged and the battery is inadvertently connected to the initiation element, an unintended firing of the detonator is not likely.
  • Detonator 10 comprises an energy storage device such as storage capacitor 12, and an initiation element, such as a bridgewire 14, positioned to initiate an output charge 16.
  • the energy storage device is preferably a "fixed”, i.e., non- ariable, non-programmable device that receives and stores energy from an electrical initiation signal.
  • the delay circuitry 18 comprises switching circuitry 20 which includes negative edge trigger 34, trigger device 32 and a firing switch 21 that electrically isolates the storage capacitor 12 from the bridgewire 14.
  • the switching circuitry 20 is responsive to the output of the timing circuitry 22, which comprises the 555 timer IC 26, the programmable potentiometer 24 variable resistor 26, the fixed capacitor 36 and the negative pulse generator 28.
  • the loss-of-power detection circuit 30 and the responsiveness of trigger device 32 to it are optional lockout safety features.
  • Detection circuit 30 is initialized at power-up of circuitry 18 to allow trigger device 32 and bridgewire switch 21 to discharge storage capacitor 12 upon receipt of a signal from negative edge trigger 34.
  • circuit 30 will prevent trigger device 32 from initiating switch 21. This is useful because if such a power interruption occurs during operation and the timer is able to resume its function thereafter, the timing of the detonator output would be delayed by the power interruption. Such delays can seriously degrade the effectiveness of the detonator output and, in some instances, may represent a hazard to people.
  • the energy stored in storage capacitor 12 will be dissipated by a bleed resistor 12a.
  • Delay circuitry 18 draws power from storage capacitor 12 via a voltage regulator 23, which draws and conditions a signal therefrom for use by the remainder of the circuit.
  • voltage regulator 23 is configured to have an alternative power input to allow for accepting power for testing and programming of the circuit.
  • Voltage regulator 23 also powers a negative edge trigger 34, which is connected to 555 timer IC 26 to initialize it at power up.
  • a fixed timing capacitor 36 is connected to 555 timer IC 26 with the programmable potentiometer 24 to provide a RC circuit.
  • the 555 timer IC 26 is configured for monostable operation.
  • any or all of the circuit components in the timing circuitry and the switching circuitry can be embodied as individual commercially available integrated circuit packages or solid state devices, all of which may be mounted on a circuit board, lead frame or other conventional structure so that the circuit may be assembled and tested as a unit before insertion into the detonator shell.
  • a Vcc test input signal is applied to the voltage regulator, thus charging the timing capacitor 36.
  • the resistance of programmable potentiometer 24 is programmed at an initial, nominal value that is expected to produce approximately the desired time constant with the timing capacitor 36, based on the nominal capacitance of that ca- pacitor.
  • the voltage regulator energizes the negative pulse generator 28, which initializes the 555 timer IC 26 to which the variable potentiometer 24 and capacitor 36 are connected. Once the nominal resistance of potentiometer 24 is set, the 555 timer IC 26 is then initialized. The duration of the timing pulse at pin 3 of the 555 timer IC 26 can be measured directly, and the resistance of the potentiometer 24 can be adjusted accordingly, to yield the desired function time. Alternatively, the voltage across the timing capacitor 36 could be measured as a function of time, and, based on the measurement, the initial RC constant could be determined. Then, the resistance value for potentiometer 24 could be adjusted so that the desired RC time constant is attained.
  • That resistance setting is programmed into the potentiometer 24 and the chip select bit of the potentiometer is either temporarily or permanently disabled, e.g., by tying it to ground.
  • the circuit is inserted into the shell in contact with the output charge 16, which is disposed at the end of the shell.
  • an initiation signal IS is received by storage capacitor 12, some energy is drawn from storage capacitor 12 through voltage regulator 23 to power potentiometer 24, 555 timer IC 26 and the other components of delay circuitry 18.
  • potentiometer 24 has been programmed so that the time constant established by potentiometer 24 and timing capacitor 36 will cause 555 timer IC 26 to generate an output pulse of precisely the desired duration.
  • negative edge trigger 34 issues a signal to the trigger device 32 which, in turn, releases firing switch 21 so that the remaining energy stored in storage capacitor 12 is released to bridgewire 14 to initiate output charge 16.
  • Figure 2 provides a more detailed (relative to Figure 1) depiction of a delay circuit in accordance with another embodiment of this invention, in which circuits and devices that correspond to those represented in Figure 1 bear the same reference numerals.
  • the RC circuit associated with the 555 timer IC comprises a storage capacitor 12, a programmable potentiometer 24 and fixed capacitor 36.
  • Capacitors 12 and 36 may both be of the wet-tantalum type for maximum stored energy density. Alternatively, ceramic or other types of capacitors may be employed if other characteristics, such as equivalent series resistance, or shock resistance, are more important than energy density.
  • the potentiometer 24 may be a commercially available integrated circuit die of the kind available from Dallas Semiconductor Corporation under the designation DS1804. Such a device can have as many as 100 "positions" or resistance settings. Some embodiments can optionally be employed in a one-time programmability (OTP) mode in which, after the desired value of the "wiper position" is set, further programming activity is prevented by the interconnection of appropriate input leads of the die.
  • OTP one-time programmability
  • the Dallas DS1804 potentiometer has a range of from 1000 ohms ( ⁇ ) to 100,000 ⁇ in increments of 1000 ⁇ .
  • the effective resistance R in the timer circuit is extended to a range of 101 K ⁇ to 200 K ⁇ , thereby increasing the possible duration at the 555 output pulse significantly.
  • the negative trigger pulse generator circuit 28 initializes the 555 timer IC 26 in response to a charge received from the voltage regulator 23 upon initiation.
  • the trigger device 32 may optionally comprise a single positive edge- triggered D- type CMOS flip-flop of a kind commercially available, such as one sold under the designation NC7SZ374 by Fairchild Semiconductor.
  • the trigger device 32 signals switch 20 (which, in a particular embodiment, may comprise a MOSFET switch) to discharge storage capacitor 12 to bridgewire 14 (which may have a resis- tance of about 5 ohms and an all fire rating of 0.16 amps with an average operating time of 0.7 ms at 1 amp).
  • switch 20 which, in a particular embodiment, may comprise a MOSFET switch
  • bridgewire 14 which may have a resis- tance of about 5 ohms and an all fire rating of 0.16 amps with an average operating time of 0.7 ms at 1 amp.
  • the flip-flop can also serve a lockout function by appropriate activation of its chip select pin.
  • a timer circuit in accordance with the present invention may optionally comprise a temperature sensor, and the programmable potentiometer may be responsive to the sensor even after it is initially programmed.
  • the temperature adjustment circuitry comprises a temperature sensor 40, an analog comparator circuit 42, and analog to digital signal processing circuitry 44 comprising, in the illustrated embodiment, an analog to digital converter 44a, a bit shift register 44b, and a parallel/serial data converter circuit 44c.
  • the temperature sensor circuit 40 senses the temperature during programming, which sets the state of the analog comparator circuit 42.
  • a temperature adjust enable signal is taken from an external source to enable processing circuitry 44 and potentiometer 24' (via a signal provided at the chip select (CS) pin) to adjust the potentiometer to ambient temperature.
  • the temperature sensor circuit 40 senses the ambient temperature in the environment of use and generates an analog signal proportional thereto.
  • the analog comparator circuit 42 compares the ambient temperature to the programming temperature and generates a high or low signal, depending on whether the ambient temperature is higher or lower than the programming temperature. The appropriate signal is provided to the digital potentiometer 24' at the up/down pin (U/D).
  • the analog signal from the temperature sensor circuit is converted to a digital signal and is processed in processing circuitry 44 for introduction into the EPROM of the digital potentiometer 24' at the increment pin (INC).
  • the digital potentiometer having received the digital value of the temperature at pin INC and an indication of whether the ambient tempera- ture is higher or lower than programming temperature at pin U/D, either increments or decrements the programmed resistance setting, according to a predetermined scale determined by the temperature coefficient of the system. Due to the energy demands of such an embodiment, the detonator may be powered by lead wires or an internal battery, or the combination of an internal battery with a piezoelectric device, as described further below.
  • a digital delay detonator 100 that comprises a delay circuit according to the present invention.
  • the detonator 100 is coupled to a suitable input transmission line which comprises, in the illustrated case, a shock tube 110.
  • a shock tube 110 comprises hollow plastic tubing, the inside wall of which is coated with an explosive material so that, upon ignition, a shock wave is propagated through the tube. See, for example, Thureson et al, U.S. Patent 4,607,573.
  • Shock tube 110 is secured in a shell or housing 112 by means of an adapter bushing 114 about which housing 112 is crimped at crimps 116, 116a to secure shock tube 110 and form an environmentally protective seal between adapter bushing 114 and the outer surface of shock tube 110.
  • Housing 112 has an open end 112a which receives bushing 114 and shock tube 110, and an opposite, closed end 112b.
  • a segment 110a of shock tube 110 extends within housing 112 and terminates at end 110b in close proximity to, or in abutting contact with, an anti-static isolation cup 118.
  • Isolation cup 118 is of a type well-known in the art and is made of a semiconductive material, e.g., a carbon-filled polymeric material, so that it forms a path to ground to dissipate any static electricity which may travel along the interior of shock tube 110.
  • a semiconductive material e.g., a carbon-filled polymeric material
  • isolation cup 118 has a generally (but slightly tapered) cylindrical body which is divided by a thin, rup- turable membrane 118b into an entry chamber 118a and an exit chamber 118c.
  • shock tube 110 ( Figure 4) is disposed at, or may be received within, entry chamber 118a (shock tube 110 is not shown in Figure 5 for clarity of illustration).
  • Exit chamber 118c pro- vides an air space or stand-off between the end 110b of shock tube 110 and a low energy booster charge 120 positioned adjacent to isolation cup 118.
  • Booster charge 120 comprises a booster charge shell 122 of cup-like configuration within which is pressed a small quantity of primary explosive 124, such as lead azide, which is closed by a first cushion element 126.
  • Primary explosive 124 such as lead azide
  • First cushion element 126 which is located between isolation cup 118 and primary explosive 124, protects primary explosive 124 from pressure imposed upon it during manufacture.
  • Any suitable piezotransducer may be employed as the piezoelectric generator 130.
  • One effective and commercially available type of piezoelectric generator is schematically illustrated in Figures 6, 7 and 8.
  • the piezoelectric generator 130 comprises a piezoceramic material stack 150 comprised of a stack of multiple layers 151 of thin piezoceramic material.
  • the stack 150 is supported a plastic (synthetic organic polymeric material) housing 153, through which terminals 168A and 168b ( Figure 7) extend.
  • a load distributing disc 170 (not shown in Figures 1 or 5), which in turn transmits the energy from the booster charge 120 to the multiple layers 151 of piezoceramic material.
  • the piezoceramic material layers 151 are stacked in vertical layers with opposite faces of each layer connected in parallel through the use of electrode layers 172a and 172b interposed between them.
  • a piezoelectric generator may comprise 84 active layers, each approximately 20 microns thick, with discrete positive and negative electrodes as marked on Figure 8 formed from their inner connections. This construction provides output energy levels much greater than those which can be obtained from an otherwise comparable monolithic piezoceramic structure.
  • the stack 150 of piezoelectric generator 130 is mounted to a smooth, flat and hard surface 153a of plastic housing 153 ( Figure 7).
  • the load distributing disc 170 between the output end of the booster charge 120 and the input face of the piezoelectric generator 130 helps to evenly transmit and distribute the output shock wave energy of the booster charge 120 to the piezoelectric generator 130.
  • Terminals 168a and 168b are electrically connected to electrode layers 172a and 172b to establish an electrical connection to the timing module 138.
  • Plastic housing 153 and load distributing disc 170 also serve to insulate piezoelectric generator 130 against unintended and random mechanical forces, any electrical charges, etc., and serves to help maintain the piezoelectric generator in the desired position.
  • Adapter bushing 114 ( Figure 4), isolation cup 118, first cushion element 126, and booster charge 120 are disposed in a booster shell 132 as shown in Figure 5.
  • the outer surface of isolation cup 118 is in conductive contact with the inner surface of booster shell 132 which in turn is in conductive contact with housing 112 to provide an electrical current path for any static electricity discharged from shock tube 110.
  • booster shell 132 is inserted into housing 112 and housing 112 is crimped to retain booster shell 132 therein as well as to protect the contents of housing 112 from the environment.
  • a storage capacitor 134 is connected to piezoelectric generator 130 to receive electrical output from generator 130 for storage.
  • An optional battery 136 is positioned next to capacitor 134 and adjacent to battery 136 is a timing module 138 next to which is located an initiation element such as a bridgewire 140.
  • the timing module 138 contains the circuitry previously described (555 timer IC in monostable mode, programmable potentiometer, etc.) for interposing a delay between the receipt of a signal from the shock tube 110 and its release from capacitor 134 to the bridgewire 140.
  • a second cushion element 142 which is similar to first cushion element 126, is interposed between output charge 144 and bridgewire 140 for the same purpose as first cushion element 126.
  • Output charge 144 comprises a primary explosive 144a and a secondary explosive 144b, which has sufficient shock power to detonate cast booster explosives, dynamite, etc., the detonation of which is the usual purpose to which detonators are put.
  • the components contained within housing 112 are suitably encased within potting compounds to protect the components, and minimize the chances of detonation or damage by mechanical impact or electrical signals.
  • housing 112 is made of aluminum or other electrically conductive material to shield the internal components against both electrical signals and mechanical shocks that could inadvertently activate booster charge 120 or output charge 144.
  • the digital delay detonator 100 of FIG. 4 receives a non-electric initiation signal in the form of a pressure input pulse via shock tube 110, which ruptures membrane 118b, traverses the stand-off provided by exit chamber 118c and detonates booster charge 120.
  • the explosive output of booster charge 120 is thus an amplification of the initiation signal de- livered by shock tube 110.
  • Piezoelectric generator 130 is subjected to the output signal delivered by booster charge 120 and converts it into electrical energy.
  • This electrical energy is stored in storage capacitor 134 and a part of it is used to activate the timing circuit of timing module 138.
  • Battery 136 powers the delay circuit of timing module 138.
  • the stored energy from capacitor 134 is applied to electrically activated bridgewire 140.
  • Bridgewire 140 initiates primary explosive 144a, which in turn initiates secondary explosive 144b, i.e., bridgewire 140 serves to initiate output charge 144.
  • the delay detonator 100 may thus be employed to provide a very accurately controlled delay in the initiation of the detonator, as may be required in blasting patterns in which a large number of charges are to be detonated in a predetermined timing pattern.
  • the electronic circuit control of the delay permits the selection of much longer delays than would be attainable if the piezoelectric generator 130 had to supply the power for both powering the delay circuit and energizing the igniter means 140.

Abstract

L'invention porte sur un circuit d'amorçage de mise à feu comportant: une capacité (12) emmagasinant de l'énergie pour l'élément (14) d'amorçage; un régulateur de tension (23) relié à la capacité (12); un circuit de commutation (20) relié à la capacité (12) et commandant la libération de l'énergie y étant accumulée (12); un élément (14) d'amorçage relié au circuit de commutation (20); un minuteur (26) à circuit intégré (555) pour opération monostable; et un circuit RC associé au minuteur et fixant la durée de son signal monostable de sortie, et comprenant un condensateur fixe (36) et un potentiomètre programmable (24).
PCT/US2002/004069 2001-02-14 2002-02-12 Circuit a retard de detonateur WO2002079717A2 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002305930A AU2002305930A1 (en) 2001-02-14 2002-02-12 Delay detonator timing circuit

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US26862401P 2001-02-14 2001-02-14
US60/268,624 2001-02-14

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CN111240600A (zh) * 2020-01-19 2020-06-05 杭州晋旗电子科技有限公司 一种电子雷管芯片otp存储器可靠存储方法及系统
US10702456B2 (en) 2015-07-16 2020-07-07 Conopco, Inc. In-SITU process for making a small particle narrow distribution fatty acyl isethionate in oil composition
CN114111475A (zh) * 2021-12-10 2022-03-01 苏州烽燧电子有限公司 一种烟幕电子引信
WO2022226454A1 (fr) * 2021-04-19 2022-10-27 Biofire Technologies Inc. Gâchette électromécanique et procédés de fonctionnement d'un pistolet l'utilisant

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US5435248A (en) * 1991-07-09 1995-07-25 The Ensign-Bickford Company Extended range digital delay detonator
US5621184A (en) * 1995-04-10 1997-04-15 The Ensign-Bickford Company Programmable electronic timer circuit
US5926997A (en) * 1997-08-20 1999-07-27 Wilcox; Richard W. Stationary vacuum trap for vermin

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Publication number Priority date Publication date Assignee Title
US5435248A (en) * 1991-07-09 1995-07-25 The Ensign-Bickford Company Extended range digital delay detonator
US5621184A (en) * 1995-04-10 1997-04-15 The Ensign-Bickford Company Programmable electronic timer circuit
US5926997A (en) * 1997-08-20 1999-07-27 Wilcox; Richard W. Stationary vacuum trap for vermin

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US10702456B2 (en) 2015-07-16 2020-07-07 Conopco, Inc. In-SITU process for making a small particle narrow distribution fatty acyl isethionate in oil composition
CN111240600A (zh) * 2020-01-19 2020-06-05 杭州晋旗电子科技有限公司 一种电子雷管芯片otp存储器可靠存储方法及系统
CN111240600B (zh) * 2020-01-19 2023-09-22 杭州晋旗电子科技有限公司 一种电子雷管芯片otp存储器可靠存储方法及系统
WO2022226454A1 (fr) * 2021-04-19 2022-10-27 Biofire Technologies Inc. Gâchette électromécanique et procédés de fonctionnement d'un pistolet l'utilisant
US11555663B2 (en) 2021-04-19 2023-01-17 Biofire Technologies Inc. Electromechanical trigger and methods of operating a gun using the same
CN114111475A (zh) * 2021-12-10 2022-03-01 苏州烽燧电子有限公司 一种烟幕电子引信

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