WO2002061996A1

WO2002061996A1 - Optical demultiplexer

Info

Publication number: WO2002061996A1
Application number: PCT/SE2001/000162
Authority: WO
Inventors: Sergei Popov
Original assignee: Telefonaktiebolaget Lm Ericsson (Publ)
Priority date: 2001-01-29
Filing date: 2001-01-29
Publication date: 2002-08-08

Abstract

The present invention relates to an optical demultiplexer for demultiplexing an optical signal (10) including at least two channels (A, B, C, D, E) sent in time slots (A, B, C, D, E, F) in time frames. The optical demultiplexer includes a waveguide (11) with a core 812) and at least one cladding (13, 14, 31). According to the invention at least one channel reader device (PD1, PD2, PD3, PD4, PD5) is provided. The optical signal 810) is reflected on the cladding or claddings (13, 14, 31) in at least one reflection point (16, 17). Each channel reader device (PD1, PD2, PD3, PD4, PD5) is attached in the nearness of one of the at least one reflection points (16) each.

Description

OPTICAL DEMULTIPLEXER

TECHNICAL FIELD OF THE INVENTION

The present invention relates to an optical demultiplexer.

DESCRIPTION OF RELATED ART

Explosive growth of information transported through communication networks requires special measures to increase the transmission capacity. Today there exist different approaches to achieve more dense information and processing before signals with the information are transmitted over a network. Usually, the signals propagate in the form of a bit stream. Such a bit stream is characterised by its bit rate, which determines speed of transmission, and by spectral bandwidth occupied by the transmitted signal in the frequency domain.

To increase the density of transmitted information in the network there exist several multiplexing techniques, e.g. time division multiplexing (TDM) , frequency division multiplexing (FDM) , wavelength division multiplexing (WDM) and code division multiplexing (CDM) .

In short, the time division multiplexing procedure works by sequentially taking one bit from different bit streams from different channels and placing said bits after each other in one common bit stream. The time space that each bit has in the new bit stream is called a time slot, while the collection of a time slot from each channel is called a time frame. Instead of multiplexing bit by bit it is also possible to multiplexing word by word from the different channels. In the latter case a time slot will then contain a whole word instead of a bit.

In the other end of the communication network a corresponding demultiplexing must be performed in order to retrieve the original channels. A solution is then to use a buffer memory with an addressable access, in which first the bits/words are stored and then, after a predefined time delay, selected bits/words from time slots belonging to the same channel in the common bit/word stream are retrieved and the original channels are thus recreated.

Today TDM is mainly implemented with electrical techniques. That is because implementation of TDM requires the use of buffer memories and delay lines, which are difficult to implement optically. One of the restrictions in the use of electrical techniques is speed limitation. Modern electrical TDM devices demonstrate speed of operation up to 40 Gbit with a bandwidth up to 40 GHz. Usually said modern TDM devices implement microwave techniques along with a rather complex design, which makes the implementation expensive. Microwave elements are usually discrete and it is difficult, if feasible at all, to integrate them in the same chip with optical elements to produce efficient optoelectronic microstructures to reasonable prices. Further increase of the speed seems to be connected with fundamental problems, which result from the behaviour of electrical charges in a solid structure.

There exist some solutions for optical TDM (OTDM) . However, a lot of the OTDM devices process signals totally in the electrical domain. This means that one and only one photodiode registers the whole bit stream as a serial stream and then the bits are converted from optical to electrical form. The real time division demultiplexing is then made in the electrical domain. In this case, the speed, or bit rate of the total signal depends on the speed of the electronics in a receiver. Even though there exist detectors that can register front flank of a pulse signal, such a detector need some time for restoring the receiving state. That means, that the device is blind during that time. The speed of such an OTDM device is limited by the time of restoration or "blindness" . Typical known OTDM devices using demultiplexing in optical domain can be seen in e.g. US 6,118,564, WO 99/44320, EP 0 998 066 A2, WO 99/05812 and JP 07123073. The variety of solutions includes implementing either non-linear phenomena or complex synchronisation solutions, or using a bulk construction to arrange necessary time delays. A problem with all these solutions is that they are very complicated and expensive.

SUMMARY

The problem with some of the existing optical demultiplexers is that they are not truly optical, because the demultiplexing takes place in the electrical domain.

The problem with some other existing optical demultiplexers is that they are very complicated.

The purpose with the present invention is to provide a simple optical demultiplexer that really performs the demultiplexing in the optical domain.

This is solved in the present invention by using an optical demultiplexer including a waveguide with a core and at least one cladding. The optical signal will be reflected on the borderline between the core and the cladding or claddings in at least one reflection point. At least one channel reader device, e.g. a photodetector, is attached in the nearness of one of the at least one reflection points each.

The channel readers will read one channel each and the demultiplexing will thus take place in the optical domain.

The advantages with the present invention are that it is a simple and cheap solution.

The invention will now be described in more detail with the aid of preferred embodiments and with reference to enclosed drawings . BRIEF DESCRIPTION OF THE DRAWINGS

Figures la and lb show how time division multiplexing works.

Figures 2a and 2b show a first embodiment of the present invention.

Figures 3a and 3b show a second embodiment of the present invention.

Figures 4a and 4b show a version of a detail solution for the second embodiment.

Figures 5a and 5b show versions of how a waveguide may look in the first and second embodiments.

DETAILED DESCRIPTION OF EMBODIMENTS

Fig. la and lb show the fundamental principle behind time division multiplexing (TDM) . As an example, three digital channels A, B, C are used, but of course any number of channels may be used. Each channel A, B, C is sent in separate bit streams 1, 2, 3, with a bit rate v. The channels A, B, C are then time multiplexed to be transmitted on the same connection in a common bit stream . Each channel A, B, C may be seen as travelling in a timeslot A, B, C. Together, these timeslots form a time frame 5. Each bit in the common bit stream 4 can only use 1/3 of the original bit time and thus the bit rate v_c in the common bit stream 4 is three times as high as the bit rate v in each channel A, B, C. It is later possible to demultiplex the common bit stream 4 in the other end of the connection to recreate bit streams 1', 2', 3' with the channels A, B, C.

In Fig. 2 is shown an embodiment of an optical demultiplexer according to the invention. A bit stream 10 including five time division multiplexed channels A, B, C, D, E is transmitted in the form of an optical signal in a waveguide 11. It is of course possible to use any number of channels, but five channels will be used as an example in this embodiment. Each channel A, B, C, D, E travels in a timeslot A, B, C, D, E. Together, these timeslots form a time frame.

The waveguide 11 may e.g. be a planar or bulk optical waveguide. The waveguide 11 includes a core 12 with a first refractive index ni, a first cladding 13 with a second refractive index n₂ and a second cladding 14 with a third refractive index n₃. An array of photodetectors PDO, PDl, PD2, PD3, PD4, PD5 is attached on the first cladding 13.

The second cladding 14 is chosen so that when the optical signal 10 travels in the core 12, then the optical signal 10 is totally reflected on the borderline between the core 12 and the second cladding 14. This may be expressed as:

α ≤ arcsin (n₃/nι) (1)

where α is the angle of incidence to the second cladding 14.

The first cladding 13 is chosen so that the optical signal 10 is partially reflected on the borderline between the core 12 and the first cladding 13 and partially transmitted through the first cladding 13. It should be noted that this requirement on the first cladding 13 only is necessary in the region of the waveguide where the photodetectors PDO, PDl, PD2, PD3, PD4, PD5 are situated. The part of the first cladding 13 that is outside said region is of no importance for the present invention and can thus be chosen according to other requirements. It could e.g. be an advantage to have the part of the first cladding 13 that is outside said region totally reflecting to prevent unnecessary losses of energy.

A clock generator 15 is connected to one of the photodetectors PDO, which will be called the trigger photodetector PDO. The number of the remaining photodetectors PDl, PD2, PD3, PD4, PD5, which will be called the reading photodetectors, is equal to the number of channels A, B, C, D, E to be read.

The optical signal 10 will be reflected in the borderline between the core 12 and the first cladding 13 in a number of reflection points 16. The same will happen in a number of reflection points 17 in the borderline between the core 12 and the second cladding 14. If the waveguide 11 has a constant height h, then the reflection points 16, 17 will be distanced by a first distance d, measured along one of the borderlines. The photodetectors PDO, PDl, PD2, PD3, PD4, PD5 are to be positioned in the nearness of said reflection points 16 on the first cladding 13. The reading photodetectors PDl, PD2, PD3, PD4, PD5 are distanced from each other by the first distance d if all channels are to be read. The trigger photodetector PDO is distanced from the first reading photodetector PDl with a distance equal to any multiple of the first distance d.

An equivalent solution would of course also be e.g. to instead position the trigger photodetector PDO in a reflection point 17 on the second cladding 14 and making that part of the second cladding 14 partially reflecting and partially transmitting. The calculations of time delay and distances below would then have to be adjusted accordingly.

The trigger photodetector PDO will detect when an optical signal 10 is coming and trigger the clock generator 15, which, after a time delay τ, will start generating clock pulses Ck with a period equal to the time of one time frame. The delay τ is dependent on a second distance x that the optical signal 10 has to travel from the trigger photodetector PDO to the last reading photodetector PD5, measured along the optical path. The second distance x is marked in Fig 2a and 3a as a somewhat thicker line. The delay τ is thus dependent on a third distance L between the trigger photodetector PDO and the last reading photodetector PD5, measured along the borderline between the core 12 and the first cladding 13:

x = L/sinα (2)

Thus, the delay τ becomes:

x • n, L - n. τ = = — (3) c₀ c₀-sιn«

where Co is the speed of light.

An alternative can be, not to have a separate trigger photodetector PDO, but to use one of the reading photodetectors PDl, PD2, PD3, PD4, PD5 also for that purpose. The third distance L will then still be defined as the distance between the reading photodetector PDl, PD2, PD3, PD4, PD5 working as trigger photodetector PDO and the last reading photodetector PD5.

Note however, that it is better to have a separate trigger photodetector PDO to prevent any distortions and/or mixing of clock and information bits. Further, the third distance L cannot be too short for practical reasons, e.g. would a third distance L=0 probably cause problems. The minimum distance possible depends on the speed of available electronics.

After the delay τ the first time slot A in a first time frame in the signal will have reached the last reading photodetector PD5. If the first distance d between neighbouring photodiodes is chosen correctly, then the second time slot B in the first time frame will at the same time have reached the last but one photodetector PD4 etc up to that the last time slot E in the first time frame at the same time will have reached the first photodetector PDl. This means that now there will be the beginning of one time slot A, B, C, D, E at each reading photodetector PDl, PD2, PD3, PD4, PD5. Thus, each reading photodetector PDl, PD2, PD3, PD4, PD5 is reading one channel A, B, C, D, E each.

If now each time slot corresponds to one bit, then the channels may be easily read by e.g. using as many D-flip- flops 21, 22, 23, 24, 25 as there are channels A, B, C, D, E to read, in this case five. The D-flip-flops 21, 22, 23, 24, 25 are fed with the clock pulse Ck which has the same period as the time frames in the optical signal 10, i.e. the clock pulse Ck has a bit rate that is the bit rate of the optical signal 10 divided with the number of time slots.

Thus, at the moment of the generation of the first clock pulse Ck, when the bits in the first frame reaches their respective reading photodetector PDl, PD2, PD3, PD4, PD5, then the leading front of the clock pulse Ck switches the D- flip-flops 21, 22, 23, 24, 25. The D-flip-flops 21, 22, 23, 24, 25 then generate respective output signals OutE, OutD, OutC, OutB, OutA containing information from a channel E, D, C, B, A each, in accordance with the state of the reading photodetectors PDl, PD2, PD3, PD4, PD5.

Until the next clock pulse Ck opens the D-flip-flops 21, 22, 23, 24, 25, the system does not respond to signals from the photodetectors PDl, PD2, PD3, PD4, PD5. All the D-flip-flops 21, 22, 23, 24, 25 are blocked during the time interval necessary for the bits in the next time frame to take their positions on the corresponding photodetectors PDl, PD2, PD3, PD4, PD5, whereupon the whole procedure starts all over again with the next frame.

Hence, the output OutE, OutD, OutC, OutB, OutA from a D- flip-flop 21, 22, 23, 24, 25 maintain the state of the previous bit until the corresponding bit from the next frame comes, thus creating a bit stream with a bit rate that is the bit rate of the optical signal 10 divided with the number of channels. The system requires synchronisation only to generate the first delay τ, but requires no synchronisation during further processing.

The first distance d, the angle α of incidence and height h of the waveguide will be related as:

d = 2h-tg α (4)

In Fig. 2b is shown an example of a time diagram for Fig. 2a. As an example the bits are sent according to the well- known code form RZ - Return to Zero. Simplified, this means that "0" is sent as "0", but "1" is sent as a pulse. This code form is often used for transmission over great distances. Note, however, that the invention is not restricted to the use of this code form. The result will be the same if e.g. the well-known code form NRZ - Non Return to zero - is used. Simplified, NRZ means that "0" is sent as "0" and "1" is sent as "1", instead of as a pulse.

In Fig. 2b the following bits are sent in a time frame in the optical signal 10, representing part of the five channels E, D, C, B, A: "11001". As earlier explained, when the trigger photodetector PDO senses the first bit "1", it will wait the time delay τ and then start generating a clock pulse Ck with a period equal to the time frame. The leading front of the clock pulse Ck switches on the D-flip-flops and the output signals are generated and kept constant until the next leading front of the clock pulse occurs. Thus, the "1", representing part of channel A is represented as a "1" in the fifth output signal OutA with a period which is the same as the period of the time frame in the optical signal 10.

Note that the output signals will comprise bits in the NRZ code form when using D-flip-flops, but the invention can easily be changed so that bits in the RZ code are obtained. In the embodiment in Fig. 2a, the optical signal 10 will lose power from the reflections and from the transmissions to the photodiodes PDO, PDl, PD2, PD3, PD4, PD5. Thus, the first output signal OutE will be stronger than the fifth output signal OutA. There are numerous known ways of taking care of this electrically. One example is shown in Fig. 2a. A resistor Rl, R2, R3, R4 , R5 is connected between each reading photodetector PDl, PD2, PD3, PD4, PD5 and its D- flip-flop 21, 22, 23, 24, 25. The first resistor Rl has a rather high resistance, the second resistor R2 has a lower resistance etc up to the fifth resistor R5 that has the lowest resistance. With a proper choice of resistances the output signals OutE, OutD, OutC, OutB, OutA will have equal magnitude .

An alternative is to use e.g. operational amplifiers instead of the resistors Rl, R2, R3, R4, R5 and consequently amplify the signal from the first reading photodetector PDl the least and the signal from the last reading photodetector PD5 the most. Amplification can also take place directly on the output signals OutE, OutD, OutC, OutB, OutA.

The problem with unequal power of optical pulses on the reading photodetectors PDl, PD2, PD3, PD4 , PD5 may be avoided or at least decreased by another embodiment of the invention shown in Fig. 3a.

The optical demultiplexer in Fig. 3a is similar to the optical demultiplexer in Fig. 2a, except that the first cladding 31 in Fig. 3a is different from that in Fig. 2a.

In Fig. 3a both the second refractive index n₂ of the first cladding 31 and the third refractive index n₃ of the second cladding 14 are chosen so that total reflection occurs:

α arcsin (n₂/nι) (5)

α ≤ arcsin (n₃/nι) (6) In Fig. 3a there is also a section 32 of the first cladding 31 under the trigger photodiode PDO which has a fourth refractive index n₄ which permits partial reflection and partial transmission.

The first cladding 31 is made from a material, which second refractive index n₂ is possible to change. A material that e.g. is possible to use as the first cladding 31 is lithium niobate LiNb0₃ covered with a transparent conductor. If a voltage of 5 V is applied over lithium niobate it will change its refractive index. There exist also other materials, e.g. polymers, which can be used for a similar purpose.

Since the section 32 is partially transmitting all the time, the trigger photodetector PDO will detect when an optical signal 10 is coming and triggers the clock generator 15, just as in Fig. 2a. After a time delay τ, the clock generator 15 will start generating clock pulses Ck with a period equal to the time of one time frame. These clock pulses Ck will be employed to change the voltage V over the first cladding 31 in order to change its second refractive index n₂.

One possibility is to connect electrodes on opposite sides of the first cladding 31 that are perpendicular to the border area between the first cladding 31 and the core 12, and to connect said electrodes to ground and to the clock signal Ck. Another possibility is to use a metal plate as the second cladding 14 and connect the metal plate to ground, while connecting the top of the first cladding 31 to the clock signal Ck. Other equivalent solutions are also conceivable.

Note that in the embodiment in Fig 3a it would be difficult to use the same photodiode for both triggering and reading. That would require that the cladding under said photodiode is always partially reflecting and partially transmitting and further possibly that proper circuits are used to distinguish the signals.

During the clock pulse Ck, which is of a length comparable to a bit, the second refractive index n₂ will be changed and the first cladding 31 will thus transmit the time slots, which will be detected by the reading photo detectors PDl, PD2, PD3, PD4, PD5. The rest of the time the optical signal 10 will be totally reflected by the first cladding until the next "reading position" of the time slots is reached. This will create a similar result as that in Fig. 2a, but without using D-flip-flops and without losing so much energy of the optical signal 10. However, in the embodiment of Fig. 3a the output signals Outl, Out2, 0ut3, Out4, Out5 will have shorter pulses than in Fig. 2a. But the period of the pulses of the output signals Outl, Out2, Out3, Out4, Out5 will be the same in both Fig. 2a and Fig. 3a. To make the output signals Outl, Out2, Out3, Out4, Out5 in Fig. 3a become like those in Fig. 2a, e.g. JK flip-flops may be used, which is shown in Fig. 4a and 4b.

In Fig. 4a the output signal Outl is connected to J and K inputs of a JK flip-flop 41. The clock pulse Ck is connected to a clock input of the JK flip-flop. A Q-output of the JK flip-flop gives out a first processed output signal Outla and is connected to a first input of a negative exclusive OR, i.e. NXOR, circuit 43. The Q-output of the JK flip-flop is further connected to a delay circuit 42, which delays the first processed output signal Outla for a time delay Δt and gives out a second processed output signal Outlb. The second processed output signal Outlb further enters a second input of the NXOR 43, which creates a compensated output signal OutE.

In Fig. 4b is shown an example of a time diagram on how the different signals in Fig. 4a may look. In short, a JK flip- flop works in the way that when both the J and the K input is low, then the Q output will keep the value that it had previously. When both the J and the K input is high, then the value on the Q output will change on the leading front of the clock pulse Ck.

If the output signal Outl (E) includes a first pulse 45, this will thus change the first processed output signal Outla and - a little later - the second processed output signal Outlb, so that they e.g. become high if we as an example presume that they earlier were low. During the time delay Δt, i.e. before the second processed output signal Outlb has changed to high, the first and second processed output signals Outla, Outlb will then be different and thus the compensated output signal OutE will become high. After the time delay Δt, the first and second processed output signals Outla, Outlb will then be the same and thus the compensated output signal OutE will become low. Hence, a compensated pulse 46 will be created, corresponding to a "1", following RZ . The invention can easily be changed so that bits in the NRZ code are obtained if that is the wish.

If the output signal Outl (E) does not include a pulse, but is simply low 47, then the first and second processed output signals Outla, Outlb will both continue to be high or low, whatever they were earlier. Consequently, the compensated output signal OutE will become low, corresponding to a "0", following RZ .

In the earlier described embodiments the optical signal travelled in the waveguide two-dimensionally, i.e. in one plane. However, if the optical signal 10 has a relatively low bit rate, corresponding to longer time frames, then that would entail a very long distance between the photodetectors. In this case it can be a good idea to use a bulk waveguide with a spiral pathway of the optical signal 10, see Fig. 5, i.e. making the optical signal 20 travel in three dimensions. Since the optical path in this way will be longer it is possible to place the photodetectors closer to each other. In Fig. 5 a waveguide with four sides is used, but any number of sides is possible. The more sides that are used, the more reflections there will be on one revolution and the closer the photodetectors may be placed to each other.

The present invention, as any of the embodiments described above, may also be used to take care of timeslots containing more than one bit. Then two things must be considered. First, the light path between the adjacent reading photodetectors must be longer to provide necessary time delay. That is in order to make the adjacent reading photodetectors read bits from different words and not the same word. A possible solution can then be to use e.g. a helical structure similar to that in Fig. 5, which will make the light path much longer.

Further, the time delay from the clock generator must of course be adjusted appropriately. Extraction of bit streams from each particular frame - containing now the whole word - should preferably be controlled by a separate clock generator for each separated channel.

Claims

1. Optical demultiplexer for demultiplexing an optical signal (10) including at least two channels (A, B, C, D, E) sent in time slots (A, B, C, D, E, F) in time frames, said optical demultiplexer including a waveguide (11) with a core (12) and at least one cladding (13, 14, 31), c h a r a c t e r i z e d in that at least one channel reader device (PDl, PD2, PD3, PD4, PD5) is provided, in that the optical signal (10) is reflected on the cladding or claddings (13, 14, 31) in at least one reflection point (16, 17) and in that each channel reader device (PDl, PD2, PD3, PD4, PD5) is attached in the nearness of one of the at least one reflection points (16) each.

2. Optical demultiplexer according to claim 1-6, c h a r a c t e r i z e d in that the optical demultiplexer further includes a trigger device (PDO) and a clock generator (15), in that said trigger device (PDO) is arranged to detect the start of a time frame and in that the clock generator (15) is arranged to produce clock pulses (Ck) for the channel reading.

3. Optical demultiplexer according to claim 1 or 2, c h a r a c t e r i z e d in that a section of the cladding (13) under the at least one channel reader device (PDl, PD2, PD3, PD4, PD5) is partially reflecting and partially transmitting.

4. Optical demultiplexer according to claim 3, c h a r a c t e r i z e d in that a D-flip-flop (21, 22, 23, 24, 25) is connected to each channel reader device (PDl, PD2, PD3, PD4, PD5) .

5. Optical demultiplexer according to claim 1 or 2, c h a r a c t e r i z e d in that a section of the cladding (31) under the at least one channel reader device (PDl, PD2, PD3, PD4, PD5) is made of a material that normally is reflecting, but which may be changed to be temporarily transmitting.

6. Optical demultiplexer according to claim 5, c h a r a c t e r i z e d in that said material is a nonlinear optical material with a transparent conductive layer, e.g. lithium niobite.

7. Optical demultiplexer according to claim 5 or 6, c h a r a c t e r i z e d in that the material of the cladding (31) under the at least one channel reader device (PDl, PD2, PD3, PD4, PD5) is arranged to change its properties following the clock pulses so that said cladding is transmittive when the channels are read.

8. Optical demultiplexer according to any of the claims 1-7, c h a r a c t e r i z e d in that the channel reader devices (PDl, PD2, PD3, PD4, PD5) and the trigger device (PDO) are photodetectors .

9. Method for demultiplexing a time division multiplexed optical signal (10) including at least one time frame with at least two time slots (A, B, C, D, E) , c h a r a c t e r i z e d by the following steps:

- a) transmitting the optical signal (10) in a waveguide (11) with at least one channel reader device (PDl, PD2, PD3, PD4, PD5) attached;

- b) waiting until each time slot (A, B, C, D, E) that is to be read of a first timeframe is positioned near a channel reader device (PDl, PD2, PD3, PD4, PD5) each;

- c) reading the time slots (A, B, C, D, E) ; and

- d) repeating steps b) and c) for subsequent timeframes.

10. Method according to claim 9, c h a r a c t e r i z e d by the following steps: - transforming the information in the time slots (A, B, C, D, E) into electrical signals by using photodiodes or similar as channel reader devices (PDl, PD2, PD3, PD4, PD5) .

11. Method according to claim 9 or 10, c h a r a c t e r i z e d by the following steps:

- detecting the start of a time frame;

- waiting a predetermined start time delay;

- producing clock pulses (Ck) with a period that is the same as the time between which a certain time slot (A, B,

C, D, E) from different time frames is positioned near its channel reader device (PDl, PD2, PD3, PD4, PD5) .

12. Method according to any of the claims 9-11, c h a r a c t e r i z e d in that the waveguide (11) includes at least one cladding (31) to which the at least one channel reader device (PDl, PD2, PD3, PD4, PD5) is attached, and by the following steps:

- changing said at least one cladding (31) between reflective and transmittive, following the clock pulses (Ck) , so that said at least one cladding (31) is transmittive when the channels are read.