WO2002058230A1

WO2002058230A1 - Intelligent switching mode power amplifying apparatus

Info

Publication number: WO2002058230A1
Application number: PCT/KR2002/000105
Authority: WO
Inventors: Youngwoo Kwon; Junghyun Kim; Sang Hwa Jung; Hyun Il Kang
Original assignee: Wavics Co., Ltd.
Priority date: 2001-01-22
Filing date: 2002-01-21
Publication date: 2002-07-25
Also published as: KR20020062512A; KR100385643B1

Abstract

Disclosed is an intelligent switching mode power amplifying apparatus. According to the apparatus of the invention, a power stage is differently operated in three modes according to the amplitude of an output power of a power amplifier module to ensure a high efficiency even with a low output power, and a variable output matching block uses two switches to obtain power amplifiers which are simplified and small-sized compared to a complicated switching mode power amplifier module of the related art as well as to decrease the loss due to the switches by a large margin. Further, a variable gain amplifying stage is operated corresponding to the three modes so that the power amplifier module can be maximized in linearity. Therefore, the invention can prolong the maximum-talk time and improve talk quality in the portable terminal having the power amplifier.

Description

INTELLIGENT SWITCHING MODE POWER AMPLIFYING

APPARATUS

TECHNICAL FIELD The present invention relates to a power amplifying apparatus of a wireless communication device and, in particular, to an intelligent switching mode power amplifying apparatus which has high efficiency and linearity, ensuring the longer maximum talk-time and excellent communication quality.

BACKGROUND ART

Recently, owing to the rapid development in the wireless communication technology, people can communicate and share information with others without time or place restrictions. However, as more and more people use the wireless communication services, various problems with the present wireless communication services have been recognized and the demand for solving such problems accordingly increases rapidly. Some of such problems are the short maximum talk- time and the poor communication quality of cellular phones. The maximum talk- time of a cellular phone is closely related to the capacity of the cellular phone battery. Many of relatively small and light batteries, which last longer than the older battery products, are continuously introduced in the market. However, these battery products still cannot satisfy the consumers' demand for better batteries for cellular phones. This is primarily because the high-frequency power amplifier module of a cellular phone in the related art has low efficiency. The high- frequency power amplifier module consumes the significantly large portion of the entire power supplied to the whole system of a cellular phone. Thus, the low efficiency of a high-frequency power amplifier module greatly lowers the efficiency of the entire system and causes the maximum talk-time to be shortened. Accordingly, various researches have been conducted in order to improve the efficiency of the high-frequency power amplifier module.

The recent research on methods to raise the efficiency of a high-frequency power amplifier module tends to focus on the switching mode power amplifier module. As a method to operate the power stage of a switching mode power amplifier module in accordance with various conditions, a bypass method is frequently used. According to this method, if a low output power is required, the power is outputted bypassing the power stage (without going through the power stage). Even in this method, switches are generally used to control the power stage path and the bypass path.

If switches are used for different operations in different modes of the output power, the input/output of the power stage must be implemented with a variable matching circuit structure or, otherwise, independent input/output matching circuits must be arranged on the paths distinguished for the respective modes. However, it is difficult to actually implement an input/output variable matching circuit. Furthermore, if independent input/output matching circuits are located on the respective paths, the circuits become very complex. Resultantly, the size of the entire system needs be increased. Moreover, if a bypass circuit is used for the operation, the resulting structure would be the two-way structure, having the high mode and the low mode of the output power, which may limitedly be effective only as to some extraordinarily small output power.

In summary, in order to resolve the problems in the current wireless communication devices such as the limited maximum talk-time and the poor communication quality caused by the power amplifier's distortion, it is highly required to achieve the technological development in the power supplier module and to improve the efficiency of the high-frequency power amplifier module and the linearity and ultimately to implement high-quality wireless communication services.

DISCLOSURE OF THE INVENTION

An object of the invention is to solve the above problems and disadvantages of the related art.

It is, therefore, an object of the invention to provide an intelligent switching mode power amplifying apparatus with the extended maximum talk-time, by improving the efficiency of a high-frequency power amplifier module of a wireless communication device.

It is another object of the invention to provide an intelligent switching mode power amplifying apparatus with the enhanced communication quality, by improving the linearity of a high-frequency power amplifier module of a wireless communication device.

In order to achieve the above-mentioned objects, the present invention provides an intelligent switching mode power amplifying apparatus comprising: a drive stage for supplying driving power; a power stage for amplifying outputs from the drive stage; an inter-stage unit arranged between the drive stage and the power stage for matching the input impedance of the power stage to the drive stage; a variable output matching unit for performing the matching of three modes according to the amplitude of the output from the power stage; and a variable gain amplifying stage arranged at the front end of the drive stage for operation according to the respective modes to maintain the linearity of the output unit. Preferably, the inter-stage unit may comprise a locked inter-stage matching unit.

Preferably, the variable gain amplifying stage has a dual gate field effect transistor (FET) and optimizes the linearity by using the variable gain characteristics and phase characteristics of the relevant modes. Also, preferably, the variable output matching unit may comprise two switching units connected through a serial connection. The switching units may be constituted with diodes or micro electro-mechanical systems (MEMS).

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 illustrates an ordinary switching mode power amplifying apparatus to which the present invention has been applied.

Fig. 2 illustrates in detail the inter-stage unit of Fig. 1 in more detail. Fig. 3 illustrates in detail the inter-stage unit of an intelligent switching mode power amplifying apparatus according to the present invention. Fig. 4 illustrates the gain characteristic of each of the respective modes at the inter-stage unit shown in Fig. 3.

Fig. 5 illustrates the variable gain amplifying stage of an intelligent switching mode power amplifying apparatus according to the present invention.

Fig. 6 illustrates the gain characteristic of each of the respective modes at the variable gain amplifying stage shown in Fig. 5.

Fig. 7 illustrates an embodiment of a variable output matching unit of an intelligent switching mode power amplifying apparatus according to the present invention.

Fig. 8 illustrates the variable output matching unit shown in Fig. 7 in mode 1. Fig. 9 illustrates the variable output matching unit shown in Fig. 7 in mode 2.

Fig. 10 illustrates the variable output matching unit shown in Fig. 7 in mode 3. Fig. 11 illustrates matching impedances for the optimum output power in the respective modes of the power stage of Fig. 1 and the tracks for such matching displayed on the Smith chart.

Fig. 12 illustrates another embodiment of the variable output matching unit of an intelligent switching mode power amplifying apparatus according to the present invention.

Fig. 13 illustrates still another embodiment of the variable output matching unit of an intelligent switching mode power amplifying apparatus according to the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

Reference will now be made in detail to the power amplifying apparatus of the present invention as illustrated in the accompanying drawings.

As illustrated in Fig. 1, a power amplifying apparatus according to the present invention 300 comprises a variable gain amplifying stage 100, a drive stage 110, a detection unit 120, a mode selection logic circuit unit 130, a control unit 140, an interstage circuit unit 150, a power stage 160 and a variable output matching unit

170.

The variable gain amplifying stage 100 can be constituted by a variable gain amplifier. The drive stage 110 can be constituted by a drive amplifier. The power stage 160, for example, can be divided equally by four power amplifiers 162, 164, 166 and 168, which are connected in parallel.

The variable gain amplifying stage 100 ensures the linearity in the overall circuit of the power amplifying apparatus 300, while adjusting the gain amplitude and phase characteristics of the circuit in a consistent manner. The detection unit 120 detects the amplitude of an input inputted from an input terminal 70. The power stage 160's independent bias application and the mode selection corresponding to the amplitude of an input signal are performed by the mode selection logic circuit unit 130 and the control unit 140, according to the amplitude the input detected at the input terminal 70 through the detection unit 120. The mode selection logic circuit unit 130 distinguishes modes of a few kinds according to the amplitude of the input detected by the detection unit 120. The mode selection logic circuit unit 130 is constituted by a logic circuit having four combinations of two digital signals 0 and 1. The mode selection logic circuit unit 130 controls biases of the variable gain amplifying stage 100 and the power stage 160, and enables the control unit 140 constituted by a simple digital logic circuit to control the variable output matching unit 170 according to the relevant operation mode.

The interstage unit 150, as illustrated in Fig. 2, can be constituted by a variable interstage matching unit 152 and a switching unit 154. The interstage unit 150 operates each of the power amplifiers 162, 164, 166 and 168 according to the distinguished, independent paths 82, 84, 86 and 88 of the power stage 160 as shown in Fig. 1 and uses the switching unit 154 according to the amplitude of the required output power to open or close the paths 82, 84, 86 and 88. Preferably, depending on the number of currently-operating transistors among transistors on the four paths 82, 84, 86 and 88, the input impedance of the power stage 160 varies. Thus, the variable interstage matching unit 152 is used in order to match the input impedance of the power stage 160 to the drive stage 110.

Further, as illustrated in Fig. 3, in order to avoid using switches and a complicated variable interstage matching unit, the interstage unit 150 can alternatively be constituted by a locked interstage matching unit 156, which is locked to the input impedance (1/4) Z_ΪN-_MAIN of the power stage 160, which is the input impedance when all of the four paths 82, 84, 86 and 88 are operated, instead of using the variable interstage matching unit 152 and the switching unit 154 shown in Fig. 2. Even when the bias is applied to the transistor on each relevant path among the four paths 82, 84, 86 and 88 of the power stage 160 according to the required power and if the dormant path(s) is/are applied with the drain voltage of ON, the input impedance has no substantial variation at the input of the each power amplifier 162, 164, 166 or 168. Thus, it is not necessary to use the variable interstage matching unit 152 and the switching circuit unit 154 shown in Fig. 2. In other words, the input impedances ZIΝ-MAΓΝI, ZΓΝ-MAIΝ2, ZIN-MAΓN3 and ZΓN-MAIN4 are locked to the same value Z_ΪN-_MAIN regardless of the operation mode.

If the interstage unit 150 is constituted by the locked interstage matching unit 156 illustrated in Fig. 3 rather than by switches, the loss in each operation mode with the respective number of operating paths is as shown in Fig. 4. More specifically, in mode 1 where the output power's amplitude is small, only one of four paths 82, 84, 86 and 88 is operated and 25% of the input power is applied to that one operative path, and the rest of the input power is applied to the other dormant paths. In mode 2 where the amplitude of the output power is in the middle level, two of the four paths are operated and 50% of the input power is applied to such two paths, hi mode 3 where the amplitude of the output power is large, all of the four paths 82, 84, 86 and 88 are operated and thus the amplification is performed in the respective power amplifiers 162, 164, 166 and 168 without any loss in the input power. As illustrated in Fig. 4, when the input power has the loss of 6 dB and 3dB respectively in mode 1 and mode 2, the variable gain amplifying stage 100 must operate having the gain characteristics illustrated in Fig. 4, in order to obtain the constant output gain regardless of the relevant mode. Preferably, the drive stage 110 is always operated in a consistent manner. As illustrated in Fig. 5, the variable gain amplifying stage 100 comprises a dual gate FET DG1 for amplifying variable gains, a variable gain amplification input matching unit 102 arranged between the first gate bias terminal of the dual gate FET DG1 and the input terminal 70, the output terminal 74 of the mode selection logic circuit unit 130 comiected to the second gate bias terminal 106, and a variable gain amplification output matching unit 104 arranged between a source terminal and the drive stage 110.

The dual gate FET DG1 may vary the gains by a large margin. By adjusting the bias of the second gate bias terminal NG2 106, the output power characteristics corresponding to the input power of the input terminal 70 may have the result illustrated in Fig. 6. As illustrated in Fig. 6, in mode 1 and in mode 2, the operation results in the high output gains of 6dB and 3dB respectively. Accordingly, the loss caused by the path dissipation in Fig. 4 for not using the switching unit 154 of Fig. 2 may be compensated and furthermore the linearity of the power amplifier may be optimized. The different gain in each mode illustrated in Fig. 4 causes the discontinuity of gain at the time of mode conversion, which is the cause of a great degree of non- linearity in the power amplifier circuit. Furthermore, the different gain in each mode illustrated in Fig. 4 deteriorates the Adjacent Channel Power Rejection (ACPR) characteristic of the power amplifier. According to the present invention, because the variable gain amplifying stage 100 may obtain a different gain in a different driving mode, the non-linearity problem caused by the discontinuity of gain may be resolved. Further, by inducing the optimal phase characteristics for each driving mode, the AM-PM modulation characteristics, that greatly affect the non- linearity of all power amplifiers, may also be improved. The independent operation of each operation mode may not be implemented with a locked output power-matching unit. Thus, the variable output matching unit 170, that reacts differently in each mode, is used for such independent operation of each operation mode. As illustrated in Fig. 7, the variable output matching unit 170, to match the output power of the power amplifier, comprises four inductors 222, 224, 226 and 228, four capacitors 232, 234, 236 and 238, and two switching units 180 and 190 controlled by the control unit 140. Preferably, the switching units 180 and 190 are respectively constituted by simple switches 182 and 192, which are connected to each other through the serial connection. The inductance of the inductors 222, 224 and 226 are identical, but the inductance of the inductor 228 is different. Preferably, the matching unit is constructed using a multi-section that constitutes a matching unit within the area of the constant Q value on the Smith chart, for the purpose of ensuring a certain bandwidth.

In mode 1 where only one of the four paths is operated, if the serial switches 182 and 192 of Fig. 7 are on, the resulting equivalent circuit of the variable output matching unit 170 is as illustrated in Fig. 8. In other words, the equivalent circuit of the variable output matching unit 170 is composed of: a component comprising three inductors 222, 224 and 226 connected in parallel; 4x Z₀pτ component comprising the inductor 228 and the capacitors 236 and 238 for the optimum output power; and 3x C₀fr component in the three dormant paths. Preferably, the inductors 222, 224 and 226 and the C_0ff component are designed to resonate together. Then, the three inductors 222, 224 and 226 connected in parallel and the 3x C₀f_f component resonate together, resultantly accomplishing the output power matching to 4x Z₀pτ in a simple manner.

In mode 2 where only two of the paths are operated, if the switch 182 of Fig. 7 is on and the switch 192 of Fig. 7 is off, the resulting equivalent circuit of the variable output matching unit 170 is as illustrated in Fig. 9. The equivalent circuit of the variable output matching unit 170 is composed of: a component comprising the two inductors 222 and 224 connected in parallel; 2x Z_OPT component comprising the inductors 226 and 228 and the capacitors 234, 236 and 238 for the optimum output power; and 2x C_0ff component in the two dormant paths. In this mode also, the two inductors 222 and 224 connected in parallel and the 2x C₀fr component resonate together and resultantly accomplishes the output power matching to 2x Z_OPT in a simple manner.

In mode 3 where all of the four paths are operated, the resulting equivalent circuit of the variable output matching unit 170 of Fig. 7 is as illustrated in Fig. 10.

The equivalent circuit of the variable output matching unit 170 includes: the inductors 222, 224, 226 and 228 and the capacitors 232, 234, 236 and 238. Also in this mode, the inductors 222, 224, 226 and 228 and the capacitors 232, 234, 236 and

238 resonate together and resultantly accomplish the output power matching to Z_OPT in a simple manner. Fig. 11 illustrates the matching impedances for the optimum output power in each of the three modes and the tracks for such matching on the Smith chart of the power stage 170.

As illustrated in Fig. 12, the switching units 180 and 190 of Fig. 7 may also be constituted by PIN diodes 184 and 194 rather than by the switches 182 and 192. The external control unit 140 applies the bias to open/close the two PIN diodes 184 and 194. Resultantly, it is possible to obtain the insertion loss and isolation characteristic of a satisfactory level. However, in order for PIN diodes 184 and 194 to operate at a high power level, the sizes of such PIN diodes 184 and 194 must be very large. Such large diodes would increase the size of the power amplifier module. Further, the severe non-linearity of the PIN diodes 184 and 194 may deteriorate the ACPR characteristics of the power amplifier.

Also, as illustrated in Fig. 13, the switching units 180 and 190 may be constituted by high-frequency MEMS switches 186 and 196 rather than by the PIN diodes 184 and 194. The controller 142 of the external control unit 140 applies the bias to operate the high-frequency MEMS switches 186 and 196. If it is necessary, a DC-DC converter 144 can also be used simultaneously to increase the bias.

By using high-frequency MEMS switches 186 and 196, not only the insertion loss and isolation characteristics are improved but also great advantages are obtained in terms of the size and the yield, because the high-frequency MEMS switches 186 and 196 may be manufactured through the chip manufacturing process.

Moreover, because the high-frequency MEMS switches 186 and 196 are operated mechanically, there is no non-linearity problem, which is the concern in the case of the PIN diodes. Therefore, the linearity of the overall power amplifier module 300 may be improved. As explained above, the power amplifying apparatus of the present invention may maintain the high efficiency even when the output power is lowered, because the power stage is operated in three distinguished modes according to the amplitude of the output power of the power amplifier module. Also, by using two switches in the variable output matching unit, a very simple and minimized power amplifier may be implemented unlike other complex switch mode power amplifier module. Additionally, the loss usually caused by switches may be reduced to a great extent. Furthermore, according to the present invention, MEMS switches may be employed as the switches instead of the PIN diodes of the related art, resultantly maximizing the linearity characteristics. Also, by having the variable gain amplifying stage operate according to three different modes, the linearity of the power amplifier module can be maximized.

Consequently, the present invention has the effect of prolonging the maximum talk-time and improving the communication quality of a wireless communication device having a power amplifier.

The foregoing embodiments and advantages are merely exemplary and are not to be construed as limiting the present invention. The present teaching can be readily applied to other types of apparatuses. The description of the present invention is intended to be illustrative, and not to limit the scope of the claims. Many alternatives, modifications, and variations will be apparent to those skilled in the art.

Claims

WHAT IS CLAIMED IS:

1. A power amplifying apparatus comprising: a drive stage for supplying driving power; a power stage for amplifying outputs from the drive stage; an interstage unit arranged between the drive stage and the power stage, for matching the input impedance of the power stage to the drive stage; a variable output matching unit for performing the matching of three modes according to the amplitude of the output from the power stage; and a variable gain amplifying stage arranged at the front end of the drive stage, for operation according to the respective modes to maintain the linearity of the output unit.

2. The power amplifying apparatus of claim 1, wherein said interstage unit is constituted by a locked interstage matching unit rather than by switches.

3. The power amplifying apparatus of claim 1, wherein said variable gain amplifying stage optimizes the linearity by using variable gain characteristics and phase characteristics that are different from mode to mode.

4. The power amplifying apparatus of claim 1, wherein said variable output matching unit can optimize outputs in the three modes merely by using two switching units connected by a serial connection.

5. The power amplifying apparatus of claim 4, wherein said switching units comprise diodes.

6. The power amplifying apparatus of claim 4, wherein said switching units comprise MEMS (Micro Electro-Mechanical Systems) switches.

7. The power amplifying apparatus of claim 1, wherein said variable gain amplifying stage comprises a dual gate FET.