WO2002054608A1 - A radio receiver - Google Patents
A radio receiver Download PDFInfo
- Publication number
- WO2002054608A1 WO2002054608A1 PCT/IE2001/000158 IE0100158W WO02054608A1 WO 2002054608 A1 WO2002054608 A1 WO 2002054608A1 IE 0100158 W IE0100158 W IE 0100158W WO 02054608 A1 WO02054608 A1 WO 02054608A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- signal
- radio receiver
- frequency
- data
- data carrying
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/1027—Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal
- H04B1/1036—Means associated with receiver for limiting or suppressing noise or interference assessing signal quality or detecting noise/interference for the received signal with automatic suppression of narrow band noise or interference, e.g. by using tuneable notch filters
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/109—Means associated with receiver for limiting or suppressing noise or interference by improving strong signal performance of the receiver when strong unwanted signals are present at the receiver input
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/26—Circuits for superheterodyne receivers
- H04B1/28—Circuits for superheterodyne receivers the receiver comprising at least one semiconductor device having three or more electrodes
Definitions
- the present invention relates to a radio receiver, and in particular, though not limited to a radio receiver for receiving a data signal for relaying to an electronic control unit of the type used in security apparatus for a vehicle, for example, a motor vehicle, and the invention typically relates to a radio receiver of the type suitable for relaying a data signal to an electronic control unit of a remote keyless entry system of a motor vehicle.
- Remote keyless entry systems for motor vehicles in general, comprise an electronic control unit which controls various components in the motor vehicle, for example, an alarm circuit, a vehicle immobiliser unit, the central locking system of the vehicle and other security aspects of the vehicle which protect the vehicle when unattended.
- a radio receiver which may be incorporated in the electronic control unit, or may be a stand alone receiver communicating with the electronic control unit receives remotely transmitted signals, which are typically transmitted from a remote transmitter, for example, a keyfob transmitter.
- the transmitted signals in general, comprise a preamble followed by a code.
- the preamble typically is common to a number of electronic control units of similar type, and the code is unique to one specific control unit.
- the electronic control unit On reception of a valid signal with a code specific to the electronic control unit the electronic control unit changes the state of the various components of the vehicle which it controls. For example, in the case of an alarm circuit, if the alarm circuit is armed, on reception of a valid unique signal the electronic control unit disarms the alarm circuit, and vice versa. In the case of the vehicle immobiliser unit if the vehicle is immobilised by the immobiliser unit, on reception of the valid unique signal the vehicle immobiliser unit is deactivated from mobilising the vehicle, and vice versa. Similarly, in the case of the central locking system if the doors of the vehicle are locked, on reception of a valid unique signal the electronic control unit operates the central locking system for unlocking the doors, and vice versa.
- a signal analysing unit for analysing received signals for determining if a received signal is a valid type signal, in other words, comprises a valid type preamble, and if the code contained in the received signal is the unique code specific to the control unit.
- the radio receiver relays the received signal to the analysing circuit which in turn analyses the received signal.
- the control unit On the signal analysing unit determining that the received signal is a valid type signal, and that the code of the received signal is the unique code specific to the control unit, the control unit then operates the various components of the motor vehicle which it controls from one state to the other as already described.
- the signal analysing unit may be a stand alone circuit, or it may be incorporated in the control unit.
- signal analysing units tend to be sensitive to noise, and in many cases interpret noise as part of the data, for example, the preamble or the code embedded in the received signal. This, thus, has serious consequences in that in a noisy environment a signal analysing unit may fail to detect a valid type signal with a unique code specific to the control unit due to the presence of noise in the signal. In extreme cases, a signal analysing unit may determine an invalid signal which does not contain a unique code specific to the control unit as being a valid type signal with the appropriate unique code due to the presence of noise.
- signal analysing units tend to have a relatively high power requirement, and in order not to miss a valid signal with the appropriate unique code specific to the control circuit, it is necessary for such signal analysing units to be maintained in an active state substantially constantly.
- a circuit which minimises the risk of such a signal analysing unit mis-detecting a received valid signal with a unique code embedded therein specific to a control unit associated with the signal analysing unit as being an invalid signal, and vice versa. It is also desirable that a circuit be provided which minimises the risk of a spurious signal being determined by such a signal analysing unit as being a valid type signal. There is also a need for such a circuit which minimises the power requirement of such a signal analysing unit.
- the present invention is directed towards providing such a circuit.
- a radio receiver for receiving a remotely transmitted data carrying signal, wherein the radio receiver comprises a receiving means for receiving the data carrying signal having data embedded therein, a first analysing means for determining the presence of noise in the received signal, an attenuating means for attenuating the signal to suppress noise in the signal to a level where the effect of the noise on the signal is minimised, and a control means for operating the attenuating means in response to the first analysing means determining the presence of noise in the received signal.
- the attenuating means suppresses the noise in the signal to a level where the signal is substantially noise free.
- a demodulating means for demodulating the data carrying signal, and for outputting a data signal comprising the embedded data from the data carrying signal.
- the first analysing means analyses the data signal outputted by the demodulating means, and the attenuating means is responsive to the first analysing means detecting the presence of noise in the data signal.
- an amplifying means is provided for amplifying the attenuated data carrying signal from the attenuating means prior to demodulation thereof.
- the attenuating means comprises an impedance means selectively connectable between a line carrying the data carrying signal and ground for reducing the amplitude of the data carrying signal, and in turn the amplitude of the noise.
- the impedance means is a selectively variable impedance.
- the impedance means is a resistive impedance means.
- the resistive impedance means comprises a plurality of resistors selectively connectable between the line carrying the data carrying signal and ground.
- each resistor is selectively connectable between the line carrying the data carrying signal and ground by a switch means, the respective switch means being responsive to the first analysing means for selectively varying the level of attenuation of the data carrying signal.
- the resistors are connected in parallel between the line carrying the data carrying signal and ground, each resistor being selectively connectable between the line carrying the data carrying signal and ground by a corresponding one of the switch means.
- the resistance values of the respective resistors are different for increasing the range of selectable levels of attenuation of the data carrying signal.
- a second analysing means for determining the presence of a data carrying signal.
- the second analysing means analyses the data signal from the demodulating means.
- the second analysing means determines the time between data edges of the received data signals for determining if the data format of a received signal corresponds to the format of a valid data carrying signal.
- a means for sequentially sweeping the receiving frequency of the radio receiver through a predetermined frequency bandwidth in predetermined frequency steps is provided, the means for sweeping the receiving frequency through the predetermined frequency bandwidth being responsive to the control means for holding the receiving frequency constant in response to the second analysing means determining the presence of a data carrying signal.
- the means for sequentially sweeping the receiving frequency through the predetermined frequency bandwidth holds the receiving frequency constant in response to the control means for a predetermined time period.
- the predetermined period during which the receiving frequency is held constant is a predetermined time period sufficient for allowing a data carrying signal to be received and analysed.
- the means for sweeping the receiving frequency through the predetermined frequency bandwidth comprises a variable frequency oscillator for outputting a variable frequency signal, and for stepping the variable frequency signal through a plurality of frequency steps, and a mixer for mixing the variable frequency signal with a received signal, the frequency of the variable frequency signal outputted by the variable frequency oscillator being such that over the predetermined frequency bandwidth at which it is desired to receive data carrying signals the difference between each step frequency of the variable frequency signal and each step frequency in the predetermined frequency bandwidth is a constant intermediate frequency such that the frequency of the data carrying signals outputted from the mixer is at a constant intermediate frequency.
- the data carrying signal outputted by the mixer is filtered through an intermediate frequency filter for filtering out signals of frequency other than those of the constant intermediate frequency.
- the attenuating means attenuates the signal outputted by the intermediate frequency filter.
- variable frequency oscillator comprises a voltage controlled oscillator.
- a gate circuit for selectively outputting data signals from the radio receiver, the gate circuit being responsive to the control means for outputting the data signals in response to the second analysing means determining that the data signal from a received data carrying signal is of a format corresponding to the format of a valid type data carrying signal.
- control means comprises a microcontroller.
- the micro-controller is programmed to act as the first analysing means.
- the micro-controller is programmed to act as the second receiving means.
- the invention provides an electronic control unit for a security system of a motor vehicle, the electronic control unit comprising a radio receiver according to the invention.
- the invention provides a remote keyless entry system for a motor vehicle, the remote keyless entry system comprising a radio receiver according to the invention.
- the output data signal from the radio receiver is outputted to an electronic control unit of the remote keyless entry system.
- the radio receiver comprises an attenuating means for attenuating the received signal should noise be detected therein, the risk of a signal analysing circuit or unit to which the attenuated received signal is relayed failing to detect a valid signal having a unique code specific to a control unit of a remote keyless entry system of a motor vehicle associated with the signal analysing unit and the radio receiver is minimised. Additionally, the risk of such a signal analysing circuit or unit detecting an invalid signal with a code not unique to the control unit as being a valid signal containing such a unique code specific to the control unit is likewise minimised.
- the radio receiver also comprises a gate circuit which only outputs data signals of valid type format
- any circuit or unit to which the data signals are outputted may be maintained in a sleep mode except when a data signal is being outputted thereto from the radio receiver, thus significantly reducing the power requirement of the signal analysing unit.
- Fig. 1 is a block representation of a radio receiver according to the invention
- Fig. 2 illustrates a staircase frequency signal generated by a local oscillator of the receiver of Fig. 1.
- a radio receiver according to the invention which is indicated generally by the reference numeral 1 for use in a remote keyless entry system also according to the invention of a motor vehicle.
- the remote keyless entry system is of the type which comprises an electronic control unit 2 which controls a number of components in the motor vehicle, for example, an alarm circuit for alarming the vehicle when unattended, a vehicle immobiliser unit for immobilising the vehicle when unattended, and a central locking system for operating the door locks of the vehicle.
- a signal analysing unit 3 receives data signals from the radio receiver 1 for analysing thereof.
- the remote keyless entry system is responsive to reception of a transmitted data carrying signal transmitted by a remote transmitter, for example, a keyfob transmitter where the transmitted data carrying signal is a radio frequency signal comprising data embedded therein.
- the data embedded in the signal comprises a preamble and a code.
- the preamble is common to a large number of remote keyless entry systems of the type according to the invention, however, the code is unique to one specific control unit 2.
- the control unit 2 is responsive to the signal analysing unit 3 determining that the embedded data in a received signal comprises a valid preamble and a unique code which is specific to the control unit 2 for switching the components controlled by the control unit from one state to the other. For example, if the alarm circuit and the vehicle immobiliser unit are in the armed state, on receipt of a valid signal with the unique code specific to the control unit 2, the control unit 2 switches the alarm circuit and the vehicle immobiliser unit to the disarmed state, and vice versa.
- control unit 2 On receipt of a signal with a valid preamble and a code unique to the specific control unit 2, the control unit 2 operates the central locking system of the motor vehicle from the locked to the unlocked state if prior to reception of the received signal the central locking system is in the locked state, and vice versa if the central locking system is in the unlocked state on receipt of the signal.
- the radio receiver 1 is a narrow band variable frequency radio receiver for receiving transmitted signals within a predetermined frequency bandwidth from a lower frequency of 433.72MHz to an upper frequency of 434.12MHz transmitted by the keyfob transmitter (not shown) at randomly selected frequencies.
- the keyfob transmitter (not shown) may be of the type which transmits the data carrying signals at two randomly selected frequencies within the predetermined frequency bandwidth simultaneously, or sequentially, or may transmit the data carrying signals at one randomly selected frequency within the predetermined frequency bandwidth.
- Each time the remote transmitter is operated to transmit the data carrying signal a different frequency to that of the previous frequency of transmission is selected.
- the remote transmitter is capable of selecting any one of ten frequencies between and including the lower frequency of 433.72MHz and the upper frequency of 434.12MHz in equal incremental frequency steps of 40KHz.
- the radio receiver comprises a control means, in this embodiment of the invention a micro-controller 4, which under the control of software controls the radio receiver 1 as will be described below.
- a receiving means namely, an antenna 5 which receives transmitted signals which are fed to a saw filter 6 which filters out signals of frequencies below the lower frequency of 433.72MHz, and above the upper frequency of 434.12MHz of the predetermined frequency bandwidth.
- a means for sweeping the receiving frequency of the radio receiver 1 for receiving transmitted signals at the respective ten frequency steps of the predetermined frequency bandwidth comprises a voltage controlled variable frequency local oscillator 8, which under the control of the micro-controller 4 sequentially steps its output frequency through ten equal steps from a lower frequency value of 423.02MHz to an upper frequency value of 423.42MHz in the form of a staircase frequency signal. The ten steps include the respective upper and lower frequency values.
- a mixer 9 mixes the received signals with the variable frequency signals outputted from the local oscillator 8, and in turn outputs two signals, one of frequency which is equal to the sum of the variable frequency signal from the oscillator 8 and the frequency of the received signal, and the other which is equal to the difference of the respective variable frequency signal and the frequency of the received signal.
- the lower and upper frequencies of the variable frequency signal of the oscillator 8 to be of 423.02MHz and 423.42MHz, respectively
- the difference between the lower frequency of 433.72MHz of the predetermined frequency bandwidth and the lower value of 423.02MHz of the variable frequency signal will be an intermediate frequency of 10.7MHz, as will the difference between the respective upper values of 434.12MHz of the predetermined frequency bandwidth and the value of 423.42MHz of the variable frequency signal, respectively.
- the difference between the intermediate steps of the predetermined frequency bandwidth and the corresponding intermediate steps of the frequency of the variable frequency signal will likewise be the intermediate frequency of 10.7MHz.
- the mixed signal from the mixer 9 is fed to an intermediate frequency filter 10 which filters out signals of frequency other than frequencies at the intermediate frequency of 10.7MHz.
- the output from the intermediate filter 10 is fed on a line 11 through an attenuating means, namely, an attenuating circuit 12 which selectively attenuates the signal fed from the intermediate frequency filter 10 for suppressing noise therein as will be described below.
- the signal from the attenuating circuit 12 is fed to an amplifying means, namely, an intermediate frequency amplifier 14, which amplifies the signal outputted by the attenuating circuit 12, and in turn feeds the amplified signal to a demodulating means, namely, a demodulating circuit 15.
- the demodulating circuit 15 separates the data embedded in the data carrying signal from the intermediate frequency signal, and outputs a data signal to a gate circuit 16.
- the gate circuit 16 is operated under the control of the micro-controller 4 for outputting data signal of valid type format only to the signal analysing unit 3 as will be described below.
- the micro-controller 4 under the control of software acts as a first analysing means for analysing the data signal outputted by the demodulating circuit 15 for determining if the data signal contains noise.
- the micro-controller 4 also under the control of software acts as a second analysing means for analysing the data signal from the demodulating circuit 15 for determining if the data signal is a valid type data signal.
- the gate circuit 16 is responsive to the micro-controller 4 determining that the data signal is a valid type signal for outputting the data signal from the demodulating circuit 15 to the signal analysing unit 3.
- the gated signal from the gate circuit 16 is also applied to a reset pin (not shown) of the signal analysing unit 3 for waking up the signal analysing unit 3 to receive and analyse the signal outputted through the gate 16. Accordingly, the signal analysing unit 3 may be maintained in a sleep mode until the micro-controller 4 determines that a received data signal is a valid type signal.
- the attenuating circuit 12 comprises a resistive impedance means, namely, five resistors R1 to R5 which are connected in parallel between the line 11 and ground through respective digital switches SW1 to SW5 for facilitating selective connection of the resistors R1 to R5 between the line 11 and ground.
- the switches SW1 to SW5, respectively, are individually selectable by the micro-controller 4 by a five bit word on a bus 17 for selectively switching the resistors R1 to R5 to ground.
- the resistance values of each of the resistors R1 to R5 are different for maximising the number of levels by which the intermediate frequency signal on the line 11 may be attenuated.
- the resistor R1 is a 1 Kohm resistor
- the resistor R2 is a 510 ohm resistor
- the resistor R3 is a 240 ohm resistor
- the resistor R4 is a 120 ohm resistor
- the resistor R5 is a 62 ohm resistor.
- the switches SW1 to SW3 are selectable so that the total value of resistance switched between the line 11 and ground can be varied from 32 ohms to 1000 Kohms in thirty-two steps. Although as will be appreciated by those skilled in the art the thirty-two steps will not be steps of equal resistance values.
- the switches SW1 to SW5 are selected by the micro-controller 4 in response to the level of noise in the data signal outputted by the demodulating circuit 15.
- the switches SW1 to SW5 are selected so that the appropriate value of resistance is applied between the line 11 and ground to attenuate the signal so that the noise level in the data signal outputted by the demodulating circuit 15 is such as to have little effect on the data, and in particular, to an extent that the noise is substantially invisible to the signal analysing circuit 3.
- an oscillator controller 20 is operated under the control of the micro-controller 4 for sequentially stepping the frequency of the variable frequency output signal of the oscillator 8 through the ten frequency steps from the lower frequency of 423.02MHz to the upper frequency of 423.42MHz in steps of 40Khz.
- the micro-controller 4 operates the oscillator controller 20 to hold the output frequency of the variable frequency output signal at the respective steps for a predetermined period of time, in this embodiment of the invention 1 millisecond, which is sufficient to allow the microcontroller 4 to determine if a signal outputted by the demodulating circuit 15 is a valid type data signal.
- the micro-controller 4 determines that the signal outputted by the demodulating circuit 15 is a valid type data signal, the micro-controller 4 operates the oscillator controller 20 to in turn hold the frequency of the output signal from the oscillator 8 constant for a predetermined period.
- the predetermined period is a time period sufficient to allow a series of complete data signals to be gated through the gate circuit 16 to the signal analysing unit 3 for analysing thereof, so that the signal analysing unit 3 can confirm if the data signal is a valid type signal, and can determine if the data signal includes a unique code specific to the electronic control unit 2.
- the predetermined time period during which the frequency of the output signal of the oscillator 8 is held constant for facilitating outputting of the series of complete data signals through the gate circuit 16 is 100 milliseconds.
- the frequency of the variable frequency output signal of the oscillator 8 is stepped through five steps, during which a valid type data signal was not detected by the micro-controller 4.
- a valid type data signal was detected by the micro-controller 4, and the frequency of the signal from the oscillator 8 was held constant during the predetermined time period B of 100 milliseconds for allowing a series of complete data signals to be gated through to the signal analysing unit 3.
- the oscillator controller 20 under the control of the micro-controller 4 sequentially stepped the frequency of the variable frequency output signal from the oscillator 8 to the upper frequency of 423.42MHz, and returned the frequency to the lower frequency of 423.02MHz to continue sequential incremental stepping of the frequency of the variable frequency output signal through the ten frequency steps, and so on until a valid type data signal from the demodulating circuit 15 is again detected by the micro-controller 4.
- the micro-controller 4 operating under the control of software determines if the data signal outputted by the demodulating circuit 15 is a valid type data signal by monitoring the time between data edges of the data signal for determining if the time between the respective data edges corresponds with the time which would be between the data edges if the signal were a valid type signal.
- variable frequency output signal of the oscillator 8 under the control of the micro-controller 4 is sequentially stepped from the lower frequency value of 423.02MHz to the upper frequency value of 423.42MHz through the ten equal frequency steps, and on reaching the upper frequency value of 423.42MHz, the frequency of the variable output signal of the oscillator 8 is returned to the lower value of 423.02MHz and the cycle commences again.
- the micro-controller 4 determines the presence of a valid type data signal being outputted by the demodulating circuit 15, the micro-controller 4 operates the gate circuit 16 for outputting the data signal to the signal analysing unit 3, and simultaneously operates the oscillator 8 through the oscillator controller 20 to hold the frequency of the variable frequency output signal constant until a series of complete data signals received by the radio receiver 1 have been outputted through the gate circuit 16 to the signal analysing unit 3.
- the micro- controller 4 operates the oscillator 8 through the oscillator controller 20 for incrementing the frequency of the variable frequency output signal by another frequency step to the next step frequency.
- the micro-controller 4 monitors the output of the demodulating circuit 15 for data signals, and on detecting a data signal analyses the signal for the presence and level of noise, and selectively operates the appropriate switch or switches SW1 to SW5 for switching the appropriate resistor or resistors R1 to R5 between the line 11 and ground for attenuating the signal on the line 11 to the appropriate level for reducing the noise in the signal to an appropriate level.
- the radio receiver has been described as comprising a micro-controller, it is envisaged that in certain cases the radio receiver may operate under the control of a micro-controller in either the signal analysing unit or the electronic control unit. Indeed, it is envisaged in certain cases that a single micro-controller may be provided for controlling the operation of the radio receiver, the signal analysing unit and the electronic control circuit. It is also envisaged that the radio receiver, the signal analysing unit and the electronic control unit may be provided as one single unit.
- the attenuating means has been described as comprising impedance means provided by a plurality of selectively selectable resistors, any other suitable impedance means may be provided. Indeed, in certain cases it is envisaged that the impedance means may be provided by a single resistor, in which case, the level of attenuation which the attenuating circuit would provide would not be variable. It is also envisaged that other impedance means may be provided, and in certain cases, an impedance means of a single impedance value may be provided.
- the attenuating circuit has been described as comprising five resistors, any desired number of resistors may be provided, and it will also be appreciated that while it is desirable that the resistors be of different values for maximising the number of attenuation levels, in certain cases, the resistors may be of equal value. Indeed, in certain cases it is envisaged that the attenuation means may comprise only two resistors of different resistance values, and the two resistors would be selectively connectable in parallel between the line carrying the data carrying signal and ground.
- two or more resistors of the same or different values could be connected in series in the form of a resistor string between the line carrying the data carrying signal and ground, and the resistors could be selectively switchable into and out of the series string for varying the attenuation level.
- variable frequency signal oscillator has been described as providing a variable frequency output signal of ten different frequency values in equal frequency steps
- the local oscillator may be operated for providing a variable frequency output signal of many more frequency steps, for increasing the number of steps through which the receiving frequency of the radio receiver can be swept.
- the oscillator will output a variable frequency output signal which will be stepped through thirty-two equal frequency steps, thereby permitting the radio receiver to be stepped through thirty-two receiving frequencies in the predetermined frequency bandwidth.
- the receiving frequency bandwidth of the radio receiver may be greater or lesser than that described, and the receiving frequency may be of other frequencies to those described.
Abstract
Description
Claims
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0312723A GB2386304A (en) | 2000-12-28 | 2001-12-19 | A radio receiver |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IES2000/1082 | 2000-12-28 | ||
IE20001082 | 2000-12-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2002054608A1 true WO2002054608A1 (en) | 2002-07-11 |
Family
ID=11042705
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/IE2001/000158 WO2002054608A1 (en) | 2000-12-28 | 2001-12-19 | A radio receiver |
Country Status (3)
Country | Link |
---|---|
GB (1) | GB2386304A (en) |
IE (1) | IES20011088A2 (en) |
WO (1) | WO2002054608A1 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0449199A2 (en) * | 1990-03-28 | 1991-10-02 | Pioneer Electronic Corporation | Noise reducing circuit |
US6031870A (en) * | 1994-11-29 | 2000-02-29 | Gallagher Group Limited | Method of electronic control |
WO2000038320A1 (en) * | 1998-12-22 | 2000-06-29 | Hi-Key Limited | A receiver and a variable frequency signal generating circuit for the receiver |
-
2001
- 2001-12-19 IE IE20011088A patent/IES20011088A2/en not_active IP Right Cessation
- 2001-12-19 WO PCT/IE2001/000158 patent/WO2002054608A1/en not_active Application Discontinuation
- 2001-12-19 GB GB0312723A patent/GB2386304A/en not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0449199A2 (en) * | 1990-03-28 | 1991-10-02 | Pioneer Electronic Corporation | Noise reducing circuit |
US6031870A (en) * | 1994-11-29 | 2000-02-29 | Gallagher Group Limited | Method of electronic control |
WO2000038320A1 (en) * | 1998-12-22 | 2000-06-29 | Hi-Key Limited | A receiver and a variable frequency signal generating circuit for the receiver |
Also Published As
Publication number | Publication date |
---|---|
IES20011088A2 (en) | 2002-07-10 |
GB2386304A (en) | 2003-09-10 |
GB0312723D0 (en) | 2003-07-09 |
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