WO2002045249A2

WO2002045249A2 - Circuit arrangement for dc/dc converters with low output voltage

Info

Publication number: WO2002045249A2
Application number: PCT/DE2001/004439
Authority: WO
Inventors: Bostjan Bitenc
Original assignee: Siemens Aktiengesellschaft
Priority date: 2000-12-01
Filing date: 2001-11-26
Publication date: 2002-06-06
Also published as: DE10059644A1; WO2002045249A3

Abstract

The invention relates to a circuit arrangement for a DC/DC blocking oscillator (1) comprising a clocked control system wherein a control circuit for clocking with a primary side and a secondary side MOSFET (M1, M2) is provided with coupled drivers (7, 8, 9) under each other in such a way that prevents a simultaneous activation of the two windings (w1, w2).

Description

description

Circuit arrangement for DC / DC converter with low output voltage

The invention relates to a circuit arrangement of a DC / DC converter at least with a primary side with a DC voltage input and a primary-side winding which is driven in a clocked manner via a primary-side MOSFET, a secondary side with at least one DC voltage output and one which is inductively connected to the primary-side winding. secondary-side winding into which an alternating voltage is induced, a secondary-side MOSFET having a control circuit being provided, through which the voltage induced in the second winding is conducted in the same direction to the DC voltage output, and also a primary and secondary auxiliary voltage supply.

Such a circuit arrangement, which is preferably used as a converter for low powers with medium to high output voltages, is known, for example, from German patent application DE 34 22 777.

The disadvantage of this known circuit arrangement is an insufficient load resistance. It is also unsuitable for low output voltages.

It is therefore an object of the invention to describe a circuit arrangement for a very compact and few components, but load-resistant DC / DC converter for low output voltages.

This object is solved by the features of claim 1.

Accordingly, the inventor proposes that the known circuit arrangement of a DC / DC converter with a primary side with a a DC voltage input (in +, in-) and a primary-side winding, which is driven in a clocked manner via a primary-side MOSFET, a secondary side with at least one DC voltage output and a secondary-side winding, which is inductively connected to the primary-side winding and into which an AC voltage is induced, wherein a secondary-side MOSFET is provided with a control circuit through which the voltage induced in the second winding is rectified to the DC voltage output, and further a primary and secondary auxiliary voltage supply to improve in that a control circuit for clocking the primary-side and the secondary-side MOSFET with drivers coupled to one another is provided in such a way that simultaneous switching on of the two windings is prevented.

A special embodiment of the circuit arrangement provides that at least one of the drivers has a time delay element. Furthermore, according to the invention, a modulator can be connected upstream of the primary-side driver, the modulator being a pulse width modulator or pulse frequency modulator or a combination of both types.

In a particularly advantageous embodiment, the circuit arrangement between the controller and the modulator has an optocoupler for complete electrical decoupling from the primary and secondary sides.

A further embodiment of the circuit arrangement provides that a third and fourth winding are provided for the primary and secondary-side auxiliary voltage supply, all windings, that is to say also the first and second windings, being connected to the same inductance, preferably a ferrite core. In the particularly advantageous circuit arrangement with a total of four windings, the secondary-side driver can have a logical AND logic operation.

According to the invention, an LC low-pass filter can be provided on the secondary side to improve and smooth the output voltage. In addition, two, preferably four, windings can be designed as a circuit board transformer for a particularly compact construction.

If particularly low output voltages are to be realized, the number of turns of the first secondary winding can be 1.

Further features of the invention emerge from the subclaims and the following description of the exemplary embodiments with reference to the drawings.

The invention is explained in more detail below with reference to the drawings and exemplary embodiments:

Figure 1: Structure of a DC / DC converter;

Figure 2: buck converter combined with push-pull converter;

Figure 3 Classic flyback converter; Figure 4 flyback converter with MOSFET as a rectifier;

Figure 5 flyback converter with MOSFET as a rectifier and known controller;

FIG. 6 measured values and behavior of the circuit arrangement from FIG. 5 at a low output current; FIG. 7 measured values and behavior of the circuit arrangement from FIG. 5 with a high output current;

FIG. 8 flyback converter according to the invention for low output voltage without auxiliary windings;

FIG. 9 flyback converter according to the invention for low output voltage with auxiliary windings for auxiliary voltages; FIG. 10: Measured values and behavior of the viewing arrangement from FIG. 9 at a low output current;

FIG. 11: Measured values and behavior of the circuit arrangement from FIG. 9 with a high output current; Figure 12: Pinout of the isolated drivers;

Figure 13: Isolated driver with time delay element;

Figure 14: Isolated driver with logical AND gate.

1 shows the basic structure of a DC / DC converter 1 with an output voltage UA, consisting of a clocked converter 2, a regulator 3 for the output voltage UA and other application-specific functional units, such as monitoring devices, filters, etc.

So-called onboard power supply modules (hereinafter referred to as onboard SVM) are known for use in systems (e.g. switching system). These are DC / DC converters with small dimensions that can be soldered or soldered into a system assembly like components. These onboard SVM are available with different output voltage values.

For several years, the so-called "synchronous rectification" has been used in a variety of ways to generate low output voltages (UA <3.3V), since the low on-state resistance R _DS , _ON and thus the low voltage drop of modern MOSFETs compared to conventional rectification can achieve a significant improvement in efficiency with diodes.

A topology that has been used in practice for several years is shown in FIG. With this topology, onboard SVMs with low output voltages can be implemented with economically justifiable effort from a nominal output current of approx. 5A. The reason for this is the comparatively high outlay on components due to the multi-stage concept with a step-down divider and push-pull converter. For onboard power supply modules with a small output current (<5A) and very small dimensions, it is not sensible to use the topology from FIG. 2, since the elements required for control would take up too much space and the costs related to the output power would be too high.

For very small onboard power supply modules (= onboard SVM), e.g. 1.5V / 4A with a target size of approx. 2 x 5 cm, therefore an alternative topology with a simple control circuit is sought. With this topology, it should be possible to achieve a high level of efficiency and therefore low self-heating of the onboard SVM. In addition, good dynamic behavior, i.e. small output voltage drops in the event of load changes can be realized. This is very important at low output voltages, as connected consumers, e.g. ASICs or processors, often have very small permissible ranges for their operating voltage.

Very small DC / DC converters have so far often been implemented in the form of a classic forward converter without synchronous rectification, with diodes used for rectification in the output circuit. The efficiency of these modules is therefore not good.

In order to be able to use synchronous rectification even with small onboard SVMs, it must be considered how the effort required for this can be reduced. Numerous alternatives to the topology shown in FIG. 2 are described in the literature. In most cases, these only have one converter stage, but after they are mostly on the

Flow converter principle, they have two rectifying transistors in the output circuit. Since each transistor requires a special control circuit, the amount of components involved is not small here either.

A further reduction in component expenditure is possible if a topology is used, for the secondary side only one rectifying element is required. The classic flyback converter represents such a topology. This can be seen in FIG.

In order to be able to achieve high efficiencies at low output voltages, the commonly used secondary-side diode D must be replaced by a low-resistance MOSFET in the manner shown. This modification can be seen in FIG. 4. At, MOSFET M2, the parasitic diode contained in each power MOSFET is also shown. The orientation of this diode corresponds to that of diode D from FIG. 3. MOSFET M2 must be controlled by a suitable circuit.

Such a control circuit for the topology shown in FIG. 4 is known from the above-cited patent DE 3422777 B1. The solution contained therein is shown in FIG. 5, the names of the elements being adapted to the text here.

Essentially, in the known circuit arrangement according to FIG. 5, with the help of the secondary-side MOSFET M2 and the control circuit shown, consisting of the transistors T1, T2, the resistor R1 and the current transformer, consisting of the windings swl and sw2 - which do not match the windings wl and w2 are coupled - mimicking the behavior of a diode. In order to accomplish this, the current direction of current through the MOSFET M2 is detected by means of the current converter and the MOSFET M2 is accordingly switched on and off by the driver circuit T1, T2 connected upstream and connected to the current converter.

FIG. 6 shows the measured values and the behavior of the circuit arrangement from FIG. 5 at a low output current UA. In the case of a relatively small load 4 at the output, the output current of the transformer reaches zero long before the MOSFET Ml switches on again, such as at point 2 can be seen in Figure 6. So there is enough time to turn off the MOSFET M2. Conversely, the MOSFET M2 can only be switched on when Ml is already switched off, shown at point 1 in FIG. 6. The drain currents ID1 and ID2 through MOSFET Ml or M2 have a triangular shape here. For this reason, this operating mode is also called triangular operation.

In the circuit arrangement shown in FIG. 5, the operating mode also changes when there is a load increase at the output from a certain load 4, as shown in FIG. The shape of the current now changes from the triangular shape to a trapezoidal shape.

The problem now is that in trapezoidal mode the

Current value zero is not reached before the MOSFET Ml is switched on again. Only when the MOSFET Ml is switched on can the secondary current drop. However, after the MOSFET M2 is only caused to switch off by the zero crossing of the secondary current, a considerable short-circuit current flows through the two MOSFETs M1 and M2 for a short time. This has an extremely negative impact on efficiency.

Timely reversal of the current can be ensured by dimensioning the transformer for stationary operation (constant load at the output), i.e. triangular operation in the permissible load range is ensured, but it is disadvantageous that a relatively large transformer is necessary. With rapid load changes, e.g. If a processor switches from sleep mode to normal operation, this condition can be violated, which can lead to briefly disturbed operation and influence the consumer (e.g. crash).

Another disadvantage of the known control shown in FIG. 5 is that the current transformer represents a considerable inductance, which is the coupling between pri- Martial and secondary side of the converter deteriorated significantly. A poor coupling also has a negative effect on the efficiency, among other things, and leads to an additional load on components, such as, for example, a higher voltage load on the MOSFET Ml.

The inventor has now recognized that the disadvantages of this known circuit arrangement can be avoided if a controller according to FIGS. 8 or 9 is used.

Here, the secondary-side transistor M2 is controlled by an isolated driver in principle, ie, except for additional runtimes, in push-pull to the primary-side transistor Ml. The secondary-side auxiliary voltage U _se k, auχ required for this can be supplied externally, as shown in FIG. 8, or is derived from a transformer winding w4, as shown in FIG. The primary-side auxiliary voltage U _Pr i _m , aux, for supplying the two drivers and the modulation controller, likewise comes either externally or from the winding w3.

FIGS. 10 and 11 show the signal curves corresponding to FIGS. 6 and 7 for the circuit arrangement from FIG. 9. In contrast to the known circuit arrangement from FIG. 5, in this new circuit arrangement the transistor M2 is not switched off when the current passes through M2, but rather it is switched off a reversal is permitted until shortly before the MOSFET Ml is switched on again. This means that with this type of control, there is only trapezoidal operation, regardless of the load at the output. Short-term short circuits due to the simultaneous conduction of the transistors M1 and M2 are certainly excluded here.

In order to reliably rule out simultaneous conduction of both transistors M1 and M2, according to the invention, between the

Conduction phases of the two transistors built temporal transitions in which both are not conductive. This is possible because after a MOS transistor has been switched off, a current which may be present can commutate to the parasitic diode Dp which is always present in the transistor.

According to the invention, if the MOSFET Ml is conductive and a switch-on of the MOSFET M2 is pending, either the switch-on of the MOSFET M2 must be delayed out by a delay element 12 in the driver. A driver 7 in the embodiment according to FIG. 13 is used for this. On the other hand, the switching on of the MOSFET M2 can be logically locked until the voltage on the auxiliary winding w4 assumes a positive value, since this criterion indicates that the MOSFET Ml is switched off. A driver 9 according to FIG. 14 with a logic AND gate 13 can be used for this variant according to the invention.

In the opposite case, when the MOSFET M2 is conductive and the transistor M1 is pending to be switched on, this process is delayed until M2 is safely switched off. For this purpose, a driver with a sufficiently large switch-on delay (turn on delay), that is to say a timer T according to FIG. 13, is provided on the primary side in the examples shown.

In contrast to the known circuit from FIG. 5, no current transformer is required in the new control, which is why the coupling between the primary and secondary side is not deteriorated.

Since very small output voltages (e.g.

1.5V) from a relatively high input voltage (e.g. 48V of an official battery) and an extreme transmission ratio (wl / w2 >> 1) is required, a secondary-side leakage inductance L, for example that of the transformer, but also that of printed circuit loops , extremely, because it is shown on the primary side with the square of the gear ratio (L _S , _PRIM = (wl / w2) ² * L _S , _SEK ). In order to achieve the best possible coupling, the transformer can preferably be designed as a so-called circuit board transformer. The scatter-L of the transformer can thus be kept to a minimum.

Because of the extreme transmission ratio wl / w2 and the small output voltage, the output current is relatively high, which means that a large conductor cross-section at w2 is advantageous. By implementing the w2 winding with only one turn, the cross-section can be maximized without the use of multiple PCB layers and transfers.

The rigid push-pull control from M2 to Ml results in yet another advantage of the circuit arrangement according to the invention over the principle from FIG. 5. With the principle presented here, the current through the winding w2 can also flow backwards or become negative. This means that regardless of the load at the output, there is a trapezoidal operation, which means that the dynamic behavior of the converter remains the same under all load conditions. The dynamic behavior is therefore significantly better and can also be optimized very well. With this principle, load jumps from zero to nominal load and vice versa can be easily achieved with low voltage drops on the output voltage.

It is also advantageous that, due to the constant trapezoidal operation, the duty cycle (= ratio of the duty cycle of Ml to the period of the switching frequency) is almost independent of the load. This has the further advantage that the auxiliary voltages derived via the windings w3 and w4 are also load-independent. This greatly simplifies the circuit design, especially the circuit for the controller. This has a positive effect on the manufacturing costs and the realizable size of the power supply module. A current mode control can advantageously be used for the pulse width modulation control, as a result of which the duty cycle is determined with the aid of a ramp-shaped current measurement signal. This signal is designated "ramp" in FIG. 9 and is tapped at a measuring shunt "shunt". Since this control results in a damping of the control response between the winding w2 and the output capacitors C3, C4, the possibly very high effective current on the secondary side (= pulse current from w2 to C3) can be absorbed with a purely ceramic C3 with little loss. Ceramic capacitors have the advantage that they have the lowest internal resistances, are inexpensive and reliable.

For cases in which small output ripples are required, an optional filter in the form of a simple LC low pass "choke" + C4 can be added. For optimal dynamic behavior, the inductance value of the choke "choke" must be as small as possible, the value of the capacitor C4 however, be chosen as large as possible.

Overall, the development of the new circuit arrangement with the control circuit according to the invention thus describes a circuit arrangement for a very compact and few components, but load-resistant DC / DC converter for low output voltages.

This new principle has the following advantages: Very high efficiency despite low output voltage; good dynamic behavior even with nominal load jumps; extremely low component effort; very robust and fault-sensitive construction; any capacitance values for dynamic improvement can be switched on at the output. Furthermore, it is possible to intercept the pulse current coming from the winding w2 almost completely without loss using ceramic capacitors, so that even relatively large output power lines (eg 1.5V / 10A) can be realized with this principle.

Overall, the invention thus shows a circuit arrangement of a DC / DC flyback converter with a clocked controller, a control circuit for clocking a primary-side and a secondary-side MOSFET with drivers coupled to one another being provided such that simultaneous switching on of the two windings w1 and w2 is prevented. In this way, according to the invention it is achieved that the circuit arrangement can be implemented in a very compact manner and with few components, and in addition a good load resistance is achieved for low output voltages.

LIST OF REFERENCE NUMBERS

1 DC / DC converter

2 inverters

3 controllers

4 load

5 voltage / signal converters

6 PW modulator (PWM) / PF modulator (PFM)

7 drivers with time delay element on primary side

8 drivers with time delay element on the secondary side

9 drivers with logical AND gate

10 optocouplers

11 insulation

12 time delay element

13 AND gate

14 performance drivers

15 transmitters for electrical isolation (optical or magnetic)

16 receivers for electrical isolation (optical or magnetic) a position in the diagram b position in the diagram c position in the diagram

Cx capacity

D / Dx diode

Dp parasitic diode of a MOSFET

ID drain current in +, in DC voltage input

Lx inductance

^L _{S, PRIM} primary-side leakage inductance

L _SSEK Secondary leakage inductance

Mx MOSFET out +, out- DC voltage output

Rx resistance

S control signal swl, sw2 windings of the current transformer

Tr transformer Tx transistor

UA output voltage

UE input voltage

Uprim _; aux auxiliary voltage on the primary side

Usek, aux secondary auxiliary voltage

VGS gate-source voltage

Wx winding

Wx * ID Product of number of turns and drain current

Claims

claims

1. Circuit arrangement of a DC / DC converter (1) at least with: a primary side with a DC voltage input (in +, in-) and a primary-side winding (wl), which is driven in a clocked manner via a primary-side MOSFET (Ml), one

Secondary side with at least one DC voltage output

(out +, out-) and one, with the primary-side winding (wl) inductively connected, secondary-side winding (w2), into which an alternating voltage is induced, whereby a secondary-side MOSFET (M2) is provided with a control circuit through which the voltage induced in the second winding (w2) is rectified to the DC voltage output (out +, out-), and further a primary and secondary auxiliary voltage supply, characterized in that a control circuit for clocking the primary-side and the secondary-side MOSFET (Ml, M2 ) with interconnected drivers (7, 8, 9) is provided in such a way that simultaneous switching on of the two windings (wl, w2) is prevented.

2. Circuit arrangement according to the preceding claim 1, so that at least one of the drivers (7, 8) has a time delay element (12).

3. Circuit arrangement according to one of the preceding claims 1-2, so that a modulator (6) is connected upstream of the primary-side driver (7).

4. Circuit arrangement according to the preceding claim 3, characterized in that the modulator (6) is a pulse width modulator (PWM) or pulse frequency modulator (PFM) or a combination of both types.

5.Circuit arrangement according to the preceding claim 4, so that an optocoupler (10) is connected between the controller (3) and the modulator (6).

6. Circuit arrangement according to one of the preceding claims 1-5, characterized in that a third and fourth winding (w3, w4) is provided for the primary-side and secondary-side auxiliary voltage supply, all windings (wl-w4) having the same inductance, preferably a ferrite core, are connected.

7. Circuit arrangement according to the preceding claim 6, so that the secondary driver (9) has a logical AND link (13) instead of the time delay element (12).

8. Circuit arrangement according to one of the preceding claims 1-7, d a d u r c h g e k e n n z e i c h n e t that an LC low-pass filter is provided on the secondary side.

9. Circuit arrangement according to one of the preceding claims 1-8, characterized in that the two, preferably four, windings (wl-w2; wl-w4) are designed as circuit board transformers.

10. Circuit arrangement according to one of the preceding claims 1-9, d a d u r c h g e k e n n z e i c h n e t that the number of turns of the first secondary winding (w2) is 1 in order to achieve low voltages.