WO2002041576A3 - Serial compressed bus interface having a reduced pin count - Google Patents

Serial compressed bus interface having a reduced pin count Download PDF

Info

Publication number
WO2002041576A3
WO2002041576A3 PCT/US2001/046952 US0146952W WO0241576A3 WO 2002041576 A3 WO2002041576 A3 WO 2002041576A3 US 0146952 W US0146952 W US 0146952W WO 0241576 A3 WO0241576 A3 WO 0241576A3
Authority
WO
WIPO (PCT)
Prior art keywords
serial
data
bus interface
pin count
reduced pin
Prior art date
Application number
PCT/US2001/046952
Other languages
French (fr)
Other versions
WO2002041576A2 (en
Inventor
Thomas Edward Horlander
Eric Stephen Carlsgaard
Original Assignee
Thomson Licensing Sa
Thomas Edward Horlander
Eric Stephen Carlsgaard
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing Sa, Thomas Edward Horlander, Eric Stephen Carlsgaard filed Critical Thomson Licensing Sa
Priority to MXPA03004365A priority Critical patent/MXPA03004365A/en
Priority to EP01996153A priority patent/EP1337924B1/en
Priority to KR1020037006257A priority patent/KR100795465B1/en
Priority to JP2002543863A priority patent/JP4073312B2/en
Priority to AU2002227278A priority patent/AU2002227278A1/en
Priority to DE60128257T priority patent/DE60128257T2/en
Publication of WO2002041576A2 publication Critical patent/WO2002041576A2/en
Publication of WO2002041576A3 publication Critical patent/WO2002041576A3/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers

Abstract

A serial compressed bus interface having a reduced pin count includes a serial-to-parallel converter having a single serial data input line adapted to receive time-division multiplexed serial data from a plurality of data sources. Enable logic is adapted to input at least one data valid signal that identifies each of a plurality of data consumers for which the time-division multiplexed serial data is valid.
PCT/US2001/046952 2000-11-20 2001-11-08 Serial compressed bus interface having a reduced pin count WO2002041576A2 (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
MXPA03004365A MXPA03004365A (en) 2000-11-20 2001-11-08 Serial compressed bus interface having a reduced pin count.
EP01996153A EP1337924B1 (en) 2000-11-20 2001-11-08 Serial compressed bus interface having a reduced pin count
KR1020037006257A KR100795465B1 (en) 2000-11-20 2001-11-08 Serial compressed bus interface having a reduced pin count and a method for transmitting serial compressed data
JP2002543863A JP4073312B2 (en) 2000-11-20 2001-11-08 Serial compression bus interface circuit and method for sending serial compressed data
AU2002227278A AU2002227278A1 (en) 2000-11-20 2001-11-08 Serial compressed bus interface having a reduced pin count
DE60128257T DE60128257T2 (en) 2000-11-20 2001-11-08 SERIAL COMPRESSED BUS INTERFACE WITH A REDUCED PIN NUMBER

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/716,721 US7359376B1 (en) 2000-11-20 2000-11-20 Serial compressed bus interface having a reduced pin count
US09/716,721 2000-11-20

Publications (2)

Publication Number Publication Date
WO2002041576A2 WO2002041576A2 (en) 2002-05-23
WO2002041576A3 true WO2002041576A3 (en) 2003-03-27

Family

ID=24879158

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/046952 WO2002041576A2 (en) 2000-11-20 2001-11-08 Serial compressed bus interface having a reduced pin count

Country Status (10)

Country Link
US (1) US7359376B1 (en)
EP (1) EP1337924B1 (en)
JP (1) JP4073312B2 (en)
KR (1) KR100795465B1 (en)
CN (1) CN1218258C (en)
AU (1) AU2002227278A1 (en)
DE (1) DE60128257T2 (en)
MX (1) MXPA03004365A (en)
MY (1) MY128536A (en)
WO (1) WO2002041576A2 (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7187947B1 (en) 2000-03-28 2007-03-06 Affinity Labs, Llc System and method for communicating selected information to an electronic device
EP2432190A3 (en) 2001-06-27 2014-02-19 SKKY Incorporated Improved media delivery platform
TWI443557B (en) * 2010-09-30 2014-07-01 Wintek Corp Method for transmitting touch panel data
US9832037B2 (en) 2014-12-22 2017-11-28 Sierra Wireless, Inc. Method and apparatus for register setting via multiplexed chip contacts
JP7078842B2 (en) * 2018-02-08 2022-06-01 富士通株式会社 Transmitter, receiver, clock transfer method and program

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0522764A2 (en) * 1991-06-28 1993-01-13 Digital Equipment Corporation Multiplexing scheme for modem control signals
US5940402A (en) * 1997-06-06 1999-08-17 Timeplex, Inc. Method and apparatus for TDM interrupt transmissions between multiple devices and a processor
US6108726A (en) * 1996-09-13 2000-08-22 Advanced Micro Devices. Inc. Reducing the pin count within a switching element through the use of a multiplexer

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FR2478913A1 (en) * 1980-03-20 1981-09-25 Telediffusion Fse COMMUNICATION SYSTEM CONCENTRATOR FOR CONNECTING SEVERAL ASYNCHRONOUS TELEINFORMATIC TERMINALS
US4656620A (en) 1984-09-19 1987-04-07 Itt Corporation Apparatus for obtaining reduced pin count packaging and methods
US4700341A (en) * 1985-10-30 1987-10-13 Racal Data Communications Inc. Stochastic time division multiplexing
KR950012069B1 (en) * 1993-09-18 1995-10-13 엘지산전 주식회사 External data inputting apparatus using serial telecommunication
JP2694807B2 (en) * 1993-12-16 1997-12-24 日本電気株式会社 Data transmission method
US5621901A (en) 1994-10-31 1997-04-15 Intel Corporation Method and apparatus for serial bus elements of an hierarchical serial bus assembly to electrically represent data and control states to each other
US5835498A (en) * 1995-10-05 1998-11-10 Silicon Image, Inc. System and method for sending multiple data signals over a serial link
US5926120A (en) * 1996-03-28 1999-07-20 National Semiconductor Corporation Multi-channel parallel to serial and serial to parallel conversion using a RAM array
JPH10173723A (en) 1996-12-12 1998-06-26 Fujitsu Ltd Data transfer method and data transfer equipment
US6094696A (en) * 1997-05-07 2000-07-25 Advanced Micro Devices, Inc. Virtual serial data transfer mechanism
US6269435B1 (en) * 1998-09-14 2001-07-31 The Board Of Trustees Of The Leland Stanford Junior University System and method for implementing conditional vector operations in which an input vector containing multiple operands to be used in conditional operations is divided into two or more output vectors based on a condition vector
US6044030A (en) 1998-12-21 2000-03-28 Philips Electronics North America Corporation FIFO unit with single pointer
US6636483B1 (en) * 1999-02-25 2003-10-21 Fairchild Semiconductor Corporation Network switch with zero latency flow control
US6611538B1 (en) * 1999-05-27 2003-08-26 3Com Corporation Data transmission synchronization system
WO2001045417A1 (en) * 1999-12-14 2001-06-21 General Instrument Corporation Dynamic configuration of input filtering parameters for an mpeg re-multiplexer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0522764A2 (en) * 1991-06-28 1993-01-13 Digital Equipment Corporation Multiplexing scheme for modem control signals
US6108726A (en) * 1996-09-13 2000-08-22 Advanced Micro Devices. Inc. Reducing the pin count within a switching element through the use of a multiplexer
US5940402A (en) * 1997-06-06 1999-08-17 Timeplex, Inc. Method and apparatus for TDM interrupt transmissions between multiple devices and a processor

Also Published As

Publication number Publication date
US7359376B1 (en) 2008-04-15
KR100795465B1 (en) 2008-01-17
JP2004514379A (en) 2004-05-13
KR20030059229A (en) 2003-07-07
CN1218258C (en) 2005-09-07
DE60128257D1 (en) 2007-06-14
AU2002227278A1 (en) 2002-05-27
MXPA03004365A (en) 2003-08-19
CN1474973A (en) 2004-02-11
EP1337924B1 (en) 2007-05-02
JP4073312B2 (en) 2008-04-09
MY128536A (en) 2007-02-28
DE60128257T2 (en) 2007-10-31
EP1337924A2 (en) 2003-08-27
WO2002041576A2 (en) 2002-05-23

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