WO2002013403A1

WO2002013403A1 - Method and arrangement for noise rejection in a receiver circuit

Info

Publication number: WO2002013403A1
Application number: PCT/EP2001/009002
Authority: WO
Inventors: Matthias Eichin; Alexander Kurz; Karl-Ulrich Stahl
Original assignee: Vishay Semiconductor Gmbh; Melexis Gmbh; Atmel Germany Gmbh
Priority date: 2000-08-08
Filing date: 2001-08-03
Publication date: 2002-02-14
Also published as: CN1404657A; DE10038616B4; JP2004506375A; DE10038616A1; EP1238468B1; KR100504624B1; US20030171108A1; KR20030020453A; US7236743B2; CN100442673C; EP1238468A1

Abstract

The invention relates to a method for noise rejection by means of a performance-adjustable bandpass filter in a receiver circuit, for carrier-modulated received signals Sin, whereby the bandpass-filtered received signal Bout is demodulated and the demodulated received signal Dout is used to start a switching process. Conventional receiver circuits, however, have the disadvantage that, due to the small dimensions of the circuit surface area, disturbances, for example, in the form of oscillator variations due to capacitive coupling, are caused as a result of switching processes in the output region of the receiver, in particular, due to power transistors. Said disturbances cannot be eliminated by an amplifier control provided in the circuit. According to the invention, said internal disturbances may be removed whereby a power reduction in the bandpass filter is correlated with the switching process which causes the disturbance. The above circuit is suitable above all for the construction of circuits for infra-red receivers, which can thus be produced small, without external components and hence economically.

Description

Method and arrangement for interference suppression in a receiver circuit

The invention relates to a method for interference suppression by means of a quality-adjustable bandpass filter in a receiver circuit for carrier-modulated reception signals according to the preamble of claim 1 and a circuit arrangement for performing this method.

Known integrated circuits (IC) for such receiver circuits, in particular remote control receivers, such as the U2548 from TEMIC Semicondμctor GmbH, are larger due to their technology and therefore have a low interference coupling. Their size is approximately 1.8 mm ² . On the usable area, these circuits have connection devices for the input signal, the output signal, the supply voltage, the ground lead and a number of adjustment devices. The functioning of such a circuit consists in that the signal received by a photodetector, generally a photodiode, the received signal, is fed into an input circuit. The input circuit has a transimpedance amplifier that amplifies pulsating input current signals and converts them into voltage signals. These voltage signals are then processed in a signal processing system. The signal conditioning has a control amplifier, a limiter and a bandpass filter. The task of the control amplifier is to amplify the output voltage from the transimpedance amplifier in accordance with the control specification. The limiter has it Task to limit the signal swing in order to avoid overloading the bandpass filter. The bandpass filter enables the selectivity of the receiver and limits its bandwidth. The signals at the output of the bandpass filter are evaluated in a demodulator as an evaluation circuit. This demodulator consists of comparators, an integrator and Schmitt trigger and generates a switching signal for a driver transistor acting as a switch, whereby a digital control signal, for example a microcontroller, is made available for further processing.

This known circuit also contains a gain control, by means of which the gain of the receiver is adjusted in accordance with an interference field, as a result of which a high sensitivity for the received signals is achieved, but at the same time interference effects, for example caused by extraneous light, are largely suppressed, so that this is possible as far as possible no output pulses are generated by the driver transistor.

However, this known circuit has the disadvantage that when new technologies are used, its circuit area is reduced, as a result of which, due to switching processes in the output region of the receiver, in particular due to the driver transistor, faults, for example in the form of oscillator vibrations, due to the now effective capacitive couplings and drop in ground potential within of the circuit, which cannot be removed by the gain control.

To solve such problems, it is known from a Toshiba data sheet of the monolithically integrated photo circuit TPS831 to connect an external capacitor of the size 1000pF between the output connection V ₀ and the ground connection GND in order to prevent - as it says there - oscillations. The obvious disadvantage of this solution is that the additional component causes additional costs in addition to the chip costs and the demodulated output pulse is falsified by this capacitor. The object of the invention is therefore to provide a method of the type mentioned at the outset, in which the self-induced disturbances mentioned can be suppressed without having the disadvantages described in the prior art.

This object is achieved by the features of patent claim 1. This is followed by active interference suppression of self-generated interference due to switching operations at the output of the receiver circuit by a time-limited reduction in the quality of the bandpass filter at the moment the interference occurs, that is to say during the switching operation and subsequent to the switching operation. The duration of the goods reduction is preferably limited at least to the duration of the malfunction triggered by the switching process, that is, until the malfunction has subsided.

According to an advantageous development of the invention, depending on the output signal of the demodulator, which corresponds to the envelope of the carrier-modulated received signal as the first square-wave pulse and which is supplied as a switching signal to a driver transistor as the output transistor of the receiver, a control signal tqr for reducing the quality of the bandpass filter is derived, depending on a further phase-shifted rectangular pulse is generated on the flanks of the first rectangular pulse, which preferably adjoins the first rectangular pulse in terms of time. Since a switching process, for example switching on an above-mentioned switch, is initiated with the first edge of the first-mentioned rectangular pulse and the switching process is ended with its second edge, for example when this switch is switched off, the correlation of the interference can be achieved in a simple manner with goods reduction.

Furthermore, the square-wave pulse generated by the demodulator is derived from the bandpass-filtered received signal by first generating pulse sequences from this received signal by quantization, which are then integrated into an integral value, with this integral value being returned if there are no pulse sequences. In a further advantageous exemplary embodiment, automatic gain control of the received signal by means of a control amplifier is provided, to which the received signal is fed before the bandpass filtering. The regulation takes place depending on the signal size of the received signal and the ambient conditions - in particular the interference environment - of the receiver circuit. In order to also prevent a disturbance possibly caused by this regulation, this gain regulation is switched inactive during the demodulation of a bandpass-filtered reception signal - that is, during the reception of a valid data bit. A third rectangular pulse, whose pulse width is longer than that of the first rectangular pulse, is preferably generated in order to switch the automatic gain control to inactive with respect to the first rectangular pulse (output signal of the demodulator).

Finally, depending on the integral values, the output signal of the demodulator (first square pulse), the control signal for reducing the bandpass filter (second square pulse) and the control signal (third square pulse) for inactive switching of the automatic gain control are derived both during integration and during feedback ,

An advantageous circuit arrangement for carrying out the method according to the invention results from the characterizing features of claims 12 to 15.

Such a receiver circuit for carrying out the method according to the invention is produced as a monolithic circuit which only requires a photodiode in order to be able to work as a receiver for infrared remote controls and can already demodulate very small currents in the range of a few hundred picoamps, but this is one high transimpedance in the order of 300 MΩ required. The driver transistor at the output of the demodulator, on the other hand, switches the full logic level swing (e.g. 5V) at a maximum current of up to a few mA ^' s. Implementing this circuit with new technologies leading to smaller dimensions of the chip results in for example, with a chip area of 1 mm ^2, the self-generated disturbances (oscillations) described due to the now smaller distances and the coupling to the input of the receiver circuit caused by the high voltage swing of the driver transistor. Regardless of the chip size, such a circuit also tends to oscillate due to the drop in ground potential caused by the driver current. With the method according to the invention, all the disturbances described are suppressed, regardless of the dimensions of the chip, so that the invention can also be used advantageously in future technologies that lead to further reductions.

The method according to the invention will be explained below using an exemplary embodiment in conjunction with the drawings. Show it:

FIG. 1: a block diagram of a receiver circuit according to the invention,

FIG. 2: a block diagram of a demodulator used in the receiver circuit according to FIG. 1, FIG. 3: a logic diagram to explain the functioning of the

Demodulator according to FIG. 2,

FIG. 4: a block diagram of an integrator used in the receiver circuit according to FIG. 1,

Figure 5: a logic diagram to explain the operation of the integrator according to Figure 4, - and

FIG. 6: a basic circuit diagram of a gyratory bandpass filter used in the receiver circuit according to FIG. 1. ,

FIG. 1 shows a block diagram of a receiver circuit 10 and its surroundings. The carrier-modulated data emitted by an optical transmitter diode 6 are received as infrared pulse packets by a photodiode 5. These infrared pulse packets impinging on the photodiode 5 with a carrier frequency of, for example, 38 kHz are trical current signals converted to SIN. They are present at the input terminal 11 of the receiver circuit 10. These electrical current signals SIN are fed to an input circuit 1 operating as a transimpedance amplifier, which amplifies the current signals SIN and converts them into voltage signals. The converted voltage must be large enough to make the noise component in subsequent signal processing stages negligible. In the subsequent signal processing part 2, these voltage signals are amplified again by means of a control amplifier 21, limited by a limiter 22 and then filtered in a bandpass filter 23, this bandpass filter 23 also having a control input in addition to its analog input, with which the quality of the bandpass filter between two values can be switched.

The signal limitation by means of the limiter 22 is therefore necessary in order to avoid overmodulation of the subsequent bandpass filter 23 and to avoid pulse-shaped interferences, e.g. B. get into the receiver via a supply connection V _s . In the signal processing portion 2 subsequent evaluation part 3, the bandpass filtered signal B _ou t by a demodulator 31 demodulates and placed via a driver transistor 32 with associated load resistor 32 as an output signal SOUT to a microcontroller 7 for further processing. The demodulator 31 also generates a control signal tqr, which is fed to the control input of the bandpass filter 23 via a line 72. The quality of the bandpass filter 23 is hereby briefly reduced following a switching operation of the driver transistor 32 in order to prevent the triggering of an oscillator oscillation due to the switching operation carried out with the driver transistor 32, so as to counteract interference coupling in the receiver circuit designed as an integrated circuit. The bandpass filter 23, which operates on a carrier frequency of the useful signals and enables the selectivity of the circuit, has a quality factor of 10, for example, which can be reduced to 1 on account of the control signal tqr, as will be explained further below.

In order to optimize the amplification of the useful signal emitted by the transmitter diode 6 and thus the sensitivity of the receiver, points the receiver circuit 10 has a control circuit 4 which supplies control signals to the control amplifier 21 and which in turn _receives the output signal B _{out of} the bandpass filter 23 via a line 75 and a signal D _stoP-agc generated by the demodulator via a line 74 as input signals. The function of this control circuit 4 is to optimize the signal / noise ratio by changing the gain of the input signal SIN depending on the size of the input signal. The control circuit 4 is constructed from a control logic part (AGC) 41 and a digital-to-analog converter (DAC) 42. The control logic part 41 separates the useful signal from the interference signals and sets the gain for the useful signals to the highest possible level, with which a high sensitivity for the useful signals is achieved. At the same time, interference from external light, for example, is reduced. The digital-to-analog converter 42 converts the digital amplifier information generated by the control logic part 41 into an analog control voltage for the control amplifier 21.

The mode of operation of the demodulator 31 is explained in more detail below with reference to FIG. 2 and the associated pulse diagram according to FIG. 3, in particular the correlation between the output signal D _ou t of the demodulator 31 switching the driver transistor 32 and the control signal which lowers the quality of the bandpass filter 23 Dt _qr are shown.

According to FIG. 2, the output signal B ₀ uτ coming from the bandpass filter 23 is digitized with a comparator 311, the threshold voltage 319 of which represents a fixed reference value which, however, can also be set in a signal-dependent manner over several stages compared to the band filter quiescent level. The digital signals of the comparator 311 as pulse sequences Comp _S j _g (see pulse diagram 311 in FIG. 3) are integrated in an analog integrator circuit 313. This integrator 313 knows the states CHARGING or DISCHARGING up to the modulation limits 0% or 100%, as a result of which a limited integral voltage curve (see pulse diagram 313 in FIG. 3) is generated as an output signal lnt _ou t. At the output of the integrator 313, three Schmitt triggers 316, 317, 318 with different hysteresis are connected. In the application example, the on and off switching processes for the Schmitt trigger 316 at 80% and 40% (see pulse diagram 316 in Figure 3), with the Schmitt trigger 317 at 85% and 10% (see pulse diagram 317 in Figure 3) and with the Schmitt trigger 318 at 50% and 25% (see pulse diagram 318 in Figure 3). From the temporal overlap of the three Schmitt trigger output signals D _out , D _s t _opagc and 318, the control signals D _tqr (72), D _s t ₀ p-agc (73) and 76 won.

It can be seen from the pulse diagram in FIG. 3 that with an increasing integrator value of 80% of the maximum value (100%) the positive edge of the rectangular demodulator output signal D _ou t and the negative edge with a returned value of the integrator value of 40% is generated. In a corresponding manner, the square-wave signal D _s top-agc (317) is generated with the values given above, which is fed to the control logic part 41 in order to keep the control of the control part 4 inactive during and shortly after the transmission of a valid data bit. In this way, an influence of the interference by the driver transistor on the control circuit 4 is also to be avoided. The square wave signal 318, the signal D _s t ₀ p-agc (317) and the inverted signal D _ou t are rounded with a NAND gate L3 to generate the control signal Dt _qr (72). The positive edge of the square-wave signal 72 is thus generated when the D _ou t signal assumes its low level, while its negative edge coincides in time with that of the square-wave signal 318.

_Out to the inverted D - signal 316 and the D _stop-a gc-signal 317 by means of a NAND gate L2 another square-wave signal 76 is generated, which together with the generated from the comparator 311 Comp _S i _g - Pύlsfolgen 311 an AND Gate L1 is supplied. The pulse duration of this square pulse 76 corresponds to the period from the pulse end of the D _ou t - signal 316 to the pulse end of the D _s t _optically AGC signal 317. In order for a retriggering of the comparator 311 is prevented during the Inaktivschaltens of the control circuit. 4

The analog integrator 313 used in the demodulator 31 integrates the digitized pulse sequences Comp _S ig and can do this in a simple manner, as exemplified below in connection with FIGS the associated pulse diagram according to Figure 5 will be realized. The pulse sequence Comp _S j _g shown by way of example in FIG. 5 contains pulses of different durations with different pulse pauses and is supplied to a trigger and hold element T which, when a first pulse occurs, switches on a current source Q which uses a current 11 to integrate an integration capacitor C. | _nt charges. In this case, incomplete pulse sequences must be recognized by the demodulator 31 as incomplete and must not lead to an output signal. For this purpose, the holding function of the trigger and holding element T is used, with which, after a certain period of time, which can be selected as a function of frequency according to 1, 6 / fo, the integration is interrupted due to a lack of impulse and an integration is started at the same speed by now the Current sink S is switched on to discharge the integration capacitor Cj _nt . Such a hold function is shown with the pulse diagram Hold1, 6 / f ₀ and shows that the pulse pause between the first two pulses at times ti and t _{2 is} bridged, i.e. during this pulse pause it is integrated further, but not completely after the one second pulse, namely between times t ₂ and t ₃ . It is therefore only integrated up to the end of the holding time 1, 6f ₀ , that is to say up to the time t ₃ . Subsequently, the trigger and hold element T switches to the current sink S for the purpose of discharging the integration capacitor C _in t with a current l ₂ until the time tj, at which the next pulse for integration occurs, which until the maximum integration value of 100% is reached at the time t _{5 is} continued, although there are still further pulses and the holding time 1, 6f ₀ only ends at time tβ. Subsequently, integration is continued until time t, at which the integration value of the integrator output signal lnt _ou t has reached its output value of 0% again.

An exemplary construction of a quality-adjustable bandpass filter 23 is shown in FIG. 6 and can be used in the receiver circuit according to FIG. 1. The bandpass filter shown represents a 2nd order gyratory filter whose general transfer function F (s) is given by the following formula:

F (s) = (s / _ωo ) / (1+ (s / (ω ₀ Q) + (s ² / ωo ² ), where s is the Laplace transform, ωo is the resonance frequency and Q is the quality. The circuit described below implements this transfer function.

According to FIG. 6, the analog signal delimited by the limiter 22 is fed to the positive input of a summer 231 with three inputs (2 positive inputs and one negative input) via an input connection E of the bandpass filter. The sum signal formed from the signals present at the three inputs is amplified by a factor ωo with an amplifier 232 and passed on to a limiting integrator 233 which simulates a capacitance. Then, the integrated signal from a signal conditioner 234, which simulates a transistor characteristic, is formed and forms the output signal B _ou t of this band-pass filter 23 is the same time this output signal B _ou t the one hand, via a feedback, comprising a further amplifier 235 with the gain -ωo and a further integrator 236 connected downstream of this, which corresponds in structure to the integrator 233, is led to the second positive input of the summer 231 and, on the other hand, is led via an amplifier 237 and 238 to a changeover switch 239 which is dependent on the control signal supplied to it D _tqr either amplifier 237 with a gain _factor 0.1 (= 1 / Q-ι) - corresponding to a quality value 10 - or amplifier 238 with a gain factor 1 (= 1 / Q ₂ ) - corresponding to a quality value 1 with the negative input of summer 231 connects.

By reducing the quality during the high level of the D _tqr signal - _i.e. during the switch-off _torque of the driver transistor 32 and for a short time thereafter - the filter is brought into a state of lower energy absorption capacity, so that the interference caused by the driver transistor 32 takes shape a jump at the bandpass entrance can subside faster. The time period in which the control signal D _{tqr is} active must be as long as the disturbance of the driver transistor 32 continues in the circuit _{parts upstream of} the bandpass filter 23. A negative influence on the demodulation of useful signals is excluded here, since the time for interference suppression is considerably shorter than the pause time of a bit sequence of the useful signals. The properties of such a bandpass filter 23, which are necessary for the general function of the receiver, consist essentially in the fact that the bandwidth of the receiver is limited, which results in a minimization of the noise of the leading stages and the photodiode and thus a higher sensitivity for useful signals, and ultimately also Interference signals outside the center frequency can be suppressed.

Claims

claims

1) Method for interference suppression by means of a quality-adjustable bandpass filter (23) in a receiver circuit for carrier-modulated

, Received signals (Sj _n ), in which the band pass-filtered received signal (B _o u _t ) demodulates and a switching process is triggered with the demodulated received signal (D _out ), characterized in that a reduction in the quality of the band pass filter (23) correlates with the switching process becomes.

2) Method according to claim 1, characterized in that the duration of the goods reduction is limited at least to the duration of the fault triggered by the switching process.

3) Method according to claim 1 or 2, characterized in that a first rectangular pulse corresponding to the envelope of the carrier-modulated received signal (Sj _n ) corresponding to the triggering of the switching process is generated as the demodulated received signal (D _out ) and that depending on one of the edges of the first rectangular pulse ( D _out ) a phase-shifted second rectangular _pulse (D _tqr ) is derived as a control signal (72) for reducing the bandpass filter (23).

4) Method according to claim 3, characterized in that the second rectangular _pulse (Dt _qr ) is temporally connected to the first rectangular pulse (D _out ).

5) Method according to one of claims 3 or 4, characterized in that with the first edge of the first rectangular pulse

(Dout) the switching process is initiated and the switching process is ended with the second edge of the first rectangular pulse (D _out ). 6) Method according to one of the preceding claims, characterized in that for demodulation, the bandpass-filtered received signal (B _e ut) is quantized in the form of pulse signals (Comp _S j _g ) and these pulse sequences are integrated into an integral value via their pulse pauses.

7) Method according to claim 6, characterized in that in the absence of pulse sequences (Comp _S i _g ) after a certain period of time the integration is ended and the integral value is returned.

8) Method according to one of the preceding claims, characterized in that the received signal is subjected to an automatic gain control before the bandpass filtering as a function of a controlled variable determined by the signal size of the received signal and the ambient conditions.

9) Method according to claim 8, characterized in that the automatic gain control is switched to inactive during the demodulation of a bandpass-filtered received signal.

10) Method according to one of claims 5 to 9, characterized in that a third rectangular pulse (D _st op-agc) which is phase-shifted with respect to the first rectangular pulse (D _out ) is generated to deactivate the automatic gain control

Pulse width is longer than that of the first rectangular pulse (D _out ) -

11) Method according to one of claims 7 to 10, characterized in that depending on integral values both during the

, Integration as well as during the feedback the first, second and third rectangular pulse (D _ou t _> tqr, D _s to _P -agc) is generated.

12) Circuit arrangement for carrying out the method according to one of the preceding claims, characterized in that the receiver circuit has an input amplifier (1) which is followed by a control amplifier (21) and the bandpass filter (23), the bandpass filter (23) being constructed as a 2nd order filter according to the following transfer function F (s):

F (s) = (s / ω ₀ ) / (1+ (s / (ω ₀ Q) + (s ² / ωo ² ),

where s is the Laplace transform, ω _{0 is} the resonance frequency and Q is the quality, and that the quality Q is by means of a switch

(239) can be set to two values Qi and Q ₂ depending on the control signal (D _tqr ).

13) Circuit arrangement according to claim 12, characterized in that for demodulation, the bandpass filter (23) is followed by a comparator (311) for generating pulse trains (Comp _si g), this

Pulse sequences (Comp _S i _g ) are fed to an analog integrator (313) and the integrator values are forwarded to several Schmitt triggers (316, 317, 318) with different hysteresis values.

14) Circuit arrangement according to claim 13, characterized in that the outputs of the Schmitt trigger (316, 317, 318) with a

AND _gate (L4) for generating the control signal (D _tqr ) for goods reduction of the bandpass filter (23) are connected.

15) Circuit arrangement according to one of claims 12 to 14, characterized in that for automatic gain control by means of the control amplifier (21) a control logic part (41) and a digital-to-analog converter (42) connected downstream thereof is provided, the supply of the bandpass-filtered receive signal (B _ou t) and the third square-wave signal (D _s t _op - _a gc) of the control logic part (41) with the output of the bandpass filter (23) and one of the comparators (317) of the demodulator (31) each via a separate line (73, 75) is connected.