WO2002007304A2

WO2002007304A2 - Mixer using diodes

Info

Publication number: WO2002007304A2
Application number: PCT/US2001/011507
Authority: WO
Inventors: Roberto W. Alm; Norman A. Luque; Roy E. Adams; Brian A. White
Original assignee: Raytheon Company
Priority date: 2000-07-17
Filing date: 2001-04-09
Publication date: 2002-01-24
Also published as: WO2002007304A3; AU2001251472A1

Abstract

A frequency converter module converts a first frequency to a second frequency. In one embodiment, an up-converter includes a mixer having at least one stub for reflecting harmonic energy back into the mixer so as to improve its efficiency. In a further aspect of the invention, an up-converter can perform a conversion from about 3 GHz to about 30 GHz in a single conversion. In another aspect of the invention, the module can include a gate voltage control circuit to provide a predetermined drain current to a power amplifier. In another aspect of the invention, an up-converter module includes a transition from a substrate, such as microstrip, to a circular waveguide.

Description

FREQUENCY CONVERTER MODULE

CROSS REFERENCE TO RELATED APPLICATIONS Not Applicable. STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH Not Applicable. FIELD OF THE INVENTION

The present invention relates generally to communication circuits, and more particularly, to circuits for receiving and transmitting microwave signals. BACKGROUND OF THE INVENTION

Frequency converter modules are used in a variety of applications for converting a signal from one frequency to another frequency. For example, transmit modules generally include an up-converter to facilitate the transmission of a radio frequency (RF) signal. Typically, a mixer combines a signal from a local oscillator (LO) with an intermediate frequency (IF) signal to produce the RF signal that is launched into a transmission line and ultimately transmitted by an antenna.

Mixer efficiency is a significant factor in determining the cost and manufacturability of RF transmit modules. In general, mixer efficiency is defined in terms of conversion loss at the desired frequency conversion. A number of variables determine the overall conversion loss of the mixer including inherent component losses, local oscillator (LO) power input into the mixer, and undesirable harmonic signals. As known to one of ordinary skill in the art, unwanted harmonic signals contain wasted energy that negatively impacts the conversion loss of the mixer. Typically, conventional impedance matching techniques are utilized to minimize the mixer conversion loss. However, such techniques do not recover energy that is lost due to the generated harmonic signals.

A further disadvantage associated with certain frequency converters occurs when the difference in frequency between the IF signal and the RF signal becomes relatively large. For example, a very low IF frequency generally results in very closely spaced conversion products, which are very difficult and expensive to filter. If the IF frequency is less than about 5% of the RF frequency, two mixers are generally employed to overcome this closely-spaced spuriuous product problem. Multiple mixing circuits can dramatically increase the cost and complexity of the transmit module. For example, the local oscillators providing the respective LO signals to the mixers must be locked in phase. In addition, the signals must be amplified due to signal l attenuation associated with the mixer circuitry and filtered to remove unwanted signals. Further, designing practical filters to pass the desired RF signal with sufficient rolloff to remove adjacent harmonic signals presents a significant challenge.

In addition to the above, fabricating high frequency circuits, such as frequency converter modules, has many design challenges and inefficiencies that are well known to one of ordinary skill in the art. One such inefficiency is associated with so-called pinch off voltages for certain circuits, such as MMIC power amplifiers. FIG. 1 shows first and second MMIC power amplifiers 10,12 coupled in a conventional balanced amplifier configuration. For the first amplifier 10, a predetermined drain current ID1 is provided by a gate voltage -Vgl, which can be selected from a first voltage divider network 14 having first and second resistors R1,R2.

Similarly, a gate voltage -Vg2 is applied to the second amplifier 12 by a second voltage divider network 16 having third and fourth resistors R3,R4, at least one of which is typically provided as a potentiometer. As known to one of ordinary skill in the art, the first and second amplifiers 10,12 should have equal drain currents for balance and optimum power output. To achieve the predetermined drain current for the second amplifier, the gate voltage -Vg2 must be adjusted due to variations between the first and second amplifiers 10,12. Typically, the third resistor R3 of the resistor network is provided at a potentiometer to vary the gate voltage -Vg2 applied to the second amplifier 12, and thereby, equalize the drain currents ID1,ID2 applied to each of the first and second MMIC power amplifiers 10,12. The fabrication costs of tuning each gate voltage by manually adjusting a potentiometer are well known to one of ordinary skill in the art.

Another disadvantage associated with some known up-converter modules is the transition from microstrip to waveguide. For example, typical configurations include a pin launch from microstrip to a circular waveguide. While this arrangement may provide adequate performance for certain applications, the pin is difficult to manufacture due to tolerances required for high frequency operation. In addition, the pin is subject to breakage. Other launch configurations include a so-called finline launch into a rectangular waveguide. However, a rectangular waveguide accepts only one signal polarization and has a relatively large cutoff wavelength.

It would, therefore, be desirable to provide a frequency converter module that overcomes the aforesaid and other disadvantages. SUMMARY OF THE INVENTION

In one aspect of the invention, a frequency converter module includes a mixer circuit having at least one stub that reflects harmonic energy back into the mixer. By reflecting harmonic energy back into the mixer, the conversion loss of the mixer is improved. In one embodiment, an up-converter module receives an IF signal that is mixed with an LO signal to provide an RF signal. A first stub is located proximate the IF port for reflecting the LO first harmonic signal back into the mixer. The first stub is placed at the precise phase, i.e., distance, from the mixer to reflect the LO signal first harmonic energy back into the mixer. That is, the first stub is configured to provide an impedance characteristic that causes the first harmonic signal frequency of the LO signal to be reflected back into the mixer.

The module can include further stubs to reflect additional harmonic signals back into the mixer. A second stub near the IF port reflects second harmonic LO signal energy back into the IF port. A third stub at the RF port of the mixer can reflect first harmonic LO signal energy back into the mixer. These stubs can be located and sized to be quarter wave resonant at the respective first and second LO harmonics. Additional stubs can reflect harmonic signals from the IF signal. It is understood that harmonic reflecting stubs are equally applicable to down- converter circuits.

In another aspect of the invention, an frequency converter module includes a single conversion wherein the IF frequency is less than about ten percent of the up-converted RF output signal. In one embodiment, a 2.5 GHz signal is converted to a 29.5 GHz signal. Converting the IF signal to the RF signal with a single mixer significantly simplifies the circuit as compared with multiple conversion circuits.

In a further aspect of the invention, a balanced amplifier circuit, for example, includes first and second power amplifiers each having a gate voltage that is applied by a respective gate voltage control circuit for maintaining predetermined currents at the drain terminals of the power amplifiers. The gate voltage control circuit can include first and second amplifiers coupled in a feedback configuration to adjust the gate voltages applied to the power amplifiers based upon a nominal value selected for the drain current. This arrangement eliminates the need for manual tuning of me amplifier gate voltages, which is typically required for known balanced amplifier circuits.

In yet another aspect of the invention, a finline launch structure is used to transition from a substrate to a circular waveguide. The finline geometry is optimized to minimize cross polarization in receive mode and maximize the desired signal polarization in transmit mode. BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be more fully understood from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. 1 is a schematic diagram of a prior art balanced amplifier circuit that requires manual gate voltage adjustment;

FIG. 2 is a schematic representation of a mixer circuit having stubs for reflecting harmonic energy back into the mixer in accordance with the present invention; FIG. 3 is a schematic diagram of an exemplary mixer circuit implementation having stubs for reflecting harmonic energy back into the mixer in accordance with the present invention;

FIG. 4 is a top view of an up-converter circuit assembly including a mixer circuit having stubs for reflecting harmonic energy back into the mixer in accordance with the present invention; FIG. 5 is an up-converter module having a single frequency conversion in accordance with the present invention;

FIG. 5 A is a top view of a portion of the up-converter module of FIG. 5; FIG. 6 is a graphical depiction of the gain versus temperature for the up-converter module of FIG. 5; FIG. 7 is a schematic depiction of a gate control circuit for providing a predetermined drain current in accordance with the present invention;

FIG. 8 is a schematic diagram showing further details of the gate control circuit of FIG. 9; FIG. 9 is an exemplary circuit implementation of the gate control circuit of FIG. 8; FIG. 10 is a top view of a finline launch from a substrate into a circular waveguide in accordance with the present invention;

FIG. 11 is a schematic view showing further details of the finline launch structure of FIG. 10; and

FIG. 12 is a perspective view of the finline launch structure of FIG. 10. DETAILED DESCRIPTION OF THE INVENTION FIG. 2 shows a mixer circuit 100 having one or more stubs for improving the conversion loss of the mixer in accordance with the present invention. As known to one of ordinary skill in the art, the conversion loss of a mixer is indicative of the efficiency of the mixer for a desired frequency conversion. In general, the stubs reflect harmonic energy back into the mixer to reduce energy loss and thereby increase the mixer efficiency. The stubs are placed at the precise phase, i.e., distance, from the mixer to cause a given harmonic signal to be reflected back into the mixer and thereby recycle the harmonic energy so as to enhance the conversion loss of the mixer. The mixer 100 includes a first port PI for receiving an intermediate frequency (IF) signal and a second port P2 for receiving a local oscillator (LO) signal. A resultant radio frequency (RF) signal is provided on a third port P3 of the mixer. As is well known to one of ordinary skill in the art, a series of harmonic frequencies is generated by the IF and the LO signals. In general, it is understood that the LO signal, which is relatively strong, in particular generates harmonic signals at the other ports, e.g., P1,P3. A first stub P1LOH1 for reflecting the first harmonic signal of the LO signal at the first

(IF) port PI is located a predetermined distance from the mixer and sized to reflect the first harmonic signal from the LO signal back into the mixer. By reflecting the harmonic signal energy back into the mixer, the energy efficiency of the mixer in increased.

In an exemplary embodiment, the mixer circuit 100 includes further stubs for reflecting other harmonic signals back into the mixer. A stub P1LOH2 for reflecting the second harmonic signal from the LO signal can reflect this signal back into the first port PI of the mixer. Stubs P3LOH1, P3LOH2 for reflecting respective first and second harmonic LO signals at the RF port can be located proximate the third port P3. Stubs P3IFH1,P3IFH2 can also be located near the RF port for reflecting respective first and second IF harmonic signals. Similarly, stubs P2IFH1 ,P2IFH2 can be located near the second port P2 for reflecting first and second IF harmonic signals back into the LO port of the mixer.

It is understood that further stubs can be placed around the various ports P1,P2,P3 at selected locations to reflect further harmonic signals into the mixer. It is further understood that a down-converter for converting an RF signal to an IF signal can include a mixer circuit having stubs placed at the IF and LO ports for reflecting RF harmonic signals back into the mixer. FIG. 3 shows an exemplary embodiment of an up-converter module 200 including a mixer 202, which is shown as an image-enhanced rat-race diode mixer, having harmonic reflecting stubs in accordance with the present invention. The up-converter module 200 provides an IF signal and a LO signal to the mixer 202 to produce an RF signal that can be launched into a waveguide. The microstrip dimensions for the circuit are indicated by convention notation, e.g., 18X100 (18 mils wide by 100 mils long).

In an exemplary embodiment, a 2.5-3.0 GHz signal is input into an IF input port 204 and a 27 GHz LO signal is input into an LO input port 206 to provide an RF signal at an RF port 208 having a frequency of about 29.5 to 30 GHZ. The mixer diodes D1,D2 can be provided as a GaAs Beamless Flip-Chip Diode (x2) circuit, part no. DMK2790-000, by Alpha Industries of Woburn, MA.

The IF input signal is filtered by a conventional printed IF low pass filter LPF. An impedance matching circuit 210 can be coupled to an output of the IF LPF, such as opposing 75 by 75 mil areas 210a,b and a 10 by 120 mil area 210c. The module 200 can further include an inductor 212, which can be provided as part number 0603CS-15NX from Coilcraft, Inc. of Gary, IL, to provide a DC discharge path for the circuit.

The LO input signal can pass through a printed band pass filter LO BPF that is then attenuated by a 3 dB attenuator 214, such as part no. ATN3580-03 by Alpha Industries. The attenuated LO signal path to the mixer can include a 0.5 pF capacitor CLO, which can be provided in a 10 by 10 mil stripline area. The RF signal output path from the mixer 202 can include a 10 by 10 mil capacitor CRF, a 3 dB attenuator 216, and an alumina band pass filter RF BPF. The module further includes a first stub 218 disposed near the IF port of the mixer for reflecting a first harmonic signal, i.e., 27 GHz, of the LO signal back into the mixer 202. The first stub 218 has stripline dimensions of about 18 mils wide by 67 mils long extending from the IF signal path. The first stub 218 should be quarter wave resonant for the 27 GHz first harmonic signal of the LO signal. It is understood that one of ordinary skill in the art can readily determine the location and geometry for providing the first stub with a characteristic impedance that is effective to reflect the first LO harmonic signal back into the mixer.

A second stub 220 for reflecting the second harmonic, i.e., 54 GHz, of the LO signal can also be disposed proximate the IF port. The second stub 220 dimensions can be 18 by 33 mils. The first and second stubs 218,220 reflect the LO first and second harmonic signals from the IF port back into the mixer to increase the overall energy efficiency of the mixer. That is, the mixer conversion loss is improved by reflecting the harmonic energy back into the mixer that would otherwise be wasted.

A third stub 222 having dimensions matching those of the first stub 218 can be disposed proximate the RF port of the mixer for reflecting the LO first harmonic signal back into the mixer.

It is understood that further stubs can be disposed about the mixer ports to reflect additional harmonic signal energy into the mixer. It is further understood that such additional stubs increase the design and fabrication complexity, which should be balanced against improvements in the conversion loss of the mixer. FIG. 4 shows an exemplary microstrip circuit card implementation of the up-converter module 200 of FIG. 3, including the image enhanced rat-race diode mixer 202. The first, second, and third stubs 218,220,222 for reflecting harmonic energy back into the mixer are shown in the circuit layout. While the invention is shown in conjunction with an image-enhanced rat-race diode mixer, it is understood that harmonic reflecting stubs in accordance with the present invention are also applicable to other types of mixers that would benefit from reflecting harmonic energy back into the mixer to improve the conversion loss of the mixer. In addition, harmonic reflecting stubs are applicable to up and down frequency conversion modules and other applications in which harmonic energy is present at one or more mixer ports, regardless of frequency plan spacing.

FIG. 5 shows a transmit module 300 having a single up-converter in accordance with the present invention. While shown as converting an IF signal having a frequency of about 2.5-3.0 GHz to an RF signal of about 29.0 GHz, it will be readily apparent to one of ordinary skill in the art that the invention is readily applicable to other frequency converters (up-converters and down-converters).

The module includes an IF signal input port 302 for receiving an IF signal, which can have a frequency from about 2.5-3.0 GHz, for example. The IF signal level can have a minimum signal level of about -24 dBm and a maximum signal level of about -20 dBm. The IF signal is filtered and amplified by a first IF amplifier IFA1 to provide a signal level of about -10 dBm, which passes through a first temperature compensating attenuator TCI . The IF signal is amplified by second and third IF amplifiers IFA2,IFA3 and attentuated by a second temperature compensating attentuator TC2 before being amplified by a fourth IF amplifier IFA4. The signal then passes through a third temperature compensating attenuator TC3 and is filtered by a first IF band pass filter BPF1 prior to entering a mixer 304, which can be provided as a single balanced diode mixer.

The LO signal is provided from first and second oscillators OSCl,OSC2, which can be locked in phase in order to comply with governmental regulations regarding oscillators for transmitting signals. In one embodiment, a sampling phase detector (SPD) based phased-lock loop (PLL) circuit is used to lock the oscillators in phase. The first oscillator OSC1 can be provided as a 13.5 GHz oscillator and the second oscillator OSC2 can be provided as a 108 MHz reference oscillator.

The 13.5 GHz signal from the first oscillator OSC1, after being amplified by amplified by first and second LO amplifiers LOl,LOA2, passes through a frequency doubler FD to provide a 27 GHz signal. The frequency doubler FD can include harmonic reflecting stubs, as described above, to increase the circuit efficiency. The signal is then filtered about 27 GHz by a first local oscillator signal filter LOF and amplified by a MMIC power amplifier LOPA. Prior to entering the mixer 304, the signal passes through an attenuator ATT such that about a +15 dB LO signal is provided to the mixer.

The RF signal from the mixer 304 is filtered with a first RF band pass filter RFBPFl having a RF bandpass from about 29.5 GHz to about 30.0 GHz. The filter RFBPFl should provide sufficient rolloff from the bandpass frequency to filter unwanted harmonics that are generated in the RF band by the relatively close frequency spacing between the LO and RF frequencies, as described above. In one embodiment, the adjacent signals, e.g., harmonic signals, are at least 6 dB down from the RF output frequency of 29.5 to 30.0 GHz in order to meet the applicable standards. The first RF bandpass filter RFBPFl can be provided as a precision printed edge-coupled filter on an Alumina or Quartz substrate, or it may be realized as a multi-layer ceramic structure such as that provided by Merrimac Industries of New Jersey. The filter RFBPFl provides sufficient out-of-band attenuation to remove unwanted conversion products generated by the mixer at the image frequency and at the frequency F_LO + 2Fπ?. These two out-of-band but adjacent signals are reduced by more than about 20 dB using an Alumina filter, and they are reduced by more than about 35 dB using a multi-layer ceramic filter. This unwanted signal rejection can be important to a single frequency conversion circuit in accordance with the present invention. Even though an Alumina or Quartz filter may be more expensive than a printed filter on a soft-substrate, the filter can be mounted within the module as a separate component through a hole in the substrate, and the use of such a filter does not compromise a relatively low-cost soft- substrate approach.

The RF signal is then amplified by a first RF MMIC power amplifier RFPA1, filtered with a second RF bandpass filter RFBPF2, and amplified by a second RF MMIC amplifier RFPA2. It is understood that the second RF bandpass filter RFBPF2 can be the same or different from the first RF bandpass filter RFBPFl . The amplified signal then passes through an amplifier circuit 306 having first and second amplifiers BA1,BA2 coupled in a balanced amplifier configuration. The amplifier inputs are coupled via an input branch line coupler BLC1 and the amplifier outputs are coupled via an output branch line coupler BLC2. An exemplary microstrip implementation of the balanced amplifiers BA1,BA2 and branch line couplers BLC1,BLC2 is shown in FIG. 5A.

The branch line couplers BLC1,BLC2 enhance the fabrication efficiency of the module since they can be printed on the substrate using conventional microstrip processing. In addition, the branch line couplers eliminate the need for traditionally used Lange type couplers, which include a series of fingers that must be wire-bonded together. In addition, Lange type couplers require relatively precise etching dimensions, which may require the use of relatively expensive substrates, such as alumina thereby increasing the cost and complexity of a module. In contrast, the branch line couplers can be printed on a flexible soft substrate and has looser etching requirements. While shown in the illustrated embodiment in conjunction with balanced amplifying of a 29.5-30 GHz signal, it is understood that a branch line coupler is applicable to other high frequency signals, such as 20 and 24 GHz signals, for example.

As shown in FIG. 6, the temperature compensating attenuators TC maintain a substantially constant gain for the module over temperature variations. In an exemplary embodiment, the temperature compensating attenuators TC vary over temperature at a rate equal and opposite to 1/3 of the gain variation of the combined gain function within the module over the same temperature range due to all other effects, thus compensating for overall gain variation with temperature. Exemplary temperature compensating attenuator devices are available from EMC Corporation of Cherry Hill, NJ, and are available in a variety of attenuation -vs- temperature characteristics. In one embodiment, the temperature compensating attenuators are provided as part No. TVA-0500N07W3S at -0.007 dB / Degree C. Thus, the signal gain for the module will be substantially the same for cold weather and hot weather locations. In an exemplary embodiment, the system gain is about 53 dB with a gain variation of about 4.2 dB over a temperature range of about -32 degrees Celsius to about +50 degrees Celsius. FIG. 7 shows a gate voltage control circuit 400 in accordance with the present invention for automatically providing a predetermined drain current to an amplifier PA, such as a MMIC power amplifier. The circuit 400 biases the power amplifier PA to the predetermined drain current over a range of gate pinch off characteristics despite variations in the MMIC power amplifiers. The gate voltage control circuit 400 eliminates the need for manual tuning of potentiometers in a voltage divider network to achieve the requisite gate voltage.

FIG. 8 shows an exemplary implementation of the gate voltage control circuit 400 of FIG. 7. The gate control circuit 400 includes a first amplifier 402 having positive and negative inputs 404,406 coupled across a sense resistor RS. A positive voltage supply V+ provides a drain current through the sense resistor RS to the drain D of a MMIC power amplifier PA. A switching element Ql, which can be provided as a transistor, has a base terminal BT coupled to an output VO1 of the first amplifier, a collector terminal CT coupled to the positive input 404, and an emitter terminal ET coupled to a negative input terminal 408 of a second amplifier 410 via a drain current resistor RIDS. A resistor R and a capacitor C are coupled in parallel between the output of the second amplifier 410 and the negative input terminal 408. A gate voltage source 412 is coupled to the output VO2 of the second amplifier 410 and to the gate G of the power amplifier PA.

In operation, the voltage applied to the gate G of the power amplifier PA is adjusted to provide a predetermined drain current ID to the power amplifier PA. In general, a nominal voltage is selected as the gate voltage VG to be applied to the power amplifier to achieve the predetermined drain current ID. The first and second amplifiers 402,410 provide a feedback loop that compensates for power amplifier process variations by adjusting the gate voltage to maintain the drain current at the predetermined level. Current flowing through the sense resistor RS generates a voltage that is applied across the input terminals of the first amplifier 402. The first amplifier output VO1 provides a signal corresponding to the sense resistor RS voltage to the negative input terminal 408 of the second amplifier 410, which is coupled to its output VO2. This arrangement varies the gate voltage applied to the power amplifier gate terminal G to achieve the desired drain current ID. More particularly, the positive input terminal 414 of the second amplifier 410 is at a virtual ground due to the voltage divider network RVD1,RVD2 between the voltage supplies. The divider network also pinches off the power amplifier PA until the gate voltage is set. The drain current resistor RIDS sets a scaled current value corresponding to the predetermined drain current ID. The second amplifier 410 biases the gate voltage to virtual ground such that the predetermined drain current ID level is provided to the power amplifier PA.

FIG. 9 shows further details of the gate voltage control circuit of FIG. 8 in which the first amplifier 402 and switching element Ql are provided as an integrated circuit, such a High Side Current Sense Amplifier having part no. MAX 471 by Maxim Integrated Products of Sunnyvale, California. The gate voltage control circuit of the present invention maintains a predetermined drain current by automatically adjusting the gate voltage to compensate for temperature and process variations between amplifiers. Thus, the need for manual tuning of potentiometers for adjust the gate voltage is eliminated. Respective gate voltage control circuits can be coupled to each amplifier in a balanced amplifier configuration to provide balance and optimal power output. FIGS. 10-12 show an exemplary finline launch structure 500 for transitioning from a substrate, such as microstrip, to a circular waveguide 502 in accordance with the present invention. The finline launch 500 includes first and second metal layers 504,506 separated by a dielectric layer 508. An up-converter module, such as those described above, can provide an RF signal to be launched into the waveguide for transmission from an antenna. The geometry of the finline structure is optimized for minimal insertion loss and cross polarization rejection.

In one embodiment, the finline launch structure was modified from the well known microstrip to rectangular waveguide transition. In the case of a rectangular waveguide, the desired waveguide mode is TE₁₀, or one-half wave of Transverse Electric Field mode support in one direction ("y") only. For a circular waveguide, the lowest (and generally preferred) mode of operation is TE_ll5 or one half wave of Transverse Electric Field mode support in two dimensions (r, θ) simultaneously. The structure used to launch the TE₁₀ mode in rectangular waveguide was modified in length, width (diameter), taper and annular mode-suppressor dimensions in circular waveguide to launch the TEπ mode because the Poynting vectors in both waveguide structures require a similar launch mechanism. In one embodiment, the finline parameters were selected by using a three-dimensional Electromagnetic Field Simulation software tool, such as HFSS provided by Agilent Technologies of Palo Alto, California. In general, each of the parameters was modified and evaluated using software simulation in a trial and error process. The first metal layer 504 tapers from the microstrip 510 to a wall 512 of the launch structure. The second metal layer 506 also tapers to an opposite wall 514 of the launch structure. The tapered surface 516 of the first metal layer 504 is defined by a length L and a height H multiplied by the cosine of an angle along the length L, i.e., Hcos(θ), where θ varies from 0 to 90 degrees along the length L. The height H corresponds to H = R + W/2, where R is the radius of the circular waveguide from the center line LA to the wall 512, and W is the width of the microstrip run from where the taper begins at L equals 0 degrees. The second metal layer 506 includes a similar taper in the opposite direction. That is, where the first layer 504 tapers downwardly to the first wall 512, the second layer 506 tapers upwardly to the second wall 514. In one embodiment, the finline structure is centered about a longitudinal axis LA of the circular waveguide 502 to maximize broad band performance.

The first and second metal layers 504,506 include a metal free cutout area 518 that is defined by a first radius Rl and a second radius R2 each extending from a point P. The cutout area 518 is an annular metal-free zone having a gap G corresponding to the difference between the first and second radii R1,R2. The first metal layer 504 can further include a semi-circular insert 520 defined by the second radius R2 and the first wall 512 to prevent the metal free area from resonating. In one embodiment, the first and second metal layers 504,506 are coupled to the finline structure, e.g., grounded, by a series of vias 522 into metal placed along the finline edges.

It is understood that the shape of the finline structure is scalable to other frequencies. One of ordinary skill in the art can readily extrapolate the design to any circular waveguide at any frequency where circular waveguide may be used. In general, the dimensional tolerances are not critical as performance is related to accuracy, but these are low-Q structures and are not tuned. Thus, performance is quite good with tolerances easily controlled by standard manufacturing processes. For example, variations of ±10% in one or more parameters will not seriously affect performance. For a frequency near 30 GHz, a length L of 540 mils is adequate at 2.25λ to minimize reflections. Any length greater than about 1.5λ will yield good performance. The diameter of the waveguide (and thus the "height" H of the taper) is chosen to select the cutoff frequency of the waveguide, which is well known and tabulated through derived equations for circular waveguide. In one embodiment, H was selected at about 149 mils for a resultant cutoff frequency of about 28.5 GHz, which is abnormally close to the desired operating frequency in order to use the cutoff properties of the waveguide to further attenuate the 27 GHz LO signal - exiting the module via the waveguide launch. In other embodiments, H can be chosen to yield a more conventional cutoff frequency at about 30% above the operating frequency to minimize loss. The illustrated embodiment utilizes a first radius Rl of about 131 mils and a second radius R2 of about 95 mils. The curve of the tapered surface 516 of the first metal layer 504 is

149cos(θ), wherein θ varies from 0 degrees at the beginning of the taper and 90 degrees at the intersection with the first wall 512.

In an exemplary embodiment, the finline structure 500 has an impedance of about 42 Ohms at about 30 GHz looking into the circular waveguide 502. It is understood that the dielectric layer can be selected from suitable low-loss microwave dielectric material, having various dielectric constants, and any practical thickness. In one embodiment, the dielectric material is provided as Rogers 4003 8-mil thick, ε_r = 3.7, 1 -Ounce Cu Clad available from Rogers Corporation of Chandler, Arizona.

One skilled in the art will appreciate further features and advantages of the invention based on the above-described embodiments. Accordingly, the invention is not to be limited by what has been particularly shown and described, except as indicated by the appended claims. All publications and references cited herein are expressly incorporated herein by reference in their entirety.

What is claimed is:

Claims

1. A mixer circuit, comprising: first, second and third ports, the first port being associated with an IF signal, the second port being associated with an LO signal, and a third port associated with an RF signal; and a first stub proximate a first one of the first, second and third ports for reflecting a harmonic signal of a first one of the IF, LO, and RF signals back into the mixer to improve the efficiency of the mixer.

2. The circuit according to claim 1, wherein the first stub reflects a first harmonic of the LO signal into the mixer.

3. The circuit according to claim 1 , wherein the first stub is located proximate the first port for reflecting a first harmonic of the LO signal back into the mixer.

4. The circuit according to claim 3, further including a second stub proximate the third port for reflecting a first harmonic of the LO signal back into the mixer.

5. The circuit according to claim 1, wherein the first stub is quarter wave resonant for a first harmonic of the LO signal.

6. The circuit according to claim 1, wherein the mixer circuit is an image-enhancement type mixer.

7. The circuit according to claim 1 , wherein the mixer is a rat-race type mixer.

8. A method of improving the conversion loss of a mixer, comprising: forming a first stub proximate a first port of the mixer for reflecting a first harmonic signal generated by the mixer back into the first port.

9. The method according to claim 8, wherein the first harmonic signal corresponds to a first harmonic of an LO signal input into the mixer.

10. The method according to claim 9, further including forming a second stub proximate a second port of the mixer for reflecting a second harmonic signal generated by the mixer back into the second port.

11. The method according to claim 10, wherein the second harmonic signal corresponds to a first harmonic of the LO signal input into the mixer.

12. The method according to claim 8, wherein the first stub is quarter wave resonant for the first harmonic signal.

13. The method according to claim 8, wherein the mixer is an image-enhanced mixer.

14. A gate voltage control circuit, comprising; an amplifier having a gate terminal, a drain terminal and a source terminal; a control circuit for automatically adjusting a voltage applied to the gate terminal to provide a predetermined current to the drain terminal.

15. A finline launch structure for transitioning a signal from a substrate to a circular waveguide.

16. A frequency converter module, comprising; a mixer circuit for converting an IF frequency to an RF frequency in a single conversion, wherein a difference between the IF frequency and the RF frequency is at least 27 GHz.

17. A frequency converter module, comprising: first and second amplifiers having respective input and outputs coupled in a balanced amplifier configuration; a first branch line coupler coupled to the inputs of the first and second amplifiers; and a second branch line coupler coupled to the outputs of the first and second amplifiers, wherein the signal amplified by the first and second amplifiers is at least twenty GHz.

18. The module according to claim 17, wherein the first and second branch line couplers are printed on a substrate.