WO2002005513A1

WO2002005513A1 - Interface device for interfacing between a baseband processor and a radio transceiver unit

Info

Publication number: WO2002005513A1
Application number: PCT/SE2001/001585
Authority: WO
Inventors: Jakob Brundin
Original assignee: Spirea Ab
Priority date: 2000-07-07
Filing date: 2001-07-09
Publication date: 2002-01-17
Also published as: AU2001271181A1; SE0002615L; SE0002615D0

Abstract

This invention relates to an interface device for interfacing between a baseband processor (2) and a radio transceiver unit (6) of a transceiver apparatus, said interface device (4) comprising a plurality of general purpose input circuits (8) connectable to the baseband processor, a plurality of general purpose output circuits (12) connectable to the radio transceiver unit for transmitting a second signaling protocol to said radio transceiver unit, and configurable signal processing resources (32, 35, 37, 42, 43) provided in said general purpose input circuits as well as in said general purpose output circuits for translating said first signaling protocol into said second signaling protocol, which is adapted to the radio transceiver unit, said interface device being configurable for translation between any one of a plurality of different types of first signaling protocols and any one of a plurality of different types of second signaling protocols respectively. The invention also relates to a baseband processor and a transceiver unit respectively, comprising said interface device.

Description

INTERFACE DEVICE FOR INTERFACING BETWEEN A BASEBAND PROCESSOR AND A RADIO TRANSCEIVER UNIT

Technical field

This invention relates generally to communication systems and more particularly to an interface device for interfacing between a baseband processor and a radio transceiver unit of a transceiver apparatus .

Technical background

A transceiver apparatus represents a fundamental element of a communication system. A transceiver appara- tus comprises a baseband processor and a radio transceiver unit . The baseband processor manages the baseband data stream and controls the functions of the radio transceiver unit. The baseband processor and the radio transceiver unit of the transceiver apparatus are typi- cally implemented as a pair of discrete units. The radio transceiver unit (RTU) requires configuration and control for its function. The baseband processor (BP) communicates that configuration and control of the RTU over a^'n interface, which typically is non-standard and which typically uses a non-standard protocol. Thus, the interface is typically unique for a particular pair of an RTU and a BP .

Consequently, there is restricted possibility to design a transceiver apparatus comprising an arbitrary BP (as available on the market) and an arbitrary RTU (as available on the market) without interface translation. As an example of a situation where it would be desired to be able to design an interface capable of such arbitrary combinations is an implementation of a Bluetooth hardware platform, where a variety of Bluetooth baseband processors and Bluetooth radio transceivers are available to a system designer.

Commonly, thus, BPs and RTUs are designed to function in a pair and are sold on a pair basis from vendors, and for a given application an interface having applica- tion specific properties is designed. On the other hand it would be advantageous for a user to be able to choose BP and RTU freely and from different vendors in dependence of what properties are desired. However, free combi- nations are not allowed without adapting interface circuitry. Additionally, it is not possible to substitute a different unit for a previously used one without having to rework the interface circuitry.

Summary of the invention

The object of this invention is to provide a device and a method for obtaining a flexibility as to the combination of different BPs with different RTUs .

The object is achieved by a device and a method as defined in the appended claims.

Thus, in one aspect of the present invention there is provided an interface device for interfacing between a baseband processor (2) and a radio transceiver unit (6) of a transceiver apparatus, said interface device (4) comprising a plurality of general purpose input circuits (8) connectable to the baseband processor, for receiving a first signaling protocol from the baseband processor, a plurality of general purpose output circuits (12) connectable to the radio transceiver unit for transmitting a second signaling protocol to said radio transceiver unit, and configurable signal processing resources (32, 35, 37, 42, 43) provided in said general purpose input circuits as well as in said general purpose output circuits for translating said first signaling protocol into said sec- ond signaling protocol, which is adapted to the radio transceiver unit, said interface device being configurable for translation between any one of a plurality of different types of first signaling protocols and any one of a plurality of different types of second signaling protocols respectively.

The invention as claimed, due to the capability of being configured for transformation between arbitrary signaling protocols, is an enabling technology to obtain greater freedom in component and/or sub-system selection when designing a transceiver system. It provides broader compatibility for arbitrary combinations of baseband processors (BPs) and radio transceiver units (RTUs) .

The interface device according to the invention can be integrated in a BP/RTU. When a vendor does so, the user benefits from greater flexibility and choice. Further, the interface device of the invention allows BP/RTU vendors to present complete and customized BP/RTU offerings without having to design both BP and RTU in a bundle. Additionally, more particularly and as an example of a typical application, the invention is useful when assembling a Bluetooth hardware platform with a flexible choice of BP/RTU selection.

Further, the interface processor is used for configuring the other entities, such as the general purpose input and output circuits, for processing communication between different types of baseband processors and radio trans- ceiver units and receives, in turn, configuration information from an external source. Thereby, the interface device is configurable for an arbitrary combination of a baseband processor and a radio transceiver unit .

In another aspect of the invention there is provided an interface device comprising an input device having a plurality of input signaling pins and a plurality of signal processors each connected to a respective input signaling pin; an output device comprising a plurality of output signaling pins; an interface processor, said input signaling pins being connectable to a baseband processor and said output signaling pins being connectable to a radio transceiver unit; an internal bus connected to said input device, said output device and said interface processor. Said interface processor is configurable to per- form transformation of an input event, received at one or more of said input signaling pins and conforming to a first signaling protocol, into at least one output event,

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respectively, in accordance with said transformation characteristics .

Further objects and advantages of the present invention will be discussed below by means of exemplary em- bodiments .

Brief description of the drawing

Exemplifying embodiments of the invention will be described below with reference to the accompanying draw- ings , in which:

Fig. 1 is a schematic block diagram of a transceiver system;

Fig. 2 is a schematic block diagram of an embodiment of the interface device according to the invention; Fig. 3 is a schematic block diagram of a general purpose input circuit of the interface device; and

Fig. 4 is a schematic block diagram of a general purpose output circuit of the interface device.

Description of embodiments

Referring to Fig. 1, a transceiver system according to the present invention comprises a baseband processor (BP) 2, a radio transceiver unit (RTU) 6, an interface device, which is also referred to as a configurable translator unit (CTU) , 4 connected between the BP 2 and the RTU 6, and an antenna 8 connected to the RTU 6. The CTU 4 performs protocol transformation, or translation, for interfacing between a variety of BPs and a variety of RTUs . In this context protocol refers to a physical in- terface and a signaling method as defined above. The CTU 4 is independent of any BP 2 (any vendor) and RTU 6 (any vendor) and provides a transparent conversion from the view of any BP or RTU. The CTU 4 can be designed as a stand alone unit between the BP 2 and the RTU 6, or be an integral part of either the BP 2 or the RTU 6. If the RTU 6 comprises the CTU 4 it exhibits great flexibility in selection of, and ease of integration with, a variety of BPs 2. Similarly, if the BP 2 comprises the CTU 4 it exhibits great flexibility in selection of, and ease of integration with, a variety of RTUs 6.

Referring now to Fig. 2, an embodiment of the con- figurable translator unit CTU 4 comprises an input device 7 comprising a plurality of general purpose input circuits (GPI1,..., GPIn) 8, an interface processor 10, an output device 11 comprising a plurality of general purpose output circuits (GP01,..., GPOn) 12, and a serial data stream shaper (SDSS) 14. All these entities of the CTU 4 are connected to an internal bus 16 comprising a data bus 15 and a control bus 17 for communicating data and control signals respectively.

The function of each GPI 8 is to accept an input data stream, and to pre-process the data in various ways as configured by the interface processor 10.

The function of each GPO 12 is to receive data forwarded from a GPI 8 or from the interface processor 10, and to transmit it as configured by the interface proces- sor 10.

The function of the SDSS 14 is to shape serial data streams with respect to slew rates, dc-levels, amplification and/or discrete levels as configured by the interface processor 10. The function of the interface processor 10 is to configure GPI, GPO and SDSS as required by an interfacing mode, and to do various processing on data as required by the interfacing mode. The interfacing mode is dependent on which types of BP 2 and RTU 6 that are to be intercon- nected. Instructions as to the interfacing mode are externally originated and input to the interface processor 10. Preferably, the functions of the interface processor 10 are controlled through software, which can contain methods of operation for various interfacing modes. The software and/or interfacing mode can be provided to the interface processor 10 at any time from the exterior of the CTU 4.

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operation, thus allowing for low processing latency with respect to the input/output data rates.

The method of operation is specific to which BP 2 and RTU 6 are connected to the CTU 4. The interface proc- essor software has predefined procedures for how to set up the GPIs 8 and GPOs 12, according to which BP 2 and RTU 6 that is used. The software also has predefined procedures for how to interpret bitstreams from certain BPs 2 and how to format the bitstream to fit a certain RTU 6. The SDSS 14 consists of two paths, one, PI, in the direction BP->RTU and the other, P2 , in the direction RTU->BP. Path PI has two sources, an analog input and a digital input. The digital input is fed through a Gaussian filter 18, which fetches parameters from a filter configuration register provided in the SDSS 14. The filter configuration register is controlled by the interface processor 10. A selector 20 selects either the Gaussian filter output or the analog input, and feeds the selected signal to an adjuster circuit 22. The adjuster circuit 22 contains an amplifier/attenuator 23 providing amplification and dc level control. The selector 20 and parameters for the adjuster circuit 22 are controlled by the interface processor 10 via an associated configuration register. The output of the adjuster circuit is fed to the path output.

In path P2 a shaper 24 shapes the analog/digital input data stream from the RTU 6 to a digital data stream that is fed to the BP 2.

Above an embodiment of the interface device accord- ing to the present invention has been described. This should be seen as merely a non-limiting example. Many modifications will be possible within the scope of the invention as defined by the claims.

As an example thereof the above two path SDSS in an alternative embodiment rather has more than one path in each direction, with each one thereof tailored to a predetermined functionality. Then for each different appli- cation it is decided what paths are necessary to use and the others are left unused.

Claims

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5. An interface device according to any one of claims 1-4, wherein each one of said general purpose input circuits (8) comprises configurable first signal processing means for performing signal processing on an input data stream.

6. An interface device according to claim 5, said first signal processing means being arranged for performing formatting, buffering, and synchronization operations on said input data stream in accordance with a configur- able setup.

7. An interface device according to claim 5 or 6, said first signal processing means being configurable by said interface processor.

8. An interface device according to any one of the preceding claims, each one of said general purpose output circuits (12) comprising configurable second signal processing means for performing signal processing on a data stream accepted from said internal bus (16) before out- putting the data stream as an output data stream. 9. An interface device according to claim 8, said second signal processing means being arranged for performing formatting, buffering, and synchronization operations on said data stream accepted from the internal bus in accordance with a configurable setup. 10. An interface device according to claim 8 or 9, said second signal processing means being configurable by said interface processor.

11. An interface device according to claim 3, said interface processor being loadable with software for con- figuring said general purpose input and output circuits

(8, 12) and said data stream shaper (14) .

12. An interface device according to claim 11, said interface processor being loadable at any time and having an input for receiving externally originated instructions at any time on how to execute the software.

13. An interface device according to claim 3, comprising control means (23) for controlling a dc-level on ω CO M NJ H in o in o in O in

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comprising a configurable second signal processing resource .

19. A method for interfacing a baseband processor operating according to an arbitrary first protocol with a radio transceiver unit operating according to an arbitrary second signaling protocol, comprising the steps of:

- identifying the type of said first signaling protocol ;

- identifying the type of said second signaling pro- tocol;

- determining transformation characteristics for transforming data sent in accordance with said first protocol into data which is transmittable in accordance with said second protocol; - configuring an interface device, connectable to said baseband processor and said radio transceiver unit respectively, in accordance with said transformation characteristics .

20. A method according to claim 19, further compris- ing the steps of:

- receiving, at said interface device, an input event ;

- transforming said input event into at least one output event in accordance with said configuration; and - transmitting, from said interface device, said at least one output event .

21. A method according to claim 19 or 20, wherein said step of configuring comprises the step of providing an interface processor of said interface device with con- figuration information, and configuring, by means of said interface processor and in accordance with said configuration information, an input device and an output device, respectively, of said interface device for performing at least parts of said transformation. 21. A baseband processor for a transceiver apparatus, wherein the baseband processor (2) comprises an interface device (4) according to claim 1 or 14.

22. A radio transceiver unit for a transceiver apparatus, wherein the radio transceiver unit (6) comprises an interface device (4) according to claim 1 or 14.