WO2002003448A1

WO2002003448A1 - Method of determination of silicon p-n junction depth

Info

Publication number: WO2002003448A1
Application number: PCT/AM2001/000001
Authority: WO
Inventors: Gagik Ayvazyan; Aram Vardanyan; Gagik Makaryan
Original assignee: Gagik Ayvazyan; Aram Vardanyan; Gagik Makaryan
Priority date: 2000-07-04
Filing date: 2001-01-10
Publication date: 2002-01-10
Also published as: AU2001228167A1

Abstract

The present invention relates to semiconductor technology. The method comprises the carrying out a silicon surface anodic treatment in volt-static regime of porous silicon formation in P-type silicon before the mechanical opening of the P-N junction, and stopping anodic treatment when anodic current reduces to zero.

Description

METHOD OF DETERMINATION OF SILICON P-N JUNCTION DEPTH

Technical Field

The present invention relates to semiconductor technology and may be used for determination of silicon P-N junction depth, in particular, for epitaxial and diffusion structures. Background Art

There is a method of determination of semiconductor P-N junction depth, which includes mechanical opening of junction, anodic treatment of surface and evaluation of topographic contrast. This has been described in SU Patent 1050470, 2/1982, Method of determination of P-N junction depth and interface layers in semiconductors; A. A. Zalcharov et al. (in Russian).

According to this method mechanical opening of P-N junction is realized by spherical, cylindrical or sloping section with utilization of abrasive powders of different granulation. The interface of P-N junction is discovered by anodic treatment into etching regime. Since anodic etching P- and N- regions takes place with different velocities, the regions get different topographic contrasts. Optic microscope or profilometer fulfills the evaluation of image contrast.

The disadvantage of described sequence is the inefficient accuracy of the process, since mechanical defects on the section surface lead during the consequent development of the interface to a low contrast and sharpness of the image. Improvement of the technique's accuracy is achieved by application of fine grained abrasive pastes, as it was described in DDR Patent 279804, 12/1986, Method of making sections. K. Fischer, and U. Mohr (in Germany). However, in this case seriously suffers the productivity of the method. It is also ineffective to optimize mechanical opening duration by using additional optic tools, particularly in case of large deposition depths (50-100μm) of P-N junction. This has been described in US Patent 4885051, 12/1989, Optically controlled dimpler for preparation of ultrathin samples. D. Hwang Dah-min, and R. Nazar Lawrence.

One previously known method for determination of silicon P-N junction depth was presented by D. Kruger, et al. in DDR Patent 285436, Method of control of layer's thickness (in Germany) which was issued on June 28, 1989. This method includes mechanical opening of P-N junction, anodic treatment of surface with simultaneous control of electrical parameters and evaluation of topographic contrast. In this particular application, anodic treatment is carried out after mechanical opening of P-N junction in ampere-static regime of anodic oxide formation and is stopped when anodic voltage reduces to zero. Anodic voltage control enables to determine precisely the moment of anodic treatment stopping, however the provision of ampere-static regime of treatment depends on certain technical difficulties, particularly in case of using samples of different sizes. Another disadvantage of the method is the inefficient accuracy of the process, since mechanical defects on the section surface lead during the consequent development of the interface to a low contrast and sharpness of the image. Besides, anodic treatment after mechanical opening of P-N junction requires carrying out additional operations of samples' careful cleaning and washing. Disclosure of Invention

Therefore, the object of this invention is to increase precision and productivity of the method of determining the silicon P-N junction depth.

According to the present invention, as differentiated from the patent by D. Kruger, et al., anodic treatment is carried out in volt-static regime of porous silicon formation in P-type silicon before the mechanical opening of P-N junction, and is stopped when anodic current reduces to zero.

Invention is explained as follows. Porous silicon (PS) layers are anodicly produced on the silicon samples in an electrolyte containing hydrofluoric acid. Such technology is described in Y.S. Tsou, Y. Xiao, and C.A. Moore. Porous silicon. World Sci. Publ., NY, 1994, 412 p. Due to anodic nature the process, PS formation requires certain quantity of holes. P-type silicon has enough quantity of holes, therefore PS formation takes place at the low anodic voltage (< 5 V). Simultaneously anodic current with density of order 10 mA/cm² flow through system silicon - electrolyte. N-type silicon has tiny quantity of holes, therefore PS formation takes place at higher anodic voltage (over 10 V) and in conditions of additional external influences (light, mechanical stress).

Therefore, while choosing regime of anodic treatment (for example, voltage) we can form PS only in P-type silicon. If anodic treatment is carried out in volt-static regime, then moment of full conversion of P-region into PS is determined precisely when the controlled anodic current drastically reduces to zero (in fact, tiny current with density less than 20 μA/cm² will flow through the system silicon - electrolyte). Mechanical defects on the section surface can not affect the sharpness and contrast of the image and, therefore, the precision of the method as well, because the anodic treatment is carried out before mechanical opening. In this case there's no need to do additional chemical cleaning and washing. Moreover, due to a very low microstrength of PS, it becomes possible to realize mechanical opening of P-N junction within several minutes even at very large deposition depths.

The layer of PS has obvious dark-brown color that's why we can easily distinguish it from crystalline silicon. It gives opportunity to distinguish precisely the porous P-region from the N-region after mechanical opening of P-N junction with the help of microscope. Brief Description of Drawings

The foregoing, and other objects, features and advantages of the invention will be apparent from the following, more particular description of the preferred embodiments, as illustrated in the accompanying drawing, wherein:

FIGS. 1-3 are schematic sectional view for explaining the steps of a method determination of P-N junction depth in accordance with our invention. Best Mode for Carrying out the Invention

Referring now to the drawing there is disclosed method for determination of P-N junction depth in accordance with the teachings of the present invention. In FIG. 1 the N- type silicon wafer 1 1 with a P- type epitaxial or diffusion layer 12 on one surface, is presented. The structure wafer-layer is provided with flat, smooth opposing top and back surfaces. As experimental samples epitaxial silicon structures were used. Typically, epitaxial layers with different thickness 2.5-60.0 μm and resistivity 1.5-7.5 Om-cm were grown on silicon wafers with resistivity 0.01 Om.cm.

At the next stage, which is presented by FIG. 2, the P- type layer 12 is changed to PS layer 21 by an anodic treatment using an electrolyte containing hydrofluoric acid. Typically the wafer is first inserted within a suitable holding device and then immersed within the electrolyte. During immersion the wafer acts as an anode and a conductive member which is likewise inserted within the electrolyte but is not readily dissoluble therein acts as a cathode. When anodic voltage is applied there between a reaction takes place causing gradual deep pore formation on the side wafer exposed to the electrolyte.

In the present example anodic treatment was carried out from the P- type layer side in a volt-static regime on the anodic treatment holding device, with the help of potentiostat. As an electrolyte a solution of hydrofluoric acid (48%) and ethyl eneglycol, taken in proportion of 1 :3, was used. Anodic voltage was 2.5 V, and anodic current - 20-30 mA/cm². The treatment was stopped as anodic current reduced to zero (it was controlled by the amperemeter of the potentiostat). Duration of anodic treatment was ranging between a few seconds up to 45 sec, depending on thickness of epitaxial layer. The above-mentioned conditions are typical for formation of only PS P-type silicon.

The next operation, FIG. 3, was mechanical opening. Mechanical opening of the P-N junction 31 was carried out on the dimpling apparatus for forming a sloping section. As an abrasive material the paste of 1-2 μm granulation was used. Duration of mechanical opening did not exceed 4 min. Topographic contrast of interface epitaxial layer (PS) - wafer 32 was evaluated with optic microscope.

At the same time research was carried out in a known method and comparison of results was realized. Research has shown that proposed invention increases precision and productivity of the method of determination of silicon P-N junction depth.

This completes one method of determination of silicon P-N junction depth. Numerous changes can be made without parting from the spirit and scope of the invention.

Claims

A method of determination of silicon P-N junction depth, comprises the steps of: carrying out a silicon surface anodic treatment in volt-static regime of a porous silicon formation in P-type silicon; controlling anodic current of anodic treatment; stopping the anodic treatment when the anodic current reduces to zero; mechanical opening of a P-N junction; evaluation of the topographic contrast.