WO2002001720A3 - Currentless non-volatile, programmable fuse cell - Google Patents

Currentless non-volatile, programmable fuse cell Download PDF

Info

Publication number
WO2002001720A3
WO2002001720A3 PCT/US2001/020189 US0120189W WO0201720A3 WO 2002001720 A3 WO2002001720 A3 WO 2002001720A3 US 0120189 W US0120189 W US 0120189W WO 0201720 A3 WO0201720 A3 WO 0201720A3
Authority
WO
WIPO (PCT)
Prior art keywords
currentless
volatile
fuse cell
programmable fuse
programmable
Prior art date
Application number
PCT/US2001/020189
Other versions
WO2002001720A2 (en
Inventor
James B Nolan
Samuel Alexander
Original Assignee
Microchip Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microchip Tech Inc filed Critical Microchip Tech Inc
Publication of WO2002001720A2 publication Critical patent/WO2002001720A2/en
Publication of WO2002001720A3 publication Critical patent/WO2002001720A3/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356008—Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
PCT/US2001/020189 2000-06-26 2001-06-25 Currentless non-volatile, programmable fuse cell WO2002001720A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60399300A 2000-06-26 2000-06-26
US09/603,993 2000-06-26

Publications (2)

Publication Number Publication Date
WO2002001720A2 WO2002001720A2 (en) 2002-01-03
WO2002001720A3 true WO2002001720A3 (en) 2002-04-25

Family

ID=24417739

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2001/020189 WO2002001720A2 (en) 2000-06-26 2001-06-25 Currentless non-volatile, programmable fuse cell

Country Status (1)

Country Link
WO (1) WO2002001720A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9343147B2 (en) 2013-03-08 2016-05-17 Microship Technology Incorporated Resistive random access memory (ReRAM) and conductive bridging random access memory (CBRAM) cross coupled fuse and read method and system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990012400A1 (en) * 1989-04-13 1990-10-18 Sundisk Corporation Multi-state eeprom read and write circuits and techniques
EP0666572A1 (en) * 1994-01-31 1995-08-09 STMicroelectronics S.A. Non volatile programmable flip-flop with predefined initial state, especially for memory redundancy circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1990012400A1 (en) * 1989-04-13 1990-10-18 Sundisk Corporation Multi-state eeprom read and write circuits and techniques
EP0666572A1 (en) * 1994-01-31 1995-08-09 STMicroelectronics S.A. Non volatile programmable flip-flop with predefined initial state, especially for memory redundancy circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
"ANNOUNCEMENT", ELECTRONIC ENGINEERING, MORGAN-GRAMPIAN LTD. LONDON, GB, vol. 60, no. 741, 1 September 1988 (1988-09-01), pages 44 - 45,48,50,54, XP000112803, ISSN: 0013-4902 *
DUMITRU CIOACA ET AL: "A million-cycle CMOS 256K EEPROM", IEEE JOURNAL OF SOLID-STATE CIRCUITS., vol. 22, no. 5, October 1987 (1987-10-01), IEEE INC. NEW YORK., US, pages 684 - 692, XP002189322, ISSN: 0018-9200 *

Also Published As

Publication number Publication date
WO2002001720A2 (en) 2002-01-03

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