WO2001091186A3 - Semiconductor multilayer system and a method for producing a semiconductor multilayer system with increased resistance to thermal processing - Google Patents

Semiconductor multilayer system and a method for producing a semiconductor multilayer system with increased resistance to thermal processing Download PDF

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Publication number
WO2001091186A3
WO2001091186A3 PCT/EP2001/005662 EP0105662W WO0191186A3 WO 2001091186 A3 WO2001091186 A3 WO 2001091186A3 EP 0105662 W EP0105662 W EP 0105662W WO 0191186 A3 WO0191186 A3 WO 0191186A3
Authority
WO
WIPO (PCT)
Prior art keywords
multilayer system
semiconductor multilayer
boundary surface
doping
producing
Prior art date
Application number
PCT/EP2001/005662
Other languages
German (de)
French (fr)
Other versions
WO2001091186A2 (en
Inventor
Andreas Wieck
Dirk Reuter
Cedrik Meier
Soheyla Eshlaghi
Original Assignee
Rubitec Gesellschaft Fuer Innovation & Technologie Ruhr Univ Bochum Mbh
Andreas Wieck
Dirk Reuter
Cedrik Meier
Soheyla Eshlaghi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rubitec Gesellschaft Fuer Innovation & Technologie Ruhr Univ Bochum Mbh, Andreas Wieck, Dirk Reuter, Cedrik Meier, Soheyla Eshlaghi filed Critical Rubitec Gesellschaft Fuer Innovation & Technologie Ruhr Univ Bochum Mbh
Publication of WO2001091186A2 publication Critical patent/WO2001091186A2/en
Publication of WO2001091186A3 publication Critical patent/WO2001091186A3/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/15—Structures with periodic or quasi periodic potential variation, e.g. multiple quantum wells, superlattices
    • H01L29/151—Compositional structures
    • H01L29/152—Compositional structures with quantum effects only in vertical direction, i.e. layered structures with quantum effects solely resulting from vertical potential variation
    • H01L29/155—Comprising only semiconductor materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET

Abstract

The invention relates to a semiconductor multilayer system (40) comprising an active region consisting of at least two layers of different semiconductors, which have a band-offset on one boundary surface. Doping materials are present, or are to be introduced predominantly on one doping side (46) of the boundary surface (48) and on the opposing side of the boundary surface, a potential well (50) with quantized energy levels for charge carriers, is provided or is formed. Said multilayer system is characterized in that either at least one hetero-junction is provided on the doping side (46), in a region lying between the doping materials and the boundary surface (48), or several hetero-junctions are present on the doping side. The invention also relates to a corresponding production method.
PCT/EP2001/005662 2000-05-25 2001-05-17 Semiconductor multilayer system and a method for producing a semiconductor multilayer system with increased resistance to thermal processing WO2001091186A2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10025833A DE10025833A1 (en) 2000-05-25 2000-05-25 Semiconductor layer system and method for producing a semiconductor layer system with increased resistance to thermal processing
DE10025833.6 2000-05-25

Publications (2)

Publication Number Publication Date
WO2001091186A2 WO2001091186A2 (en) 2001-11-29
WO2001091186A3 true WO2001091186A3 (en) 2002-05-23

Family

ID=7643478

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2001/005662 WO2001091186A2 (en) 2000-05-25 2001-05-17 Semiconductor multilayer system and a method for producing a semiconductor multilayer system with increased resistance to thermal processing

Country Status (2)

Country Link
DE (1) DE10025833A1 (en)
WO (1) WO2001091186A2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4695857A (en) * 1983-06-24 1987-09-22 Nec Corporation Superlattice semiconductor having high carrier density
US4914488A (en) * 1987-06-11 1990-04-03 Hitachi, Ltd. Compound semiconductor structure and process for making same
EP0841704A1 (en) * 1996-11-07 1998-05-13 Paul-Drude-Institut für Festkörperelektronik Semiconductor transistor device and method of manufacturing the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767539A (en) * 1996-04-05 1998-06-16 Nec Corporation Heterojunction field effect transistor having a InAlAs Schottky barrier layer formed upon an n-InP donor layer
US5798540A (en) * 1997-04-29 1998-08-25 The United States Of America As Represented By The Secretary Of The Navy Electronic devices with InAlAsSb/AlSb barrier
US5844261A (en) * 1997-06-03 1998-12-01 Lucent Technologies Inc. InAlGaP devices
US5811844A (en) * 1997-07-03 1998-09-22 Lucent Technologies Inc. Low noise, high power pseudomorphic HEMT
US6350993B1 (en) * 1999-03-12 2002-02-26 International Business Machines Corporation High speed composite p-channel Si/SiGe heterostructure for field effect devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4695857A (en) * 1983-06-24 1987-09-22 Nec Corporation Superlattice semiconductor having high carrier density
US4914488A (en) * 1987-06-11 1990-04-03 Hitachi, Ltd. Compound semiconductor structure and process for making same
EP0841704A1 (en) * 1996-11-07 1998-05-13 Paul-Drude-Institut für Festkörperelektronik Semiconductor transistor device and method of manufacturing the same

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
BROCKERHOFF W ET AL: "D.C.- AND R.F.-CHARACTERISATION OF CONVENTIONAL AND SUPERLATTICE HETEROSTRUCTURE FIELD-EFFECT TRANSISTORS AT LOW TEMPERATURES", SOLID STATE ELECTRONICS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB, vol. 33, no. 11, 1 November 1990 (1990-11-01), pages 1393 - 1400, XP000161632, ISSN: 0038-1101 *
ESHLAGHI S ET AL: "GA+ ION BEAM INDUCED COMPOSITIONAL INTERMIXING IN MBE GROWN A1XGA1-XAS/GAAS QUANTUM WELLS: OPTIMIZATION OF THE STRUCTURAL PARAMETERS FOR LOW DOSE APPLICATIONS", COMPOUND SEMICONDUCTORS 1999. PROCEEDINGS OF THE 26TH INTERNATIONAL SYMPOSIUM ON COMPOUND SEMICONDUCTORS. BERLIN, AUG. 22 - 26, 1999, INSTITUTE OF PHYSICS CONFERENCE SERIES, LONDON: IOP, GB, vol. NR. 166, 22 August 1999 (1999-08-22), pages 111 - 114, XP000921502, ISBN: 0-7503-0704-8 *

Also Published As

Publication number Publication date
DE10025833A1 (en) 2001-11-29
WO2001091186A2 (en) 2001-11-29

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