WO2001089110A2 - Receiver with a channel estimator, a matched filter, and a decision feedback equaliser - Google Patents

Abstract

Circuitry and method for a communications receiver are disclosed. The circuitry comprises means for estimating an impulse response of a communications channel for a signal received by a receiver, and signal processing means for processing the signal in accordance with a conjugate mirror image of the impulse response. The processing means outputs a processed signal which is symmetrical about a real-valued central maximum power lobe. The central lobe provides a convenient trigger signal for synchronising receiver timing with a received signal.

Description

Circuit

The present invention relates to circuitry for a receiver, and to methods for operation thereof. In particular, but not exclusively, the invention relates to an equaliser for a receiver in a wireless communications system.

Communications channels are non-ideal and tend to introduce errors into a transmitted signal. This is a particular problem in high data rate communications over wireless channels. Such errors may be due to dispersion, signal fading, multipath propagation, inter-symbol interference (IS I) and noise. An effect of these errors is to limit the data rate at which communications can be conducted across the channel. For example, the delay spread in a large cell mobile communications environment can be greater than 15 microseconds. This can limit the data rate to 128 kb/s (for 4-QAM modulation), for example, if no correction procedures are applied. A transmission rate greater than this limit would result in the reception of multiple time delayed versions ofthe signal, with relative delays far greater than a symbol period. This leads to the well-known problem of inter- symbol interference (ISI). ISI becomes a significant problem for any channel (wired or wireless) in which the data rate multiplied by the rms delay spread is greater than 0.1. Another example of a system which is ISI limited is indoor wireless high data-rate communications.

To overcome these problems, it is known to apply equalisation to a received signal. Equalisation seeks to compensate and correct for errors introduced into a received signal during its transmission over an imperfect channel. Equalisers rely on the use of an error signal to adapt a circuit, to which a received signal is input, so as to minimise the combined effects of ISI and noise on the received signal. Many equalisation systems adapt a digital filter to cancel the effects of ISI. Optionally, Maximum Likelihood Sequence Estimation (MLSE) can be applied to the received signal. Filter based equalisers adapt their filters using one of many techniques, these include the Least Mean Squares (LMS), Recursive Least Squares (RLS), and

Minimum Mean Square Error (MMSE) algorithms. The LMS algorithm is relatively simple but offers low performance with slow convergence. The RLS algorithm is complex but achieves a good performance with rapid convergence. The MMSE algorithm is a low complexity algorithm that tries to improve on the performance offered by the LMS approach. MLSE techniques represent the theoretical optimum performance, however, since they use the Niterbi Algorithm their complexity is extremely high. Techniques such as the RLS and MLSE are generally unacceptable for typical small sized, lightweight, power critical portable devices due to their high levels of processing. This is particularly true for data rates in excess of 1 Mb/s. In particular, in mobile applications operating with time- varying wireless channels the necessary processing power and power consumption for these techniques can prove prohibitively expensive or unacceptable.

Embodiments of the present invention seek to address one or more ofthe drawbacks of known receivers, in particular drawbacks associated with equalisation systems for receivers.

In a first aspect ofthe present invention, there is provided circuitry for a communications receiver, comprising: signal processing means for processing a received signal to provide a processed signal comprising a real-valued central lobe; and means for synchronising receiver timing with a real-valued central lobe of said processed signal.

In a second aspect ofthe present invention there is provided a method for obtaining a synchronisation signal from a received signal, the method comprising: processing a received signal to provide a processed signal comprising a real-valued central lobe; and synchronising timing of the receiver with said central lobe of said processed signal.

Embodiments in accordance with the first and second aspects ofthe invention advantageously provide a relatively simple means for deriving timing synchronisation from a received signal in the presence of noise, co-channel interference or time delay spread.

Suitably, the signal processing means is configurable to process said received signal in accordance with a conjugate mirror image of a complex impulse response of a communications channel corresponding to said received signal.

Processing the received signal in accordance with the mirror image conjugate ofthe impulse response ofthe corresponding communications channel is a preferable way to obtain an overall impulse response that is symmetrical about a real-valued central energy peak. That is to say, the processed signal is the result ofthe combined channel/mirror image conjugate impulse responses and is symmetrical about a real- valued central energy peak regardless ofthe original channel impulse response characteristic (shape). The central peak always identifies the timing associated with the wanted symbol in the processed signal. Due to channel dispersion, a desired symbol suffers from unwanted contributions arising from neighbouring symbols in time, known as intersymbol interference (ISI). Before processing the signal with the conjugate mirror image ofthe estimated impulse response, the received signal profile has a random shape, with its peak possibly anywhere within a delay-spread window for the communications channel. The Eigen value spread for the communications channel can be very severe, resulting in poor equalisation. However, after processing in accordance with the mirror conjugate image ofthe channel estimated impulse response, there is always a clear central peak, surrounded by symmetric ISI side lobes. The aggregate impulse response for the communications channel/mirror image conjugate channel combination is always substantially triangular in shape and does not suffer from the severe Eigen value spread observed for the communications channel. Hence, good quality equalisation is obtainable, regardless ofthe original channel impulse response characteristic. Regardless ofthe channel impulse response, the processed signal is symmetrical about a central peak, and the receiver may use the central peak to synchronise its timing with the desired part ofthe received signal. In a preferred embodiment, the circuitry further comprises means for estimating said complex impulse response of said communications channel corresponding to said signal received by said receiver. Thus, the channel over which the received signal is communicated is estimated for each received signal. This is particularly important for mobile communications where the channel characteristics may change rapidly from signal to signal, due to motion ofthe transmitter or receiver.

Suitably, the signal processing means comprises a time delay filter, which is preferably programmable with filter coefficients corresponding to said conjugate mirror image of said impulse response. Thus, the filter may be programmed in accordance with the most current characteristics ofthe communications channel.

Generally the receiver is configured to receive communications comprising a sequence of symbols, said signal processing means operable across a signal window including more than one symbol period, and the processed signal having a width of more than one symbol period.

In a third aspect ofthe invention the circuitry comprises a decision feedback equaliser configured to receive said processed signal, and which preferably comprises a feedforward filter and a feedback filter.

The circuitry is configurable to calculate coefficients for said feedforward filter independently of coefficients for said feedback filter, which advantageously provides for the respective calculations to be conducted in separate parts of a processing device, or in separate processing devices, respectively optimised to perform the necessary calculations. For example, a hardware accelerator or optimised multiplier may be utilised.

A preferred embodiment in accordance with the third aspect ofthe invention utilises a Gauss-Elimination method during calculation of said feedforward filter coefficients. This is a particularly accurate method of performing the matrix inversion necessary during calculation ofthe feedforward coefficients. Although the Gauss- Elimination method is computationally intensive, the pre-processing ofthe received signal forms the processed signal which is fed into the decision feedback equaliser and results in a Teoplitz zero-forcing matrix for calculating the feedforward coefficients. Since the Teoplitz matrix is symmetrical less processing than would be the case with a non-symmetrical matrix is necessary to find its inverse.

Preferably, the feedback filter coefficients are calculated from said feedforward filter coefficients convoluted with said impulse response for said communications channel, thereby taking into account any normalisation that may have been applied during calculation ofthe feedforward coefficients.

A suitable embodiment ofthe invention comprises a computer program comprising computer program means configured to implement the foregoing described embodiments. Advantageously, a computer program carrier medium is configured to carry a computer program in accordance with the foregoing described computer program.

Other embodiments comprise communications system comprising apparatus and operable in accordance with the foregoing described embodiments.

Such communications system may comprise a wireless communications system.

A communications device may comprise apparatus and be operable in accordance with any ofthe foregoing.

In a preferred embodiment, the means for synchronising comprises a peak detector for triggering the timing of he receiver responsive to the central lobe, which provides a simple means for synchronising the receiver timing to a wanted signal.

Viewed from another aspect, the present invention provides circuitry for a receiver, comprising a decision feedback equaliser including a feedforward filter configurable by feedforward filter coefficients and a feedback filter configurable by feedback filter coefficients, and wherein said circuitry is configured to calculate coefficients for said feedforward filter independently of coefficients for said feedback filter. The circuitry is configured to calculate feedforward coefficients using a Teoplitz matrix.

In a particular aspect ofthe present invention, the circuitry is configured to apply a gain to the coefficients ofthe leading diagonal ofthe said Teoplitz matrix for increasing the domination of said diagonal component thereby reducing unwanted signal peaks in a signal output from said decision feedback equaliser.

Suitably, the gain lies in the range 1.05 to 1.2, and typically is 1.1.

The calculation ofthe feedforward filter coefficients by way of a matrix is advantageous since the matrix structure halves the necessary number of complex operations relative to a non- matrix. The saving in operations is additional to the considerable complexity reduction arising from the fact that a smaller matrix inversion needs to be processed, than would be the case without the symmetry ofthe Teoplitz matrix.

In one embodiment the calculation of the feedforward filter coefficients is by way of a Gauss-Elimination algorithm. Optionally, the calculation ofthe feedforward filter coefficients by way of a Levinson-Durbin algorithm.

Viewed from another aspect, the present invention provides circuitry for a receiver, comprising a correlator for determining a peak channel impulse response region of a received signal, wherein said circuitry is configured to initiate operation of said correlator in response to an increase in received band RF power detected by said receiver. Such an aspect ofthe invention advantageously reduces the power consumption of the receiver circuitry, since the correlator is only active when there is a likelihood that a signal for reception is present at the receiver. A further aspect ofthe present invention which reduces power consumption is provided by way of circuitry for a receiver comprising a correlator for determining a peak channel impulse response region of a received signal, wherein said circuitry is configured to initiate operation of said correlator in response reception of an identifier signal indicative of a signal intended for said receiver. Suitably such an identifier signal is a page or polling signal, for example in a radio telephone network.

Viewed from yet another aspect, the present invention provides circuitry for a receiver comprising a correlator for determining a peak channel impulse response region of a received signal, wherein said correlator is operable in a first mode at a first clock frequency for providing a coarse correlation window and in a second mode at a second higher clock frequency for providing a narrow correlation window, said second mode being initiated responsive to the detection of a peak channel impulse response whilst said correlator is in said first mode. Such an aspect ofthe invention advantageously provides a wide coarse correlation window for first establishing a coarse indication of where a peak channel impulse response occurs. Once such a coarse estimation has been achieved, then a narrow correlation window may be set up by increasing the clock frequency relative to the clock frequency used for the coarse estimation.

Viewed from yet another aspect, the present invention provides receiver circuitry comprising a processor configured to implement a feedback filter and dedicated optimised circuitry for calculating feedforward filter coefficients.

Preferably, the dedicated optimised circuitry comprises an optimised multiplier, which further preferably has at least a six bit by six bit resolution.

Aspects of the invention may be embodied, individually or- in combination, in communications devices and systems, for example in communications devices and systems for wireless communications. In particular, aspects of the invention may be advantageously embodied in a radio telephone or other mobile station such as a wireless communications enabled PDA or computing device, since the reduced processing necessary for synchronising and equalising received signals results in lower power consumption. In a typical embodiment, a radio enabled communications device comprises a user interface including a display such as a liquid crystal display or a TFT display, and a keyboard or keypad for inputting data or instructions to the communications device. Additionally, a radio-enabled device will include an antenna for radio communication, and a transceiver unit.

Specific embodiments ofthe invention will now be described, by way of example only, and with reference to the accompanying drawings, in which:

Figure 1 is a schematic illustration of a symbol sequence in a communications system;

Figure 2(a) schematically illustrates a typical data frame in a communications system; Figure 2(b) schematically illustrates a preamble packet for the data frame of

Figure 2(a);

Figure 3 is a block diagram of a communications system; Figure 4 is a block diagram of an equaliser in accordance with an embodiment ofthe invention; Figure 5 is a flow diagram illustrating the five main steps during training ofthe equaliser illustrated in Figure 4;

Figure 6 is a block diagram of a channel estimator;

Figure 7 illustrates the convolving ofthe estimated channel impulse response with the mirrored conjugate impulse response to provide a channel impulse response for the combined channel/time delay synchroniser;

Figure 8 is a simplified schematic of a tapped delay line filter model for (a) a communications channel and (b) a time delay synchroniser;

Figure 9 illustrates (a) the channel impulse response output from the communications channel of Figure 8(a), and (b) the channel impulse response output from the time delay synchroniser of Figure 8(b); Figure 10 is a comparison of (a) a communications channel impulse response, (b) a time delay synchronising filter impulse response, and (c) a combined channel/TDS impulse response for an ill-conditioned signal; and

Figure 11 is an illustration ofthe variation in peak signal power to side lobe power ratio against amplification ofthe diagonal elements ofthe Teoplitz matrix for feed forward filter coefficient calculation.

In a communications system, signals are often referred to as symbols. In a simple system, one bit corresponds to one symbol. A sequence of symbols is shown in Figure 1, in which 8 symbols S₀...Sj are schematically illustrated. A single symbol S, has a symbol period T_s.

Generally, data is transmitted over a communications system in packets. Each packet comprises a preamble sequence, followed by the payload data. A schematic illustration of a typical packet data frame 2 comprising a sequence of symbols is shown in Figure 2(a). The frame 2 has a preamble sequence 4 followed by one or more data packets 6. Optionally, the preamble sequence may be located towards the middle or end ofthe data frame 2. The preamble sequence 4 may be used by a receiver to perform channel estimation, start-of -frame detection, symbol timing recovery, equaliser training (to overcome ISI distortion) and frequency offset correction. The preamble sequence may also be used by correlation circuitry to provide the coefficients for subsequent processing stages. For example, the coefficients may be used to set the filter parameters in a delay line filter, such as a Time Delay Synchroniser (TDS) filter (to be explained in more detail later), which seeks to provide a mirror conjugate ofthe impulse response for the communications channel over which the signal has been transmitted. As illustrated in Figure 2 (b), the preamble sequence 4 typically comprises one or more known symbol or bit patterns 8, which may be a pseudo-random noise (PN) sequence, or sequence of pseudo-random noise sequences PNi, PN₂... PN_m, for example. Suitably, the first PNi sequence is for channel estimation, while the remaining PN₂...PN_m are for training and/or frequency offset correction. Referring now to Figure 3, there is illustrated a simplified block diagram of a communications system. Data 10 is input to a modulator 12 which processes the data 10 ready for transmission over a communications channel 16. Such processing typically comprises incorporating error correction and detection coding with the data 10, and modulating a carrier frequency, such as a RF or optical carrier, with the encoded data.

The suitably processed data is then transmitted over the communications channel 16 by transmitter 14. Transmitter 14 may be a radio frequency transmitter such as for a radio telephone network, or may be an optical signal transmitter for an optical fibre network. The transmit signal sequence may be algebraically represented by X(z^" ). Optionally, communications channel 16 may be a telephone landline system or a power line system, for example a domestic power line system. The channel 16 has a transfer function algebraically represented by H(z^'!). The transmitted signal is received by receiver 18, and the received signal is down converted by a demodulator 19. The received signal may be represented algebraically by X(z ') *H(z^~l) . Demodulator 19 includes a channel estimator 20 and an equaliser 30, which in the described embodiment comprises a Time Delay Synchroniser filter (TDS) 22 and a Decision Feedback Equaliser (DFE) 24. An equaliser other than a DFE may also be used as part of equaliser 30.

In practice, communications channel 16 is not perfect. For example, it may have different propagation characteristics for signals of different frequencies. This results in frequency selective fading in the frequency domain, and intersymbol interference in the time domain. Thus, a transmitted signal comprising more than one frequency may be "spread" over time as it is communicated over the channel. The same signal will then arrive at receiver 18 at different times. For digital signals, this results in spreading ofthe digital signal over time and can limit the maximum symbol/bit rate possible over the channel if equalisation is not applied to the signal. Additionally, different frequency components may be attenuated and phase distorted by different amounts. For a wireless communications channel, not only is multi-path propagation a problem since it results in time dispersion ofthe signal which causes significant ISI errors, but so too is signal fading resulting from the vector summation ofthe paths. The signal fading reduces the instantaneous signal-to-noise ratio and can result in error bursts at low mean power levels. For example, in urban or indoor environments, there are many paths by which a signal from transmitter 14 could be propagated to receiver 18. Each path takes a different route to the receiver, and therefore undergoes a different time delay. The spread in multi-path time delay at receiver 18 results in signals of different time delay, therefore carrying different symbols, arriving at the same time at the receiver.

Referring to the embodiment illustrated in Figure 3, the received signal is input to estimator 20 where the channel coefficients for the TDS 22 are derived. The received signal is also input to TDS 22 where it is filtered in accordance with the channel coefficients provided to TDS 22 by the estimator 20. The output of TDS 22 is forwarded to a DFE 24, from which data is output. The DFE 24 comprises two parts, a feed forward filter 26 and a feedback filter 28, as illustrated in Figure 4. The TDS 22, feed forward filter 26 and feedback filter 28 form a time delay synchroniser filter- decision feedback equaliser (TDS-DFE) 30.

The filter coefficients within the TDS-DFE 30 require programming for each received data frame. To provide the coefficients for programming the coefficients of the TDS-DFE equaliser, five main steps are undertaken during its training phase. The five steps are diagrammatically illustrated in Figure 5, and include: channel estimation, 36, for estimating the channel impulse response; time delay synchronisation filter coefficient calculation, 38; feed forward filter coefficient calculation, 40; feedback filter coefficient calculation, 42; and feedforward/feedback data gain adjustment 43. Each of these steps will now be described in turn.

Typically, estimator 20 utilises the first pseudo-random noise sequence (PNi) 8 of data frame 2 for channel estimation correlation. In an illustrative embodiment of the invention the PN sequences comprise 31 symbols, and only the first sequence, PNi, is used for correlation. In this embodiment an assumption is made that the start-of- frame timing is known to within a worst case accuracy of 16 symbols, and thus a 16 symbol window is used for coarse timing. A coarse timing signal is triggered using a simple power detect threshold circuit, and the correlator is activated in response to the coarse timing signal. The coarse symbol timing accuracy can be modified for different channels, or communications environments. For example, a channel having less errors or corruption may be assumed to have a greater symbol timing accuracy, and vice versa. Assuming a worst case accuracy for the start-of-frame results in power saving in the receiver since the correlator does not have to run continuously.

Coarse symbol timing may be achieved in other ways. For example, in a communications system in which respective communications apparatus are polled or identified as recipients of a data message by an identifier preceding the data message, the correlator may be turned on responsive to an apparatus identifying a data message intended for it. The correlator need not be activated immediately upon identification of a message to be received, but after a time delay suitably corresponding to a time delay between the identifier and the data message. An example of such a system is the HIPERLAN 1 system, in which data messages are preceded by an identifier corresponding to the apparatus for which the message is intended. Another example of where coarse timing could be employed using an apparatus identifier is in the GSM cellular system. The Broadcast Control Channel (BCCH) broadcasts pages or polls comprising a telephone apparatus identity. A radio telephone receiving a page over the BCCH may then initiate a correlator.

Optionally, radio apparatus may monitor its environment for an increase in receive band power levels. If energy in the receive band is detected then activation of the correlator is initiated.

A block diagram of estimator 20 is illustrated in Figure 6.

A down-converted signal is input to correlator 44, for correlation with the first pseudo-number sequence PN_ls and the correlation result forwarded to buffer 46. The signals are stored in buffer 46 and then searched, in the present embodiment, using a five symbol window, 48, in order to find where the sampled channel impulse response has the greatest power within the five symbol window 48. A windowing algorithm is used to search through buffer 46, and for each position of window 48 the sum ofthe squares ofthe five channel impulse responses falling within the window is calculated. The position of window 48 yielding the greatest channel impulse response power can also be used to provide a frame synchronisation signal accurate to five symbol periods. As mentioned above, an assumption is made that the timing of data frames is known to a worst case accuracy of 16 symbols. Thus, the correlator must undertake 496 (16 x 31) multiply and accumulate operations in order to estimate the channel impulse response for a system in which all ofthe PN₍ sequence is transmitted. The channel impulse response values ho, hi, h , hs and hi for the window position having the greatest signal power are forwarded to complex conjugator 50 where the complex conjugates

and /z₄ ^* are evaluated for channel impulse responses h₀ ,...A₄ .

In the foregoing description the window width is five symbol periods. This width is based on the size ofthe following feedforward filter (assuming a DFE is used in the equaliser). A general rule is that a feedforward filter has a span equal to the maximum channel delay spread. This general rule provides a minimum number of taps or samples which should be used in the correlator 44. Larger window widths may be used, but the Applicant has found that a five symbol window provides a good estimate ofthe channel impulse response within a reasonable level of processing for typical high data rate wireless applications. The window width is matched to the length ofthe feedforward filter 24, which in turn is related to the delay spread of channel 16. The delay spread is found by measuring the time delay between the first and last symbol received over channel 16 for symbols over a certain power, e.g. > 30 dB less than greatest power signal received over the channel.

The correlator 4 44 may be used for coarse timing by using samples of greater width, i.e. a slower clock speed than for actual correlation, thereby providing a coarse window. Once a peak channel impulse response has been detected, then the correlator may be run at a higher speed to provide a narrower window centred around the peak detected in the coarse window. The output of complex conjugator 50 is input to a TDS 22 to provide the coefficients therefor. Additionally, the down converted signal from receiver 18 is also input to the TDS 22 ofthe equaliser 30. Time delay synchronised filtering creates a filter having coefficients which are the complex conjugate of the mirror image of the estimated channel impulse response. For an ISI corrupted signal passed through the TDS filter, the resultant transfer function has the property that it is symmetrical around a central peak as shown in Figure 7. The estimated channel impulse response 52 is shown convoluted with the TDS impulse response 54 to yield an overall combined channel/TDS channel impulse response 56. As can clearly be seen from Figure 7, the so-called matched channel impulse response 54 is the mirror image ofthe estimated channel impulse response 52. This yields a final channel which is symmetric about the signal having the greatest power, 58. The symmetry is a result ofthe fact that the matched channel impulse response is a conjugate mirror image ofthe estimated channel impulse response and results in the centre output of their convolution 58 being a real signal comprising the coherent sum ofthe original channel weights. This represents the largest possible output from the convolution and will always occur on the centre tap of the resulting convolution. As such, the combined channel/TDS channel impulse response 56 has a predictable shape, with a real- valued centre peak 58 surrounded by symmetrical ISI side-lobes. Since the signal having greatest power is always in the same position, i.e. at the centre ofthe combined channel/TDS channel impulse response, it can be utilised to provide a synchronisation signal for the receiver circuitry. The output ofthe TDS 22 yielding the combined channel/TDS channel impulse response results in a coherent sum of the spread energy over the windowing width, which in the illustrative embodiment is five symbol periods. Thus, it is possible to maximise the amount of useful energy obtained from the received signal. The strong central peak, 58, with lower power side lobes is due to the inter-symbol interference in channel 16. That is to say, the transmitted symbol power is distributed over a number of symbol periods at the receiver.

Utilising a TDS 22 addresses the problem in known equalisers in which the signal having greatest power may appear anywhere in the window 48. The performance of equalisers such as the DFE depend on whether the channel is minimum phase or non-minimum phase. That is to say, whether the peak in the received signal occurs before or after the majority ofthe ISI side-lobes). For a small percentage of channels (e.g. 5-10%), the shape of the profile is such that equalisation using a DFE is difficult. However, after applying the TDS filter, the resulting channel/TDS impulse response is always ofthe same form and well suited to equalisation using the DFE 24. By using an embodiment as described herein, improved and preferably optimum symbol timing and signal to noise ratios will be maintained after the TDS processing, irrespective ofthe original channel shape. The use ofthe TDS 22 as a DFE 24 preprocessor results in a significant improvement in the performance ofthe equaliser 30.

In the absence of a TDS 22, it is necessary to track the signal delay having maximum power. This is particularly difficult in mobile communication systems, where the channel impulse response may be varying extremely quickly due to the motion of a user of a mobile station and thereby creating a highly time-varying channel. Utilisation of a TDS 22 provides an optimum synchronisation position which always occurs at the centre ofthe final channel impulse response, and which does not shift from channel to channel and therefore provides a stable synchronisation point for the equaliser or other receiver circuitry.

For an estimator 20, combined with a TDS 22, synchronisation begins by identifying the correct location for the five-symbol channel impulse response power window. This can be performed using the coarse timing apparatus and methods described above to identify the time offset that results in maximum power in the TDS sample window. Any errors in coarse timing may be compensated for by using a larger channel impulse response power window. Once the optimum power window, i.e. the window comprising the channel impulse response, has been located the position ofthe optimum synchronisation point is known since it is always located at the centre tap ofthe combined channel/TDS channel impulse response 58. No fast tracking would be necessary since the position ofthe peak signal would always be known i.e. at the centre ofthe combineάVTDS channel impulse response, 58. This may be favourably compared to an equaliser in a conventional receiver in which fast tracking would be required since the channel peak will vary as a function ofthe vector summation of the incoming multipath signals. This variation in channel peak has a fast fading effect at the receiver which results in major fluctuations in the channel impulse response shape over distances as small as one quarter of a wavelength. However, if the TDS 22 is used a stable timing reference point is obtainable.

Optionally, as soon as the window 48 has identified the five channel impulse response signals 52 having the greatest power, it is possible to determine a synchronisation point for a receiver comprising a TDS 22. This is because it is known that the greatest power signal output from the TDS 22 will always be at a predetermined position. Thus, once the window 48 has locked onto the appropriate sample of buffer 46, the resulting signal 58 to be provided by the TDS 22 can be determined from a knowledge of a position of window 48 and the time delay between establishing the highest power signal window and producing the final channel output from the TDS 22. In this way, evaluation of a synchronisation point may be achieved earlier on in the processing ofthe training signal than is possible if the synchronisation point is determined from the output of the TDS 22 itself.

Turning now to Figure 8, a schematic illustration of a communications channel 16, as evaluated by estimator 20, and a TDS 22 is illustrated. Convolution ofthe transmit signal, X(z^~!), with the channel transfer function H(z^'!) of channel 16, forms the input to receiver 18. The TDS 22 has a transfer function represented by F(z^~l). Hence, the signal entering the DFE 24 shown coupled to the TDS 22 in Figure 3 is given by x(t) *h(t) *f(t), where "*" represents the process of convolution. As is well known to a person of ordinary skill in the art, " z " notation is used to indicate the amount by which a symbol has been delayed in the channel 16.

The estimated channel impulse response may be used to form a tapped-delay- line (TDL) filter model of channel 16 as illustrated in Figure 8(a). The model illustrated in Figure 8(a) is a five tap delay line, corresponding to a five symbol window, and has four delay stages (T_s). At any moment k, channel 16 holds five symbols S_k,S_k , S_k_₂,S_k_₃ and S_k_₄ , each separated by one symbol period, T_s . S_k_₄ is a symbol in a data frame which has occurred four symbol periods, T_s , before S_k, which is the most recently transmitted symbol. The channel model can be used to perform convolution with the transmit data sequence x(t), to produce the signal received at receiver 18 after down conversion, i.e. the input to the estimator 20. Each tapped signal S„ is operated on by a complex weight function, h„, which modifies the gain and phase ofthe tapped signal and corresponds to the estimated channel impulse response h₀...h₄ . The resulting modified signals are summed and then a noise term η_k is added to the summed signals to form a received signal V_k at an instant k. The channel impulse response at the output of channel 16, i.e. *, is illustrated in Figure 9(a).

Referring to Figure 8(b), signal v* is input to TDS 22 which is a mirror conjugate of channel 16 and therefore comprises four symbol period, T_s , delays, providing five taps in all. The respective tapped signals are v_k, v_k__{,v_k_₂,v_k__z and v_k_₄ . Each tap signal is operated on by respective functions

and h₀ ^* which are the complex conjugates of the functions h₄ ,h₃,h₂ ,h_l and h₀ respectively, estimated from the channel model. Furthermore, each tap signal v_k...v_k_₄ is respectively operated on by filter coefficients h₄ ^*...h₀ ^* , i.e. in the reverse order to which the corresponding channel coefficients operate on signals S_k...S_k_₄ . Thus, the filtering in the TDS 22 is a conjugate mirror image ofthe filtering in channel 16.

Each tapped or modified signal v_k...v_k_₄ is summed to provide output y_k which is the system impulse response. The output y_k is illustrated in Figure 9(b) which shows the combined channel/TDS channel impulse response. The dominant centre tap is clearly visible, surrounded by far weaker and symmetrical ISI side lobes. Figure 9(b) illustrates that the resulting output from the TDS 22, y_k, suffers from ISI from 8 neighbouring data symbols, four before and four after the central peak. Figure 9(a) is a visualisation ofthe ISI components as seen at the output ofthe channel 16, i.e. at the input to the receiver 18. Figure 9(b) is a visualisation of the ISI components as seen at the output ofthe TDS 22. The channel illustrated in Figure 9(b) is considerably easier to equalise than a non-symmetrical signal.

For clarity, the noise term η may be omitted from the analysis.

Referring back to Figure 8, the channel impulse response coefficients may be algebraically represented by the following equation:

H(z^'1 ) = h₀ + h_xz^~x + h₂z^~2 + h₃z^~3 + h₄z , (1)

and the coefficients for the TDS filter may be represented by:

F(z^~l )

+ ti₃z^' + h₂z-² + h[z^~ + /z₀V⁴ . (2)

Multiplying (1) and (2), the following relationship may be established:

H(z ^!) F(z ^!) = h₀h*₄

+ (h₀h*₃ + h,h*₄)z ^l + (h()h*2 + hjh*3 + h₂h*₄)z^'2

+ (h₀h*₀ + ft*ι + h₂h*₂ + h₃h*₃ + h₄h*₄)z ⁴(3)

+ (hιh*o + h₂h*j + h₃h*2 + h₄h*j)z^~5

+ (h₂h*₀ + h₃h*, + h₄h*₂)z^~6 + (h₃h*₀ + h₄h*i)z ⁷

+ h₄h*oz^'

The product H(z^_1) x F(z^~[) represents the combined impulse response ofthe channel and the pre-processing TDS. The received signal Y(z ¹) is given by X(z^~l ) x H(z^~l) x F(z^~l ) . Each line of equation (3) represents a particular delay element. Assigning the fourth delay element, (z^~4 ) , of equation (3) as the centre point, the output of TDS 22 can be represented as the following delay elements, where d_k corresponds to those indicated in Figure 9(b):

d = hoh *₄ d₃ = h()h*₃ + hih*₄ d - hoh* + hιh*₃ + h₂h*₄ di - hoh * i + hιh*2 + h_∑h*₃ + h₃h *₄ do = h₀h *₀ + hjh *! + h₂h*₂ + h₃h*₃ + h₄h*₄ (5) d*ι = hιh*₀ + h₂h*ι + h₃h*₂ + */ d*2 = h2h*o + h₃h*ι + h₄h*2 d* = h₃h*o + h₄h*_} d*₄ = h₄h*oz^~8

As can be seen from equation (5), the fourth delay element do is always real valued since its coefficients are the squares of respective channel impulse responses, hi, h*i. This real- valued centre tap is used as the synchronisation (or cursor) point for the equaliser. Delay elements dj ... d₄.zad their complex conjugates d*ι ... d*₄ axe arranged symmetrically about do, and represent the unwanted ISI components in the combined channel/TDS impulse response.

The desired symbol St (as received at the receiver) is given by S_k-do, where d₀ represents the maximum real-valued centre element do of equation (5). This desired symbol is corrupted by pre-cursor ISI components resulting from d.₄...d.ι and post- cursor ISI components resulting from dj...d₄. To remove this ISI a post-TDS equaliser is required. In the preferred embodiment, a DFE is used.

The signals represented by equation (5) are now fed into the second part of equaliser 30, the DFE 24. As described with reference to Figure 4, the DFE 24 comprises two main parts, a feed forward filter 26 and a feedback filter 28. The output of TDS 22 is input to the feed forward filter 26. The feed forward filter 26 operates in a similar manner to a tapped-delay-line (TDL) filter, similar to that described with reference to Figure 8 for implementing the TDS 22 to estimate the channel impulse response. For the feed forward filter 26, there are five taps, each separated by a delay of one symbol period Ts, each tapped signal being operated on by respective feed forward filter coefficient c,-. The feed forward filter is configured to cancel the pre-cursor ISI resulting from the channel impulse response shown in Figure 9(b), that is to say symbols received by the receiver over paths whose time delay lies between the first path and the synchronisation peak, i.e. ISI components d ...d₄ in equation (5). In other words, the feed forward filter is configured to cancel the influence of symbols which have been transmitted after the symbol of interest, yet have been received prior to the symbol of interest by virtue of their having travelled a shorter path. Since the interference effect of these "future" symbols is unwanted, it is desirable to set the feed forward filter coefficients c, such that the components in the output ofthe TDS 22 corresponding to the "future" symbols are zero after the equalisation process.

The situation is different for the feedback filter 28, which seeks to cancel the influence of "past" symbols. That is to say, symbols for which hard decisions have already taken place (i.e. already equalised), and which were transmitted before the symbol of interest yet, due to their taking longer paths, arrived at the receiver at the same time as the symbol of interest.

In order to better explain and improve the understanding of embodiments ofthe invention, a detailed mathematical analysis of a communications system incorporating an embodiment ofthe invention will now be provided.

A communications channel 16, such as a radio channel, can be represented without loss of generality as a simple tapped delay line, with complex amplitudes, h_t , spaced at the symbol period. The number of samples, L+l, required to represent the channel history depends on the degree of delay spread and the symbol period of the modulation scheme. In the following example, L=4 will be used, thereby providing five taps as used in the foregoing description. Given a transmit sequence x_k , the received sequence v_k after passing the samples through the radio channel h_t (i=0..L) is given by:

L ^vk = ∑^hi^xk-ι (6) ι=0 The TDS 22 is formed as a mirrored conjugate image ofthe channel estimated at the receiver. Given that the input to the TDS 22 is the received stream v_k , the output from the TDS 22, y_k , is given by:

L L L y_k-i = ∑^h j^v -j = ΣK.-j Σ^h,^Xk-j-, (^?)

₇=0 j=0 1=0

Defining k — k + L , the above equation can be rewritten as:

The above equation representing the output from the TDS filter can be written more simply as:

L y , = ∑ d_tx , (9) ι=-L where

and

Finally, the output from the TDS 22 is fed into the DFE 24 to reduce, or preferably remove, any ISI side lobes. The resulting equaliser output sequence is given by:

Where _A represents an estimate ofthe k-th data sample, x_k denotes the hard detected symbol stream from the DFE 24, L_f is the number of taps for the feedforward filter 26 and L_h is the number of taps for the feedback filter 28.

To illustrate the method used to calculate the equaliser coefficients c_i , a ( L , =5,

L_b =4) DFE 24 (assuming the zero-forcing criteria) will be used in conjunction with an L=4 symbol memory radio channel.

From equation (6) an expression for the received signal after passing through the radio channel 16 can be written as:

L ^vk = ∑ ^hi^χk~i = K^χk + *-ι ⁺ h^χk-ι + - ₃ + h^χt-A ⁽¹³⁾ ι=0

From equation (7) we can calculate the output from the TDS filter:

y_k-L = + ^Vk-3 + ^Vk-4 (¹⁴)

Substituting for v_k from equation (13) the following expression is obtained:

y_k-L = K (K^Xk +

+ ^Xk-2 + ^h2 k-3 + K^Xk- + O l + ^h\^Xk-2 + K^Xk- + ^Xk- + h^X-5 ) + h₂ ^*(h₀x_k_₂+h_xx_k_₃+h₂x_k__Λ+hx_k_₅+h₄x_k_₆)+ (15)

K ( lc-3 +

+ ^h2^Xk- + ^h3^Xk-6 ^{+ X}k-l ) + K(^{h X}k-4 ^+hX^Xk-5 + ^Xk-6 + ^Xk-l^{+ X}k- )

Collecting the x terms enables equation (15) to be rewritten as shown below:

^χk-ι( hi- ^{+ +} . ⁺ )⁺

Defining k = k + 4 , equation (16) can be rewritten as with k representing the ideal sampling point.

x i , x ,

^X^₄(KK) Equation (17) can be written in a more simplified manner by defining a number of intermediate variables, d_i (1--4..4).

y ^J k.=d ^-4,x i,+4 +d , ³x i.+3 +d_x t,+2 + d -,'x k,+l +d_n °x k , +d, ^lx i ,-1 +d_η ²x k,-2 +d, ³x k, -3 +d ⁴,x k, -4 ( 8)

where <J. have the following definitions (as can be seen by comparing equations (17) and (18).

d_₃ =h h_{ --h₃ ^*h_Q

d = h^^* + h^*h₂ + h₂ ^*h_x + h^*h₀ d₀= h₄ ^*h₄ + h₃ ^*h₃ + h₂h₂ + \ + z^*z₀

(19) d_x -h₃h₄ -h₂h₃--h h₂ ^Δr h₀h_} d₂ = h₂ ^*h₄ + h^*h₃ + h_Qh₂ d₃=hh₄+ h^h_j d₄ = h₀ ^*h₄

The expressions given in equation (18) represent the expanded form of equations (10) and (11) defined earlier. The output from the DFE 24 is defined mathematically by equation (12). Expanding the expressions for y_k the following expression is obtained:

0 lb _ x_k = ∑c,y_k__i+∑c_lx_k__i i=-L_f i=ϊ

Xk ^{= C}-4 Α:+4 ^{+ C}-3 V.3 ^{+ C}-2^+2 ^{+ C}-l +l ⁺ ^Λ ^{+ C}\^Xk-l ^{+ C}2^Xk-2 ^{+ C}3^Xk-3 ^{+ C}4^Xk-4

Inserting the earlier expressions for y_k (equation (18)) an expanded version of the received signal is obtained:

^Xk ^{= C}-4\^d-4^Xk + "-3 H ⁺ "-2^X4+2 ⁺ "-l^Xjfc+3 ^{+ d}0^Xk+4 ^{+ d}\^Xk+S ^{+ d}2^Xk+6 ⁺ "3^X/t+7 ⁺ "4 /.+₈} ⁺ c_₃{d_₄x_k_ +d_₃x_k +d_₂x_k+l + d__xx_k+2 +d₀x_k+3 + d_xx_k+4+d₂x_k+5 +d₃x_k+6 +d₄x_k+7} + c_₂{d_₄x_k_₂ + d_₃x_k__χ +d_₂x_k + d__xx_k+x +d_Qx_k+2 +d_xx_k+3 +d₂x_k+4+d₃x_k+5 +d₄x_k+6} + c {d_₄x_k_₃ + d_₃x_k_₂+d_₂x_k_ +d__xx_k+d_Qx_k+x+d_xx_k+2+d₂x_k+ +d₃x_k+4 +d₄x_k+5} +

^C0l -4^X/fc-₄ ^"*^" -3 <t-3 ^"i" -2 4-2

"4 /fc+4 J ^"*^"

^Cl i-l ^"*^"

^C2 ιt-2 ⁺

^C3^X4-3 ⁺

^C4^Xfc-4

Collecting the x terms, a final expression for the equaliser output is obtained:

^Xk ~ ^Xi+₈{^C-4"4J ^"*^{" X}Jt₊7{^C-4^3 +^C-3^4} + i₊₆{^C-4^2^+C-₃^3^+C-2^4} ^{+ χ} _k^_s { ._Ad + c_₃d₂ + c_₂d₃ + c__xd₄ } + x_k+ {c_₄d₀ -c_₃d_x +c_₂d₂ +c__xd₃ +c₀d₄} +

^Xk+3 {^C-4^-l ^"*^{" C}-3^dϋ ^"*^{" C}-2^1 + ^C-1^2 ^"*^{" C}0^3 } ⁺

_k+l{C-A^d-3 ^{+ C}-3^-2 +^C-2^d-\ +C-\^d +^C≠\} +

^Xk{^C-4^d-4 +^C-τ, -τ, +C-₂ ^d-2 +^C-1^-1 +^CQ^do} ⁺

^x _k.₂{C-2^d-A +^C-.l^-₃ +C_ϋ ^d-2 +^C2) ^{+ X}A-j{^C-l^-4 ^+C0 -3 + ^C ₃} +

In equation (20) only the Λ^term is desired if ISI is to be removed. Hence, all the other terms should ideally be forced to zero. This zero forcing requires an appropriate set of equaliser coefficients. These coefficients can be calculated by solving the following matrix equation (which is based on forcing the ISI coefficients in equation (20) to zero). d₀ d_x ^d-\ ^do d_, d_ (21)

--4 ^d-i ^d-ι

0 ^d-4 ^d-, 0 0 ά. 0 0 0 d 0 0 0

Equation (21) can now be broken down into the following matrix expression:

In the above expression the { d, } sub matrix is the main body ofthe solution and takes the form of a 5-by-5 matrix for the preferred embodiment comprising a five tap feedforward filter. { Vc/, } represents the upper triangular matrix which consists of J, . {0,1} denotes the transpose ofthe matrix [0, 0, 0, 0, 1]. Given this structure, the matrix equation can easily be partitioned and the main body ofthe solution can be obtained via the inversion ofthe { d, } matrix.

In equation (21) it can be seen that the feedforward coefficients ofthe DFE {c_ , c_₃, c_₂, e_ι, eo} ^{nave no cross} component terms with the feedback section ofthe DFE {c_{l 5} Ci, c₃, c₄} in the component matrix. Thus, it is possible to partition the equation into two smaller forms to reduce the size ofthe component matrix. The two smaller equations are shown below as equations (22) and (23).

Equation (22) has a matrix form since d__t = d_t , ₌o_,ι_,._{„ 4 »} therefore the feedforward coefficients can be easily calculated using well known techniques such as the Levinson-Durbin or Gauss-Elimination algorithms. Given that the TDS-DFE enables the inversion of a smaller component matrix, the more accurate Gauss- Elimination algorithm may be more readily applied. When implemented using data processing devices such as a microprocessor or digital signal processor (DSP) for example, the Gauss-Elimination process is further simplified by the matrix structure, since it halves the required number of complex operations (relative to a non- matrix). This saving is in addition to the considerable complexity reduction arising from the fact that a far smaller matrix inversion is processed than would be the case without the symmetry of equation (22), which was derived from the TDS pre-processed signals.

The feedback filter coefficients can be calculated as shown in equation 23 without the need for matrix inversion directly from equation (21). Once again noting that, d_i = d_t , j--_0jι,...,4 )^:

] — — Wi CQ — ^2^—1 — ^3 ^—2 — ^4^— c₂ = -d₂c₀ - d₃c_ι ~ d₄c_₂

* _* ( ) c₃ = -«₃eo — d^c_

In practice, normalisation is often used within a matrix inversion process to ensure accuracy when using fixed point arithmetic. If normalisation is applied then equation 23 suffers from gain imbalance between the feedforward and feedback filter coefficients since equation 23 only relates to the feedforward coefficients.

The method used to obtain the equaliser co-efficients relies on partitioning the feedforward and feedback calculations. As a result of these independent calculations, it is necessary to calculate the relative gain between the feedforward and feedback filters. Moreover, during the Gauss Elimination matrix inversion process, a high level of normalisation is used to maintain accuracy in a fixed-point processor. A block diagram of a TDS-DFE system is given in Figure 4. The main idea of the TDS-DFE is to design a zero forcing equaliser to exploit the advantages offered by the TDS filter. The ISI channel can be modelled in the z-domain as:

H(z^~x ) = h₀ + z^~x + h₂z^~2 + h₃z^~3 + h₄z^'4 (24)

where equation 19 is simply a z-domain version of the channel expressed earlier in equation 1. The channel matched filter response can be given as:

F(z^~l ) = h₄ ^* + h₃ ^*z^~l + h₂ ^*z^~2 + rz^*z^~3 + /z₀V⁴ (25)

where equation (25) is simply the z-domain version ofthe TDS response expressed earlier in equation (7). The combined response ofthe channel convoluted with the TDS 22 can easily be obtained as:

+ ( z₀ z₃ + h_xh₄ ^*)z^~l

+ (h₀h₂ ^* + h_xh^ + h₂h₄ ^*)z^~2

+ (h₀h_x ^* + h_xh₂ ^* + h₂ ζ + I^h^z^'3

+ h + h h + h₂h₂ f i ^ f h )z^~4

(26) + (h_xh_Q ^* + h₂} + λ_jΛ + h l )z^~5

+ (h_ih + h₄h[)z-¹

+ h₄h_Q ^*z^~

Equation (26) is a z-domain equation having the same coefficients as those defined in equation (19). The feedforward filter 26 is configured to have the following form: C_FF (z) = c_₄z^'4 + c_₃z^~ + c__₂z^~2 + c_ z^~x + c₀ (27) where Co represents the timing synchronisation for the desired symbol reception (i.e., the cursor point). The feedback filter 28 is configured to have the following form:

C_FB (z) ~ c_xz + c₂z² + c₃z¹ + c₄z⁴ (28)

The main aim of a zero forcing equaliser is to produce an overall channel transfer function given by

C_EQ (z) = c_Q (29)

where CE_O represents the equalised channel transfer function, with Co being equal to unity.

The feedforward filter coefficients and the TDS filter coefficients are previously calculated, for example in a DSP, and are typically subjected to numerous normalisation processes. The feedback filter coefficients can now be accurately calculated to take into account the normalisation used in calculating the feedforward filter coefficients by rearranging the above equations. The feedforward filter convoluted with the TDS filter has the following form:

F_FF(z) = F(z) * C_FF(z)

(30)

F_FF(z) = b₀ + b z^~x + b₂z^~2 + b₃z^"3 + b₄z^~4 + b₅z^~5 + b₆z^~6 + b₇z^~7 + b_%z

where b_t., i = 0..8 represent the coefficients at the appropriate delays. Using the zero forcing principal, the combined feedforward filter convoluted by the channel should produce the following equation: remaining ISI

(h₀b₄ + h b₃ + h ₂ + h₃b_x + h₄b₀)z^~4 + (h₀b₅ + h b₄ + hφ₃ + h₃b₂ + h_Ab )z^~5 + ISI to be cancelled by FFF (h₀b₆ + h_xb₅ + h ₄ + h₃b₃ + h₄b₂)z^~6 + (hφ_η + h_xb₆ + h₂b₅ + h₃b₄ + h₄b₃)z^'η +

(h₀b_s + h_xb₇ + h₂b₆ + l b_$ + h₄b₄)z^~% + cursor point

ISI to be cancelled by FBF

(31)

Finally, from equation (31), the feedback filter coefficients can be calculated as:

c = -(/zJ3₈ + h₂b₇ + h₃b₆ + h₄b₅)

c_A - ^• -h₄b_s

The appropriately weighted feedback filter coefficients can now be calculated from equation (32) using the coefficients of b_t- and h, . This equation allows the feedback coefficients to be accurately calculated for example in a DSP, based on knowledge of the channel estimate, the TDS co-efficients and the feedforward filter taps. This method reduces and preferably removes gain imbalances between the feedforward and feedback coefficients and reduces the error floor in the output from equaliser 30. Another aspect ofthe invention is so-called ill-condition saving ofthe signal output from the TDS-DFE combination.

The problem of ill conditioning can be illustrated by performing a channel estimate on the signal after the TDS-DFE filter combination. This enables any residual ISI to be viewed. The channel estimate may utilise the estimator 20 described with reference to Figure 3 above, or may be another suitable estimator. The resulting autocorrelation product from the estimation has a peak at the desired symbol point, and side lobes representing remaining ISI components after equalisation through the TDS- DFE filter combination. Figure 10 shows the profile after (a) the channel, (b) the TDS filter 22 and (c) the DFE 24. Although the ISI is driven close to zero within the equaliser window, an ISI peak is observed just outside the feedforward window.

On a small number of occasions, the component matrix (equation (22)) is subject to ill conditioning and this causes the unwanted ISI peak 80 illustrated in Figure 1 Oc to reach an unnecessarily high amplitude. The effect can be reduced by applying an ill-condition saving scheme.

The residual Mean Square Error (MSE) ofthe equaliser depends on the SNR and the remaining ISI components outside the equaliser window. The problem of ill conditioning arises because of a weak domination ofthe diagonal ofthe component matrix. The resulting solution exhibits large residual ISI. When the diagonal is weak, the solution provides larger feed forward filter coefficient amplitudes and a smaller amplitude for the DFE centre tap (i.e. c₀ < c__t, ι = 1,2, ....if ). Although this solution is analytically true, it results in considerable ISI components outside the ISI cancellation window which is known as interference propagation.

In this embodiment the domination ofthe centre tap 82 ofthe TDS ISI profile, illustrated in Figure 10 (b), is artificially maintained by amplifying the amplitude of d₀ (i.e. d_Q = k d₀ , where 1.05 < k ≤ 1.2 , typically k'=l.1). This increases the domination ofthe diagonal in the component matrix of equation (22). The increase in the value ofthe diagonal element do for optimally compensating for ill conditioning may be empirically derived by trial and error. Although the MSE is increased in every frame leading to an increase in the noise floor ofthe equaliser 30, the rare ill- conditioned cases are significantly reduced. This method is known as an ill-condition saving scheme and its operation has a significant effect on performance to the extent that the overall increase in the noise floor is compensated for by the improvement in the ill-conditioned cases.

The effect ofthe ill condition saving method will now be demonstrated by considering a channel with only two symbols interfering with each other. The channel model can now be written in the discrete Z-domain as:

H(z) = h₀ + h z (33)

The filter matched to the channel is given by

The convolute ofthe two filter responses yields a resulting channel taking the form shown below:

H(z) * F(z) = h + h + h_x ²)z + h tζz² = d_x + d_Qz + d[z² (35)

The convolute ofthe final channel impulse response by the 2-tap long feedforward filter ofthe DFE equaliser filter. Assuming a filter structure with 2-tap FFF and 1-tap FBF, yields:

H(z) * F(z) * F_FF (z) = (d_x +d₀z + d;z² (c, + c₀z)

(36)

= d c + (d c_Q + d₀c_x)z + (d_Qc₀ ^Jr d_x ^*c_x)z² +d^*c₀z

Using the zero forcing principle the following matrix equation is obtained:

Solving the equations above and substituting into equation 4 the final response as shown below is obtained:

remaining

ISI to be cancelled ISI by FBF

From equation (38) it is clear that the second term and the last term are cancelled by the feedforward filter and the feedback filter respectively. The first term represents the remaining ISI for our model. Multiplying d by a small constant k equation (38) becomes:

d² d_xd₀ fCCln Cl-i K tn ϋi kd_Λ d, H(z) * F(z) *F_FF (z) = - Z + z^* +- 1 "0 ftCtn — W , i Ϊ Q — u. K&rκ ~~ I kd₀ — d_x kd; -d²

H(z) * F(z) *F_FF (z)

remaining ISI ISI introduced ISI to be cancelled (decreased by k) by ill-condition by FBF saving

It can now be seen that as k increases the remaining ISI is reduced until some critical point where the ISI introduced by the ill-condition saving is significant.

A graph ofthe peak signal power to sidelobe power ratio (G) against a percentage multiplier for d₀ is shown in Figure 11, and illustrates how G increases to a maximum and then decays as the multiplier k' is increased. Such a graphical relationship may be established for ill-conditioned signals, in order to optimise the value of k' in an ill conditioning saving scheme. The calculation ofthe feed forward filter coefficients, utilising normalisation as described above reduces the possibility of overflow errors in their calculation. Thus, it is possible to calculate the filter coefficients using 8 or 16 bit fixed point arithmetic. It is also possible to conduct the calculation ofthe filter coefficients in dedicated circuitry, separate from a DSP processor core, and having an optimised multiplier with at least 6 bit by 6 bit resolution. By carrying out the calculation ofthe filter coefficient in dedicated hardware, separate from the DSP, there are fewer delays in the processing of other operations by the DSP. Additionally, The use of an 8 bit multiplier for example would reduce the silicon area required for performing the filter coefficient calculations, as well as the number of memory accesses. This would lead to both a reduced power and cost compared to utilising a DSP for all the processing.

Insofar as embodiments ofthe invention described above are implementable, at least in part, using a software-controlled programmable processing device such as a Digital Signal Processor, microprocessor or other processing device, it will be appreciated that a computer program for configuring the programmable device to implement the foregoing described methods is envisaged as an aspect ofthe present invention.

Suitably, the computer program is stored on a carrier medium in machine or device readable form, for example in solid-state memory or magnetic memory such as disc or tape and the processing device utilises the program or a part thereof to configure it for operation. The computer program may be supplied from a remote source embodied in a communications medium such as an electronic signal, radio frequency carrier wave or optical carrier wave. Such carrier media are also envisaged as aspects ofthe present invention.

In view ofthe foregoing description it will be evident to a person skilled in the art that various modifications may be made within the scope ofthe invention.

The scope ofthe present disclosure includes any novel feature or combination of features disclosed therein either explicitly or implicitly or any generalisation thereof irrespective of whether or not it relates to the claimed invention or mitigates any or all ofthe problems addressed by the present invention. The applicant hereby gives notice that new claims may be formulated to such features during the prosecution of this application or of any such further application derived therefrom. In particular, with reference to the appended claims, features from dependent claims may be combined with those ofthe independent claims and features from respective independent claims may be combined in any appropriate manner and not merely in the specific combinations enumerated in the claims.

Claims

C L A I M S

1. Circuitry for a communications receiver, comprising: signal processing means for processing a received signal to provide a processed signal comprising a real-valued central lobe; and means for synchronising receiver timing with a real-valued central lobe of said processed signal.

2. Circuitry according to claim 1, said signal processing means configurable to process said received signal in accordance with a conjugate mirror image of an impulse response of a communications channel corresponding to said received signal.

3. Circuitry according to claim 1 or 2, further comprising means for estimating said impulse response of said communications channel corresponding to said signal received by said receiver.

4. Circuitry according to any preceding claim, said signal processing means comprising a time delay filter.

5. Circuitry according to claim 4, said time delay filter programmable with filter coefficients corresponding to said conjugate mirror image of said impulse response.

6. Circuitry according to any preceding claim for a receiver configured to receive communications comprising a sequence of symbols, said signal processing means operable across a signal window including more than one symbol period.

Circuitry according to claim 6, said processed signal having a width of more than one symbol period.

8. Circuitry according to any preceding claim, further comprising a decision feedback equaliser configured to receive said processed signal.

9. Circuitry according to claim 9, said decision feedback equaliser comprising a feedforward filter and a feedback filter.

10. Circuitry according to claim 10, configurable to calculate coefficients for said • 5 feedforward filter independently of coefficients for said feedback filter.

11. Circuitry according to claim 11 , configurable to utilise a Gauss-Elimination method during calculation of said feedforward filter coefficients.

10

12. A method for obtaining a synchronisation signal from a received signal, the method comprising: processing a received signal to provide a processed signal comprising a real-valued central lobe; and 15 synchronising timing ofthe receiver with said central lobe of said processed signal.

13. A method according to claim 12, comprising processing said received signal in accordance with a conjugate mirror image of a channel impulse response for a communications channel corresponding to said received signal.

20

14. A method according to claim 14, comprising estimating a channel impulse response for a communications channel corresponding to said received signal.

15. A method according to any one of claims 12 to 14, further comprising 25 calculating coefficients for a feedforward filter from said processed signal.

16. A method according to any one of claims 12 to 15, comprising calculating coefficients for a feedback filter from said processed signal.

30 17. A method according to claim 15 and claim 16, said feedforward coefficients being calculated independently of calculating said feedback coefficients.

18. A method according to claim 15 or claim 17 dependent on claim 15, comprising calculating said feedforward coefficients utilising a Gauss Elimination method.

19. A method according to any one of claims 15 to 18, comprising calculating said feedback filter coefficients from said feedforward filter coefficients convoluted with said impulse response for said communications channel.

20. Circuitry for a receiver, comprising a decision feedback equaliser including a feedforward filter configurable by feedforward filter coefficients and a feedback filter configurable by feedback filter coefficients, and wherein said circuitry is configured to calculate coefficients for said feedforward filter independently of coefficients for said feedback filter.

21. Circuitry according to claim 20, configured to calculate said feedforward coefficients using a matrix.

22. Circuitry accordin'g to claim 20 or 21 , wherein said feedback filter coefficients are calculated from said feedforward filter coefficients convoluted with said impulse response for said communications channel.

23. Circuitry according to claim 21 or 22 dependent on claim 21, configured to- apply a gain to the coefficients ofthe leading diagonal ofthe said matrix for increasing the domination of said diagonal component thereby reducing unwanted signal peaks in a signal output from said decision feedback equaliser.

24. Circuitry according to claim 23, wherein said gain lies in the range 1.05 to 1.2, and typically is 1.1.

25. Circuitry according to any one of claims 20 to 24, wherein said calculation of the feedforward filter coefficients is by way of a Gauss-Elimination algorithm.

26. Circuitry according to any one of claims 20 to 24, wherein said calculation of the feedforward filter coefficients is by way of a Levinson-Durbm algorithm.

27. Circuitry for a receiver, comprising a correlator for determining a peak channel 5 impulse response region of a received signal, wherein said circuitry is configured to initiate operation of said correlator in response to an increase in received band RF power detected by said receiver.

28. Circuitry for a receiver comprising a correlator for determining a peak channel 0 impulse response region of a received signal, wherein said circuitry is configured to initiate operation of said correlator in response reception of an identifier signal indicative of a signal intended for said receiver.

29. Circuitry according to claim 28, wherein said identifier signal is a page or 5 polling signal.

30. Circuitry according to claim 29, wherein said page or pollong signal is for a radio telephone network.

0 31. Circuitry for a receiver comprising a correlator for determining a peak channel impulse response region of a received signal, wherein said correlator is operable in a first mode at a first clock frequency for providing a coarse correlation window and in a second mode at a second higher clock frequency for providing a narrow correlation window, said second mode being initiated responsive to the detection of a peak 5 channel impulse response whilst said correlator is in said first mode.

32. Receiver circuitry comprising a processor configured to implement a feedback filter and dedicated optimised circuitry for calculating feedforward filter coefficients.

30 33. Receiver circuitry according to claim 32, wherein said dedicated optimised circuitry comprises an optimised multiplier.

34. Reciever circuitry according to claim 32 or 33, wherein said dedicated optimised circuitry has at least a six bit by six bit resolution.

35. A method for calculating feedforward coefficients for a feedforward filter of a

5 decision feedback equaliser including a feedforward filter configurable by feedforward filter coefficients and a feedback filter configurable by feedback filter coefficients, comprising calculating said feedforward coefficients independently of coefficients for said feedback filter.

10 36. A method according to claim 35, wherein said feedforward coefficients are calculated using a matrix.

37. A method according to claim 35 or 36, whereinfeedback coefficients for said feedback filter are calculated from said feedforward filter coefficients convoluted with

15 said impulse response for said communications channel.

38. A method according to claim 35 or 36 dependent on claim 35, further comprising applying a gain to the coefficients ofthe leading diagonal ofthe said matrix for increasing the domination of said diagonal component thereby reducing

20 unwanted signal peaks in a signal output from said decision feedback equaliser.

39. A method according to claim 38, wherein said gain lies in the range 1.05 to 1.1, and typically is 1.1.

25 40. A method according to any one of claims 35 to 39, wherein said calculation of the feedforward filter coefficients is by way of a Gauss-Elimination algorithm.

41. A method according to any one of claims 35 to 39, wherein said calculation of the feedforward filter coefficients is by way of a Levinson-Durbin algorithm.

30

42. A method of operating a receiver comprising a correlator for determining a peak channel impulse response region of a received signal, said method comprising initiating operation of said correlator in response to an increase in received band RF power detected by said receiver.

43. A method of operating a receiver comprising a correlator for determining a 5 peak channel impulse response region of a received signal, said method comprising initiating operation of said correlator in response reception of an identifier signal indicative of a signal intended for said receiver.

44. A method according to claim 43, wherein said identifier signal is a page or 10 polling signal.

45. A method according to claim 44, wherein said page or polling signal is for a radio telephone network.

15 46. A method of operating a receiver comprising a correlator for determining a peak channel impulse response region of a received signal, comprising operating said correlator in a first mode at a first clock frequency for providing a coarse correlation window and in a second mode at a second higher clock frequency for providing a narrow correlation window, said second mode being initiated responsive to the

20 detection of a peak channel impulse response whilst said correlator is in said first mode.

47. A computer program comprising machine or computer-readable program elements for configuring a computer to implement the method of any one of claims 12

25 to l9 or 35 to 46.

48. A computer program comprising machine or computer-readable program elements translatable for configuring a computer to implement the method of any one of claims 12 to 19 or 35 to 46.

30

49. A computer program carrier medium, configured to carry a computer program in accordance with claim 47 or 48. 1/89110

42

50. A communications system comprising circuitry according to any one of claims 1 to 11 or 20 to 34, and operable in accordance with any one of claims 12 to 19 or 35 to 46.

51. A communications system according to claim 50, comprising a wireless communications system.

52 A communications device comprising circuitry according to any one of claims 1 to 11 or 20 to 34, and operable in accordance with any of claims 12 to 19 or 35 to 46.

53. A communications device according to claim 52, suitable for wireless communications .